15402 lines
555 KiB
Plaintext
15402 lines
555 KiB
Plaintext
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103ze_code.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 000001e4 08000000 08000000 00010000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 00005d68 080001e4 080001e4 000101e4 2**2
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 00000b60 08005f4c 08005f4c 00015f4c 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM.extab 00000000 08006aac 08006aac 00020024 2**0
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CONTENTS
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4 .ARM 00000000 08006aac 08006aac 00020024 2**0
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CONTENTS
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5 .preinit_array 00000000 08006aac 08006aac 00020024 2**0
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CONTENTS, ALLOC, LOAD, DATA
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6 .init_array 00000004 08006aac 08006aac 00016aac 2**2
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CONTENTS, ALLOC, LOAD, DATA
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7 .fini_array 00000004 08006ab0 08006ab0 00016ab0 2**2
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CONTENTS, ALLOC, LOAD, DATA
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8 .data 00000024 20000000 08006ab4 00020000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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9 .bss 000007bc 20000024 08006ad8 00020024 2**2
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ALLOC
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10 ._user_heap_stack 00001000 200007e0 08006ad8 000207e0 2**0
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ALLOC
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11 .ARM.attributes 00000029 00000000 00000000 00020024 2**0
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CONTENTS, READONLY
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12 .debug_info 0000e347 00000000 00000000 0002004d 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_abbrev 00002b1d 00000000 00000000 0002e394 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_aranges 00000bf8 00000000 00000000 00030eb8 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_ranges 00000aa0 00000000 00000000 00031ab0 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_macro 0001a88f 00000000 00000000 00032550 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_line 0000fdb5 00000000 00000000 0004cddf 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_str 00093ad3 00000000 00000000 0005cb94 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .comment 00000053 00000000 00000000 000f0667 2**0
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CONTENTS, READONLY
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20 .debug_frame 00002e84 00000000 00000000 000f06bc 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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080001e4 <__do_global_dtors_aux>:
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80001e4: b510 push {r4, lr}
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80001e6: 4c05 ldr r4, [pc, #20] ; (80001fc <__do_global_dtors_aux+0x18>)
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80001e8: 7823 ldrb r3, [r4, #0]
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80001ea: b933 cbnz r3, 80001fa <__do_global_dtors_aux+0x16>
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80001ec: 4b04 ldr r3, [pc, #16] ; (8000200 <__do_global_dtors_aux+0x1c>)
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80001ee: b113 cbz r3, 80001f6 <__do_global_dtors_aux+0x12>
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80001f0: 4804 ldr r0, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x20>)
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80001f2: f3af 8000 nop.w
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80001f6: 2301 movs r3, #1
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80001f8: 7023 strb r3, [r4, #0]
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80001fa: bd10 pop {r4, pc}
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80001fc: 20000024 .word 0x20000024
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8000200: 00000000 .word 0x00000000
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8000204: 08005f34 .word 0x08005f34
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08000208 <frame_dummy>:
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8000208: b508 push {r3, lr}
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800020a: 4b03 ldr r3, [pc, #12] ; (8000218 <frame_dummy+0x10>)
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800020c: b11b cbz r3, 8000216 <frame_dummy+0xe>
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800020e: 4903 ldr r1, [pc, #12] ; (800021c <frame_dummy+0x14>)
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8000210: 4803 ldr r0, [pc, #12] ; (8000220 <frame_dummy+0x18>)
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8000212: f3af 8000 nop.w
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8000216: bd08 pop {r3, pc}
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8000218: 00000000 .word 0x00000000
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800021c: 20000028 .word 0x20000028
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8000220: 08005f34 .word 0x08005f34
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08000224 <main>:
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/**
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* @brief The application entry point.
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* @retval int
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*/
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int main(void)
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{
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8000224: b580 push {r7, lr}
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8000226: af00 add r7, sp, #0
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/* USER CODE END 1 */
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/* MCU Configuration--------------------------------------------------------*/
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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HAL_Init();
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8000228: f000 faa8 bl 800077c <HAL_Init>
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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/* Configure the system clock */
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SystemClock_Config();
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800022c: f000 f80b bl 8000246 <SystemClock_Config>
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/* USER CODE BEGIN SysInit */
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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8000230: f000 f884 bl 800033c <MX_GPIO_Init>
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MX_FSMC_Init();
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8000234: f000 f908 bl 8000448 <MX_FSMC_Init>
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MX_SPI2_Init();
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8000238: f000 f84a bl 80002d0 <MX_SPI2_Init>
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MX_FATFS_Init();
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800023c: f002 f838 bl 80022b0 <MX_FATFS_Init>
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/* USER CODE BEGIN 2 */
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my_main();
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8000240: f004 fa4e bl 80046e0 <my_main>
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/* USER CODE END 2 */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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while (1)
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8000244: e7fe b.n 8000244 <main+0x20>
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08000246 <SystemClock_Config>:
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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8000246: b580 push {r7, lr}
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8000248: b090 sub sp, #64 ; 0x40
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800024a: af00 add r7, sp, #0
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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800024c: f107 0318 add.w r3, r7, #24
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8000250: 2228 movs r2, #40 ; 0x28
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8000252: 2100 movs r1, #0
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8000254: 4618 mov r0, r3
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8000256: f005 fe65 bl 8005f24 <memset>
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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800025a: 1d3b adds r3, r7, #4
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800025c: 2200 movs r2, #0
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800025e: 601a str r2, [r3, #0]
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8000260: 605a str r2, [r3, #4]
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8000262: 609a str r2, [r3, #8]
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8000264: 60da str r2, [r3, #12]
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8000266: 611a str r2, [r3, #16]
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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8000268: 2301 movs r3, #1
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800026a: 61bb str r3, [r7, #24]
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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800026c: f44f 3380 mov.w r3, #65536 ; 0x10000
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8000270: 61fb str r3, [r7, #28]
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RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
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8000272: 2300 movs r3, #0
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8000274: 623b str r3, [r7, #32]
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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8000276: 2301 movs r3, #1
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8000278: 62bb str r3, [r7, #40] ; 0x28
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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800027a: 2302 movs r3, #2
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800027c: 637b str r3, [r7, #52] ; 0x34
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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800027e: f44f 3380 mov.w r3, #65536 ; 0x10000
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8000282: 63bb str r3, [r7, #56] ; 0x38
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RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
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8000284: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
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8000288: 63fb str r3, [r7, #60] ; 0x3c
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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800028a: f107 0318 add.w r3, r7, #24
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800028e: 4618 mov r0, r3
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8000290: f000 fd8a bl 8000da8 <HAL_RCC_OscConfig>
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8000294: 4603 mov r3, r0
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8000296: 2b00 cmp r3, #0
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8000298: d001 beq.n 800029e <SystemClock_Config+0x58>
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{
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Error_Handler();
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800029a: f000 f939 bl 8000510 <Error_Handler>
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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800029e: 230f movs r3, #15
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80002a0: 607b str r3, [r7, #4]
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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80002a2: 2302 movs r3, #2
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80002a4: 60bb str r3, [r7, #8]
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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80002a6: 2300 movs r3, #0
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80002a8: 60fb str r3, [r7, #12]
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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80002aa: f44f 6380 mov.w r3, #1024 ; 0x400
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80002ae: 613b str r3, [r7, #16]
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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80002b0: 2300 movs r3, #0
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80002b2: 617b str r3, [r7, #20]
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
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80002b4: 1d3b adds r3, r7, #4
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80002b6: 2102 movs r1, #2
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80002b8: 4618 mov r0, r3
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80002ba: f000 fff5 bl 80012a8 <HAL_RCC_ClockConfig>
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80002be: 4603 mov r3, r0
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80002c0: 2b00 cmp r3, #0
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80002c2: d001 beq.n 80002c8 <SystemClock_Config+0x82>
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{
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Error_Handler();
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80002c4: f000 f924 bl 8000510 <Error_Handler>
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}
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}
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80002c8: bf00 nop
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80002ca: 3740 adds r7, #64 ; 0x40
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80002cc: 46bd mov sp, r7
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80002ce: bd80 pop {r7, pc}
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080002d0 <MX_SPI2_Init>:
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* @brief SPI2 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_SPI2_Init(void)
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{
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80002d0: b580 push {r7, lr}
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80002d2: af00 add r7, sp, #0
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/* USER CODE BEGIN SPI2_Init 1 */
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/* USER CODE END SPI2_Init 1 */
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/* SPI2 parameter configuration*/
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hspi2.Instance = SPI2;
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80002d4: 4b17 ldr r3, [pc, #92] ; (8000334 <MX_SPI2_Init+0x64>)
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80002d6: 4a18 ldr r2, [pc, #96] ; (8000338 <MX_SPI2_Init+0x68>)
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80002d8: 601a str r2, [r3, #0]
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hspi2.Init.Mode = SPI_MODE_MASTER;
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80002da: 4b16 ldr r3, [pc, #88] ; (8000334 <MX_SPI2_Init+0x64>)
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80002dc: f44f 7282 mov.w r2, #260 ; 0x104
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80002e0: 605a str r2, [r3, #4]
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hspi2.Init.Direction = SPI_DIRECTION_2LINES;
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80002e2: 4b14 ldr r3, [pc, #80] ; (8000334 <MX_SPI2_Init+0x64>)
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80002e4: 2200 movs r2, #0
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80002e6: 609a str r2, [r3, #8]
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hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
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80002e8: 4b12 ldr r3, [pc, #72] ; (8000334 <MX_SPI2_Init+0x64>)
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80002ea: 2200 movs r2, #0
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80002ec: 60da str r2, [r3, #12]
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hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
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80002ee: 4b11 ldr r3, [pc, #68] ; (8000334 <MX_SPI2_Init+0x64>)
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80002f0: 2200 movs r2, #0
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80002f2: 611a str r2, [r3, #16]
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hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
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80002f4: 4b0f ldr r3, [pc, #60] ; (8000334 <MX_SPI2_Init+0x64>)
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80002f6: 2200 movs r2, #0
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80002f8: 615a str r2, [r3, #20]
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hspi2.Init.NSS = SPI_NSS_SOFT;
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80002fa: 4b0e ldr r3, [pc, #56] ; (8000334 <MX_SPI2_Init+0x64>)
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80002fc: f44f 7200 mov.w r2, #512 ; 0x200
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8000300: 619a str r2, [r3, #24]
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hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
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8000302: 4b0c ldr r3, [pc, #48] ; (8000334 <MX_SPI2_Init+0x64>)
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8000304: 2200 movs r2, #0
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8000306: 61da str r2, [r3, #28]
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hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
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8000308: 4b0a ldr r3, [pc, #40] ; (8000334 <MX_SPI2_Init+0x64>)
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800030a: 2200 movs r2, #0
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800030c: 621a str r2, [r3, #32]
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hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
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800030e: 4b09 ldr r3, [pc, #36] ; (8000334 <MX_SPI2_Init+0x64>)
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8000310: 2200 movs r2, #0
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8000312: 625a str r2, [r3, #36] ; 0x24
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hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
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8000314: 4b07 ldr r3, [pc, #28] ; (8000334 <MX_SPI2_Init+0x64>)
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8000316: 2200 movs r2, #0
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8000318: 629a str r2, [r3, #40] ; 0x28
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hspi2.Init.CRCPolynomial = 10;
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800031a: 4b06 ldr r3, [pc, #24] ; (8000334 <MX_SPI2_Init+0x64>)
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800031c: 220a movs r2, #10
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800031e: 62da str r2, [r3, #44] ; 0x2c
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if (HAL_SPI_Init(&hspi2) != HAL_OK)
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8000320: 4804 ldr r0, [pc, #16] ; (8000334 <MX_SPI2_Init+0x64>)
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8000322: f001 f929 bl 8001578 <HAL_SPI_Init>
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8000326: 4603 mov r3, r0
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8000328: 2b00 cmp r3, #0
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800032a: d001 beq.n 8000330 <MX_SPI2_Init+0x60>
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{
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Error_Handler();
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800032c: f000 f8f0 bl 8000510 <Error_Handler>
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}
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/* USER CODE BEGIN SPI2_Init 2 */
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/* USER CODE END SPI2_Init 2 */
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}
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8000330: bf00 nop
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8000332: bd80 pop {r7, pc}
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8000334: 20000074 .word 0x20000074
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8000338: 40003800 .word 0x40003800
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0800033c <MX_GPIO_Init>:
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* @brief GPIO Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_GPIO_Init(void)
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{
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800033c: b580 push {r7, lr}
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800033e: b08a sub sp, #40 ; 0x28
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8000340: af00 add r7, sp, #0
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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8000342: f107 0318 add.w r3, r7, #24
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8000346: 2200 movs r2, #0
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8000348: 601a str r2, [r3, #0]
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800034a: 605a str r2, [r3, #4]
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800034c: 609a str r2, [r3, #8]
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800034e: 60da str r2, [r3, #12]
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/* GPIO Ports Clock Enable */
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__HAL_RCC_GPIOB_CLK_ENABLE();
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8000350: 4b3a ldr r3, [pc, #232] ; (800043c <MX_GPIO_Init+0x100>)
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8000352: 699b ldr r3, [r3, #24]
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8000354: 4a39 ldr r2, [pc, #228] ; (800043c <MX_GPIO_Init+0x100>)
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8000356: f043 0308 orr.w r3, r3, #8
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800035a: 6193 str r3, [r2, #24]
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800035c: 4b37 ldr r3, [pc, #220] ; (800043c <MX_GPIO_Init+0x100>)
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800035e: 699b ldr r3, [r3, #24]
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8000360: f003 0308 and.w r3, r3, #8
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8000364: 617b str r3, [r7, #20]
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8000366: 697b ldr r3, [r7, #20]
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__HAL_RCC_GPIOG_CLK_ENABLE();
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8000368: 4b34 ldr r3, [pc, #208] ; (800043c <MX_GPIO_Init+0x100>)
|
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800036a: 699b ldr r3, [r3, #24]
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800036c: 4a33 ldr r2, [pc, #204] ; (800043c <MX_GPIO_Init+0x100>)
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800036e: f443 7380 orr.w r3, r3, #256 ; 0x100
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8000372: 6193 str r3, [r2, #24]
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8000374: 4b31 ldr r3, [pc, #196] ; (800043c <MX_GPIO_Init+0x100>)
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8000376: 699b ldr r3, [r3, #24]
|
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8000378: f403 7380 and.w r3, r3, #256 ; 0x100
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800037c: 613b str r3, [r7, #16]
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800037e: 693b ldr r3, [r7, #16]
|
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__HAL_RCC_GPIOE_CLK_ENABLE();
|
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8000380: 4b2e ldr r3, [pc, #184] ; (800043c <MX_GPIO_Init+0x100>)
|
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8000382: 699b ldr r3, [r3, #24]
|
||
8000384: 4a2d ldr r2, [pc, #180] ; (800043c <MX_GPIO_Init+0x100>)
|
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8000386: f043 0340 orr.w r3, r3, #64 ; 0x40
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800038a: 6193 str r3, [r2, #24]
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800038c: 4b2b ldr r3, [pc, #172] ; (800043c <MX_GPIO_Init+0x100>)
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800038e: 699b ldr r3, [r3, #24]
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8000390: f003 0340 and.w r3, r3, #64 ; 0x40
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8000394: 60fb str r3, [r7, #12]
|
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8000396: 68fb ldr r3, [r7, #12]
|
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__HAL_RCC_GPIOD_CLK_ENABLE();
|
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8000398: 4b28 ldr r3, [pc, #160] ; (800043c <MX_GPIO_Init+0x100>)
|
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800039a: 699b ldr r3, [r3, #24]
|
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800039c: 4a27 ldr r2, [pc, #156] ; (800043c <MX_GPIO_Init+0x100>)
|
||
800039e: f043 0320 orr.w r3, r3, #32
|
||
80003a2: 6193 str r3, [r2, #24]
|
||
80003a4: 4b25 ldr r3, [pc, #148] ; (800043c <MX_GPIO_Init+0x100>)
|
||
80003a6: 699b ldr r3, [r3, #24]
|
||
80003a8: f003 0320 and.w r3, r3, #32
|
||
80003ac: 60bb str r3, [r7, #8]
|
||
80003ae: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||
80003b0: 4b22 ldr r3, [pc, #136] ; (800043c <MX_GPIO_Init+0x100>)
|
||
80003b2: 699b ldr r3, [r3, #24]
|
||
80003b4: 4a21 ldr r2, [pc, #132] ; (800043c <MX_GPIO_Init+0x100>)
|
||
80003b6: f043 0304 orr.w r3, r3, #4
|
||
80003ba: 6193 str r3, [r2, #24]
|
||
80003bc: 4b1f ldr r3, [pc, #124] ; (800043c <MX_GPIO_Init+0x100>)
|
||
80003be: 699b ldr r3, [r3, #24]
|
||
80003c0: f003 0304 and.w r3, r3, #4
|
||
80003c4: 607b str r3, [r7, #4]
|
||
80003c6: 687b ldr r3, [r7, #4]
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(GPIOB, LCD_BL_Pin|FLASH_E_Pin, GPIO_PIN_RESET);
|
||
80003c8: 2200 movs r2, #0
|
||
80003ca: f241 0101 movw r1, #4097 ; 0x1001
|
||
80003ce: 481c ldr r0, [pc, #112] ; (8000440 <MX_GPIO_Init+0x104>)
|
||
80003d0: f000 fcd2 bl 8000d78 <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(SD_E_GPIO_Port, SD_E_Pin, GPIO_PIN_RESET);
|
||
80003d4: 2200 movs r2, #0
|
||
80003d6: 2104 movs r1, #4
|
||
80003d8: 481a ldr r0, [pc, #104] ; (8000444 <MX_GPIO_Init+0x108>)
|
||
80003da: f000 fccd bl 8000d78 <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin : LCD_BL_Pin */
|
||
GPIO_InitStruct.Pin = LCD_BL_Pin;
|
||
80003de: 2301 movs r3, #1
|
||
80003e0: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
80003e2: 2301 movs r3, #1
|
||
80003e4: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
80003e6: 2300 movs r3, #0
|
||
80003e8: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||
80003ea: 2302 movs r3, #2
|
||
80003ec: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct);
|
||
80003ee: f107 0318 add.w r3, r7, #24
|
||
80003f2: 4619 mov r1, r3
|
||
80003f4: 4812 ldr r0, [pc, #72] ; (8000440 <MX_GPIO_Init+0x104>)
|
||
80003f6: f000 fb2b bl 8000a50 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : FLASH_E_Pin */
|
||
GPIO_InitStruct.Pin = FLASH_E_Pin;
|
||
80003fa: f44f 5380 mov.w r3, #4096 ; 0x1000
|
||
80003fe: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
8000400: 2301 movs r3, #1
|
||
8000402: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
8000404: 2300 movs r3, #0
|
||
8000406: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8000408: 2303 movs r3, #3
|
||
800040a: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(FLASH_E_GPIO_Port, &GPIO_InitStruct);
|
||
800040c: f107 0318 add.w r3, r7, #24
|
||
8000410: 4619 mov r1, r3
|
||
8000412: 480b ldr r0, [pc, #44] ; (8000440 <MX_GPIO_Init+0x104>)
|
||
8000414: f000 fb1c bl 8000a50 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : SD_E_Pin */
|
||
GPIO_InitStruct.Pin = SD_E_Pin;
|
||
8000418: 2304 movs r3, #4
|
||
800041a: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
800041c: 2301 movs r3, #1
|
||
800041e: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
8000420: 2300 movs r3, #0
|
||
8000422: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8000424: 2303 movs r3, #3
|
||
8000426: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(SD_E_GPIO_Port, &GPIO_InitStruct);
|
||
8000428: f107 0318 add.w r3, r7, #24
|
||
800042c: 4619 mov r1, r3
|
||
800042e: 4805 ldr r0, [pc, #20] ; (8000444 <MX_GPIO_Init+0x108>)
|
||
8000430: f000 fb0e bl 8000a50 <HAL_GPIO_Init>
|
||
|
||
}
|
||
8000434: bf00 nop
|
||
8000436: 3728 adds r7, #40 ; 0x28
|
||
8000438: 46bd mov sp, r7
|
||
800043a: bd80 pop {r7, pc}
|
||
800043c: 40021000 .word 0x40021000
|
||
8000440: 40010c00 .word 0x40010c00
|
||
8000444: 40011400 .word 0x40011400
|
||
|
||
08000448 <MX_FSMC_Init>:
|
||
|
||
/* FSMC initialization function */
|
||
static void MX_FSMC_Init(void)
|
||
{
|
||
8000448: b580 push {r7, lr}
|
||
800044a: b088 sub sp, #32
|
||
800044c: af00 add r7, sp, #0
|
||
|
||
/* USER CODE BEGIN FSMC_Init 0 */
|
||
|
||
/* USER CODE END FSMC_Init 0 */
|
||
|
||
FSMC_NORSRAM_TimingTypeDef Timing = {0};
|
||
800044e: 1d3b adds r3, r7, #4
|
||
8000450: 2200 movs r2, #0
|
||
8000452: 601a str r2, [r3, #0]
|
||
8000454: 605a str r2, [r3, #4]
|
||
8000456: 609a str r2, [r3, #8]
|
||
8000458: 60da str r2, [r3, #12]
|
||
800045a: 611a str r2, [r3, #16]
|
||
800045c: 615a str r2, [r3, #20]
|
||
800045e: 619a str r2, [r3, #24]
|
||
|
||
/* USER CODE END FSMC_Init 1 */
|
||
|
||
/** Perform the SRAM1 memory initialization sequence
|
||
*/
|
||
hsram1.Instance = FSMC_NORSRAM_DEVICE;
|
||
8000460: 4b28 ldr r3, [pc, #160] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
8000462: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000
|
||
8000466: 601a str r2, [r3, #0]
|
||
hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
|
||
8000468: 4b26 ldr r3, [pc, #152] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
800046a: 4a27 ldr r2, [pc, #156] ; (8000508 <MX_FSMC_Init+0xc0>)
|
||
800046c: 605a str r2, [r3, #4]
|
||
/* hsram1.Init */
|
||
hsram1.Init.NSBank = FSMC_NORSRAM_BANK4;
|
||
800046e: 4b25 ldr r3, [pc, #148] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
8000470: 2206 movs r2, #6
|
||
8000472: 609a str r2, [r3, #8]
|
||
hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
|
||
8000474: 4b23 ldr r3, [pc, #140] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
8000476: 2200 movs r2, #0
|
||
8000478: 60da str r2, [r3, #12]
|
||
hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
|
||
800047a: 4b22 ldr r3, [pc, #136] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
800047c: 2200 movs r2, #0
|
||
800047e: 611a str r2, [r3, #16]
|
||
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
|
||
8000480: 4b20 ldr r3, [pc, #128] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
8000482: 2210 movs r2, #16
|
||
8000484: 615a str r2, [r3, #20]
|
||
hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
|
||
8000486: 4b1f ldr r3, [pc, #124] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
8000488: 2200 movs r2, #0
|
||
800048a: 619a str r2, [r3, #24]
|
||
hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
|
||
800048c: 4b1d ldr r3, [pc, #116] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
800048e: 2200 movs r2, #0
|
||
8000490: 61da str r2, [r3, #28]
|
||
hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
|
||
8000492: 4b1c ldr r3, [pc, #112] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
8000494: 2200 movs r2, #0
|
||
8000496: 621a str r2, [r3, #32]
|
||
hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
|
||
8000498: 4b1a ldr r3, [pc, #104] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
800049a: 2200 movs r2, #0
|
||
800049c: 625a str r2, [r3, #36] ; 0x24
|
||
hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
|
||
800049e: 4b19 ldr r3, [pc, #100] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
80004a0: f44f 5280 mov.w r2, #4096 ; 0x1000
|
||
80004a4: 629a str r2, [r3, #40] ; 0x28
|
||
hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
|
||
80004a6: 4b17 ldr r3, [pc, #92] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
80004a8: 2200 movs r2, #0
|
||
80004aa: 62da str r2, [r3, #44] ; 0x2c
|
||
hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
|
||
80004ac: 4b15 ldr r3, [pc, #84] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
80004ae: 2200 movs r2, #0
|
||
80004b0: 631a str r2, [r3, #48] ; 0x30
|
||
hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
|
||
80004b2: 4b14 ldr r3, [pc, #80] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
80004b4: 2200 movs r2, #0
|
||
80004b6: 635a str r2, [r3, #52] ; 0x34
|
||
hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
|
||
80004b8: 4b12 ldr r3, [pc, #72] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
80004ba: 2200 movs r2, #0
|
||
80004bc: 639a str r2, [r3, #56] ; 0x38
|
||
/* Timing */
|
||
Timing.AddressSetupTime = 0;
|
||
80004be: 2300 movs r3, #0
|
||
80004c0: 607b str r3, [r7, #4]
|
||
Timing.AddressHoldTime = 15;
|
||
80004c2: 230f movs r3, #15
|
||
80004c4: 60bb str r3, [r7, #8]
|
||
Timing.DataSetupTime = 1;
|
||
80004c6: 2301 movs r3, #1
|
||
80004c8: 60fb str r3, [r7, #12]
|
||
Timing.BusTurnAroundDuration = 15;
|
||
80004ca: 230f movs r3, #15
|
||
80004cc: 613b str r3, [r7, #16]
|
||
Timing.CLKDivision = 16;
|
||
80004ce: 2310 movs r3, #16
|
||
80004d0: 617b str r3, [r7, #20]
|
||
Timing.DataLatency = 17;
|
||
80004d2: 2311 movs r3, #17
|
||
80004d4: 61bb str r3, [r7, #24]
|
||
Timing.AccessMode = FSMC_ACCESS_MODE_A;
|
||
80004d6: 2300 movs r3, #0
|
||
80004d8: 61fb str r3, [r7, #28]
|
||
/* ExtTiming */
|
||
|
||
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
|
||
80004da: 1d3b adds r3, r7, #4
|
||
80004dc: 2200 movs r2, #0
|
||
80004de: 4619 mov r1, r3
|
||
80004e0: 4808 ldr r0, [pc, #32] ; (8000504 <MX_FSMC_Init+0xbc>)
|
||
80004e2: f001 fdc1 bl 8002068 <HAL_SRAM_Init>
|
||
80004e6: 4603 mov r3, r0
|
||
80004e8: 2b00 cmp r3, #0
|
||
80004ea: d001 beq.n 80004f0 <MX_FSMC_Init+0xa8>
|
||
{
|
||
Error_Handler( );
|
||
80004ec: f000 f810 bl 8000510 <Error_Handler>
|
||
}
|
||
|
||
/** Disconnect NADV
|
||
*/
|
||
|
||
__HAL_AFIO_FSMCNADV_DISCONNECTED();
|
||
80004f0: 4b06 ldr r3, [pc, #24] ; (800050c <MX_FSMC_Init+0xc4>)
|
||
80004f2: 69db ldr r3, [r3, #28]
|
||
80004f4: 4a05 ldr r2, [pc, #20] ; (800050c <MX_FSMC_Init+0xc4>)
|
||
80004f6: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
80004fa: 61d3 str r3, [r2, #28]
|
||
|
||
/* USER CODE BEGIN FSMC_Init 2 */
|
||
|
||
/* USER CODE END FSMC_Init 2 */
|
||
}
|
||
80004fc: bf00 nop
|
||
80004fe: 3720 adds r7, #32
|
||
8000500: 46bd mov sp, r7
|
||
8000502: bd80 pop {r7, pc}
|
||
8000504: 200000cc .word 0x200000cc
|
||
8000508: a0000104 .word 0xa0000104
|
||
800050c: 40010000 .word 0x40010000
|
||
|
||
08000510 <Error_Handler>:
|
||
/**
|
||
* @brief This function is executed in case of error occurrence.
|
||
* @retval None
|
||
*/
|
||
void Error_Handler(void)
|
||
{
|
||
8000510: b480 push {r7}
|
||
8000512: af00 add r7, sp, #0
|
||
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||
Can only be executed in Privileged modes.
|
||
*/
|
||
__STATIC_FORCEINLINE void __disable_irq(void)
|
||
{
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
8000514: b672 cpsid i
|
||
}
|
||
8000516: bf00 nop
|
||
/* USER CODE BEGIN Error_Handler_Debug */
|
||
/* User can add his own implementation to report the HAL error return state */
|
||
__disable_irq();
|
||
while (1)
|
||
8000518: e7fe b.n 8000518 <Error_Handler+0x8>
|
||
...
|
||
|
||
0800051c <HAL_MspInit>:
|
||
/* USER CODE END 0 */
|
||
/**
|
||
* Initializes the Global MSP.
|
||
*/
|
||
void HAL_MspInit(void)
|
||
{
|
||
800051c: b480 push {r7}
|
||
800051e: b085 sub sp, #20
|
||
8000520: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MspInit 0 */
|
||
|
||
/* USER CODE END MspInit 0 */
|
||
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
8000522: 4b15 ldr r3, [pc, #84] ; (8000578 <HAL_MspInit+0x5c>)
|
||
8000524: 699b ldr r3, [r3, #24]
|
||
8000526: 4a14 ldr r2, [pc, #80] ; (8000578 <HAL_MspInit+0x5c>)
|
||
8000528: f043 0301 orr.w r3, r3, #1
|
||
800052c: 6193 str r3, [r2, #24]
|
||
800052e: 4b12 ldr r3, [pc, #72] ; (8000578 <HAL_MspInit+0x5c>)
|
||
8000530: 699b ldr r3, [r3, #24]
|
||
8000532: f003 0301 and.w r3, r3, #1
|
||
8000536: 60bb str r3, [r7, #8]
|
||
8000538: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
800053a: 4b0f ldr r3, [pc, #60] ; (8000578 <HAL_MspInit+0x5c>)
|
||
800053c: 69db ldr r3, [r3, #28]
|
||
800053e: 4a0e ldr r2, [pc, #56] ; (8000578 <HAL_MspInit+0x5c>)
|
||
8000540: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
8000544: 61d3 str r3, [r2, #28]
|
||
8000546: 4b0c ldr r3, [pc, #48] ; (8000578 <HAL_MspInit+0x5c>)
|
||
8000548: 69db ldr r3, [r3, #28]
|
||
800054a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
800054e: 607b str r3, [r7, #4]
|
||
8000550: 687b ldr r3, [r7, #4]
|
||
|
||
/* System interrupt init*/
|
||
|
||
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
|
||
*/
|
||
__HAL_AFIO_REMAP_SWJ_NOJTAG();
|
||
8000552: 4b0a ldr r3, [pc, #40] ; (800057c <HAL_MspInit+0x60>)
|
||
8000554: 685b ldr r3, [r3, #4]
|
||
8000556: 60fb str r3, [r7, #12]
|
||
8000558: 68fb ldr r3, [r7, #12]
|
||
800055a: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
|
||
800055e: 60fb str r3, [r7, #12]
|
||
8000560: 68fb ldr r3, [r7, #12]
|
||
8000562: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000
|
||
8000566: 60fb str r3, [r7, #12]
|
||
8000568: 4a04 ldr r2, [pc, #16] ; (800057c <HAL_MspInit+0x60>)
|
||
800056a: 68fb ldr r3, [r7, #12]
|
||
800056c: 6053 str r3, [r2, #4]
|
||
|
||
/* USER CODE BEGIN MspInit 1 */
|
||
|
||
/* USER CODE END MspInit 1 */
|
||
}
|
||
800056e: bf00 nop
|
||
8000570: 3714 adds r7, #20
|
||
8000572: 46bd mov sp, r7
|
||
8000574: bc80 pop {r7}
|
||
8000576: 4770 bx lr
|
||
8000578: 40021000 .word 0x40021000
|
||
800057c: 40010000 .word 0x40010000
|
||
|
||
08000580 <HAL_SPI_MspInit>:
|
||
* This function configures the hardware resources used in this example
|
||
* @param hspi: SPI handle pointer
|
||
* @retval None
|
||
*/
|
||
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
||
{
|
||
8000580: b580 push {r7, lr}
|
||
8000582: b088 sub sp, #32
|
||
8000584: af00 add r7, sp, #0
|
||
8000586: 6078 str r0, [r7, #4]
|
||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||
8000588: f107 0310 add.w r3, r7, #16
|
||
800058c: 2200 movs r2, #0
|
||
800058e: 601a str r2, [r3, #0]
|
||
8000590: 605a str r2, [r3, #4]
|
||
8000592: 609a str r2, [r3, #8]
|
||
8000594: 60da str r2, [r3, #12]
|
||
if(hspi->Instance==SPI2)
|
||
8000596: 687b ldr r3, [r7, #4]
|
||
8000598: 681b ldr r3, [r3, #0]
|
||
800059a: 4a1c ldr r2, [pc, #112] ; (800060c <HAL_SPI_MspInit+0x8c>)
|
||
800059c: 4293 cmp r3, r2
|
||
800059e: d131 bne.n 8000604 <HAL_SPI_MspInit+0x84>
|
||
{
|
||
/* USER CODE BEGIN SPI2_MspInit 0 */
|
||
|
||
/* USER CODE END SPI2_MspInit 0 */
|
||
/* Peripheral clock enable */
|
||
__HAL_RCC_SPI2_CLK_ENABLE();
|
||
80005a0: 4b1b ldr r3, [pc, #108] ; (8000610 <HAL_SPI_MspInit+0x90>)
|
||
80005a2: 69db ldr r3, [r3, #28]
|
||
80005a4: 4a1a ldr r2, [pc, #104] ; (8000610 <HAL_SPI_MspInit+0x90>)
|
||
80005a6: f443 4380 orr.w r3, r3, #16384 ; 0x4000
|
||
80005aa: 61d3 str r3, [r2, #28]
|
||
80005ac: 4b18 ldr r3, [pc, #96] ; (8000610 <HAL_SPI_MspInit+0x90>)
|
||
80005ae: 69db ldr r3, [r3, #28]
|
||
80005b0: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
||
80005b4: 60fb str r3, [r7, #12]
|
||
80005b6: 68fb ldr r3, [r7, #12]
|
||
|
||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||
80005b8: 4b15 ldr r3, [pc, #84] ; (8000610 <HAL_SPI_MspInit+0x90>)
|
||
80005ba: 699b ldr r3, [r3, #24]
|
||
80005bc: 4a14 ldr r2, [pc, #80] ; (8000610 <HAL_SPI_MspInit+0x90>)
|
||
80005be: f043 0308 orr.w r3, r3, #8
|
||
80005c2: 6193 str r3, [r2, #24]
|
||
80005c4: 4b12 ldr r3, [pc, #72] ; (8000610 <HAL_SPI_MspInit+0x90>)
|
||
80005c6: 699b ldr r3, [r3, #24]
|
||
80005c8: f003 0308 and.w r3, r3, #8
|
||
80005cc: 60bb str r3, [r7, #8]
|
||
80005ce: 68bb ldr r3, [r7, #8]
|
||
/**SPI2 GPIO Configuration
|
||
PB13 ------> SPI2_SCK
|
||
PB14 ------> SPI2_MISO
|
||
PB15 ------> SPI2_MOSI
|
||
*/
|
||
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15;
|
||
80005d0: f44f 4320 mov.w r3, #40960 ; 0xa000
|
||
80005d4: 613b str r3, [r7, #16]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
80005d6: 2302 movs r3, #2
|
||
80005d8: 617b str r3, [r7, #20]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
80005da: 2303 movs r3, #3
|
||
80005dc: 61fb str r3, [r7, #28]
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
80005de: f107 0310 add.w r3, r7, #16
|
||
80005e2: 4619 mov r1, r3
|
||
80005e4: 480b ldr r0, [pc, #44] ; (8000614 <HAL_SPI_MspInit+0x94>)
|
||
80005e6: f000 fa33 bl 8000a50 <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_14;
|
||
80005ea: f44f 4380 mov.w r3, #16384 ; 0x4000
|
||
80005ee: 613b str r3, [r7, #16]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||
80005f0: 2300 movs r3, #0
|
||
80005f2: 617b str r3, [r7, #20]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
80005f4: 2300 movs r3, #0
|
||
80005f6: 61bb str r3, [r7, #24]
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
80005f8: f107 0310 add.w r3, r7, #16
|
||
80005fc: 4619 mov r1, r3
|
||
80005fe: 4805 ldr r0, [pc, #20] ; (8000614 <HAL_SPI_MspInit+0x94>)
|
||
8000600: f000 fa26 bl 8000a50 <HAL_GPIO_Init>
|
||
/* USER CODE BEGIN SPI2_MspInit 1 */
|
||
|
||
/* USER CODE END SPI2_MspInit 1 */
|
||
}
|
||
|
||
}
|
||
8000604: bf00 nop
|
||
8000606: 3720 adds r7, #32
|
||
8000608: 46bd mov sp, r7
|
||
800060a: bd80 pop {r7, pc}
|
||
800060c: 40003800 .word 0x40003800
|
||
8000610: 40021000 .word 0x40021000
|
||
8000614: 40010c00 .word 0x40010c00
|
||
|
||
08000618 <HAL_FSMC_MspInit>:
|
||
|
||
}
|
||
|
||
static uint32_t FSMC_Initialized = 0;
|
||
|
||
static void HAL_FSMC_MspInit(void){
|
||
8000618: b580 push {r7, lr}
|
||
800061a: b086 sub sp, #24
|
||
800061c: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN FSMC_MspInit 0 */
|
||
|
||
/* USER CODE END FSMC_MspInit 0 */
|
||
GPIO_InitTypeDef GPIO_InitStruct ={0};
|
||
800061e: f107 0308 add.w r3, r7, #8
|
||
8000622: 2200 movs r2, #0
|
||
8000624: 601a str r2, [r3, #0]
|
||
8000626: 605a str r2, [r3, #4]
|
||
8000628: 609a str r2, [r3, #8]
|
||
800062a: 60da str r2, [r3, #12]
|
||
if (FSMC_Initialized) {
|
||
800062c: 4b1f ldr r3, [pc, #124] ; (80006ac <HAL_FSMC_MspInit+0x94>)
|
||
800062e: 681b ldr r3, [r3, #0]
|
||
8000630: 2b00 cmp r3, #0
|
||
8000632: d136 bne.n 80006a2 <HAL_FSMC_MspInit+0x8a>
|
||
return;
|
||
}
|
||
FSMC_Initialized = 1;
|
||
8000634: 4b1d ldr r3, [pc, #116] ; (80006ac <HAL_FSMC_MspInit+0x94>)
|
||
8000636: 2201 movs r2, #1
|
||
8000638: 601a str r2, [r3, #0]
|
||
|
||
/* Peripheral clock enable */
|
||
__HAL_RCC_FSMC_CLK_ENABLE();
|
||
800063a: 4b1d ldr r3, [pc, #116] ; (80006b0 <HAL_FSMC_MspInit+0x98>)
|
||
800063c: 695b ldr r3, [r3, #20]
|
||
800063e: 4a1c ldr r2, [pc, #112] ; (80006b0 <HAL_FSMC_MspInit+0x98>)
|
||
8000640: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
8000644: 6153 str r3, [r2, #20]
|
||
8000646: 4b1a ldr r3, [pc, #104] ; (80006b0 <HAL_FSMC_MspInit+0x98>)
|
||
8000648: 695b ldr r3, [r3, #20]
|
||
800064a: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
800064e: 607b str r3, [r7, #4]
|
||
8000650: 687b ldr r3, [r7, #4]
|
||
PD1 ------> FSMC_D3
|
||
PD4 ------> FSMC_NOE
|
||
PD5 ------> FSMC_NWE
|
||
PG12 ------> FSMC_NE4
|
||
*/
|
||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12;
|
||
8000652: f241 0301 movw r3, #4097 ; 0x1001
|
||
8000656: 60bb str r3, [r7, #8]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
8000658: 2302 movs r3, #2
|
||
800065a: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
800065c: 2303 movs r3, #3
|
||
800065e: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||
8000660: f107 0308 add.w r3, r7, #8
|
||
8000664: 4619 mov r1, r3
|
||
8000666: 4813 ldr r0, [pc, #76] ; (80006b4 <HAL_FSMC_MspInit+0x9c>)
|
||
8000668: f000 f9f2 bl 8000a50 <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|
||
800066c: f64f 7380 movw r3, #65408 ; 0xff80
|
||
8000670: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
||
|GPIO_PIN_15;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
8000672: 2302 movs r3, #2
|
||
8000674: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8000676: 2303 movs r3, #3
|
||
8000678: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||
800067a: f107 0308 add.w r3, r7, #8
|
||
800067e: 4619 mov r1, r3
|
||
8000680: 480d ldr r0, [pc, #52] ; (80006b8 <HAL_FSMC_MspInit+0xa0>)
|
||
8000682: f000 f9e5 bl 8000a50 <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
|
||
8000686: f24c 7333 movw r3, #50995 ; 0xc733
|
||
800068a: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4
|
||
|GPIO_PIN_5;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
800068c: 2302 movs r3, #2
|
||
800068e: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8000690: 2303 movs r3, #3
|
||
8000692: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||
8000694: f107 0308 add.w r3, r7, #8
|
||
8000698: 4619 mov r1, r3
|
||
800069a: 4808 ldr r0, [pc, #32] ; (80006bc <HAL_FSMC_MspInit+0xa4>)
|
||
800069c: f000 f9d8 bl 8000a50 <HAL_GPIO_Init>
|
||
80006a0: e000 b.n 80006a4 <HAL_FSMC_MspInit+0x8c>
|
||
return;
|
||
80006a2: bf00 nop
|
||
|
||
/* USER CODE BEGIN FSMC_MspInit 1 */
|
||
|
||
/* USER CODE END FSMC_MspInit 1 */
|
||
}
|
||
80006a4: 3718 adds r7, #24
|
||
80006a6: 46bd mov sp, r7
|
||
80006a8: bd80 pop {r7, pc}
|
||
80006aa: bf00 nop
|
||
80006ac: 20000040 .word 0x20000040
|
||
80006b0: 40021000 .word 0x40021000
|
||
80006b4: 40012000 .word 0x40012000
|
||
80006b8: 40011800 .word 0x40011800
|
||
80006bc: 40011400 .word 0x40011400
|
||
|
||
080006c0 <HAL_SRAM_MspInit>:
|
||
|
||
void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
|
||
80006c0: b580 push {r7, lr}
|
||
80006c2: b082 sub sp, #8
|
||
80006c4: af00 add r7, sp, #0
|
||
80006c6: 6078 str r0, [r7, #4]
|
||
/* USER CODE BEGIN SRAM_MspInit 0 */
|
||
|
||
/* USER CODE END SRAM_MspInit 0 */
|
||
HAL_FSMC_MspInit();
|
||
80006c8: f7ff ffa6 bl 8000618 <HAL_FSMC_MspInit>
|
||
/* USER CODE BEGIN SRAM_MspInit 1 */
|
||
|
||
/* USER CODE END SRAM_MspInit 1 */
|
||
}
|
||
80006cc: bf00 nop
|
||
80006ce: 3708 adds r7, #8
|
||
80006d0: 46bd mov sp, r7
|
||
80006d2: bd80 pop {r7, pc}
|
||
|
||
080006d4 <NMI_Handler>:
|
||
/******************************************************************************/
|
||
/**
|
||
* @brief This function handles Non maskable interrupt.
|
||
*/
|
||
void NMI_Handler(void)
|
||
{
|
||
80006d4: b480 push {r7}
|
||
80006d6: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||
|
||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||
while (1)
|
||
80006d8: e7fe b.n 80006d8 <NMI_Handler+0x4>
|
||
|
||
080006da <HardFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Hard fault interrupt.
|
||
*/
|
||
void HardFault_Handler(void)
|
||
{
|
||
80006da: b480 push {r7}
|
||
80006dc: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||
|
||
/* USER CODE END HardFault_IRQn 0 */
|
||
while (1)
|
||
80006de: e7fe b.n 80006de <HardFault_Handler+0x4>
|
||
|
||
080006e0 <MemManage_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Memory management fault.
|
||
*/
|
||
void MemManage_Handler(void)
|
||
{
|
||
80006e0: b480 push {r7}
|
||
80006e2: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||
|
||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||
while (1)
|
||
80006e4: e7fe b.n 80006e4 <MemManage_Handler+0x4>
|
||
|
||
080006e6 <BusFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Prefetch fault, memory access fault.
|
||
*/
|
||
void BusFault_Handler(void)
|
||
{
|
||
80006e6: b480 push {r7}
|
||
80006e8: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||
|
||
/* USER CODE END BusFault_IRQn 0 */
|
||
while (1)
|
||
80006ea: e7fe b.n 80006ea <BusFault_Handler+0x4>
|
||
|
||
080006ec <UsageFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Undefined instruction or illegal state.
|
||
*/
|
||
void UsageFault_Handler(void)
|
||
{
|
||
80006ec: b480 push {r7}
|
||
80006ee: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||
|
||
/* USER CODE END UsageFault_IRQn 0 */
|
||
while (1)
|
||
80006f0: e7fe b.n 80006f0 <UsageFault_Handler+0x4>
|
||
|
||
080006f2 <SVC_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System service call via SWI instruction.
|
||
*/
|
||
void SVC_Handler(void)
|
||
{
|
||
80006f2: b480 push {r7}
|
||
80006f4: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END SVCall_IRQn 0 */
|
||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||
|
||
/* USER CODE END SVCall_IRQn 1 */
|
||
}
|
||
80006f6: bf00 nop
|
||
80006f8: 46bd mov sp, r7
|
||
80006fa: bc80 pop {r7}
|
||
80006fc: 4770 bx lr
|
||
|
||
080006fe <DebugMon_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Debug monitor.
|
||
*/
|
||
void DebugMon_Handler(void)
|
||
{
|
||
80006fe: b480 push {r7}
|
||
8000700: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||
}
|
||
8000702: bf00 nop
|
||
8000704: 46bd mov sp, r7
|
||
8000706: bc80 pop {r7}
|
||
8000708: 4770 bx lr
|
||
|
||
0800070a <PendSV_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Pendable request for system service.
|
||
*/
|
||
void PendSV_Handler(void)
|
||
{
|
||
800070a: b480 push {r7}
|
||
800070c: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END PendSV_IRQn 0 */
|
||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||
|
||
/* USER CODE END PendSV_IRQn 1 */
|
||
}
|
||
800070e: bf00 nop
|
||
8000710: 46bd mov sp, r7
|
||
8000712: bc80 pop {r7}
|
||
8000714: 4770 bx lr
|
||
|
||
08000716 <SysTick_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System tick timer.
|
||
*/
|
||
void SysTick_Handler(void)
|
||
{
|
||
8000716: b580 push {r7, lr}
|
||
8000718: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||
|
||
/* USER CODE END SysTick_IRQn 0 */
|
||
HAL_IncTick();
|
||
800071a: f000 f875 bl 8000808 <HAL_IncTick>
|
||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||
|
||
/* USER CODE END SysTick_IRQn 1 */
|
||
}
|
||
800071e: bf00 nop
|
||
8000720: bd80 pop {r7, pc}
|
||
|
||
08000722 <SystemInit>:
|
||
* @note This function should be used only after reset.
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
void SystemInit (void)
|
||
{
|
||
8000722: b480 push {r7}
|
||
8000724: af00 add r7, sp, #0
|
||
|
||
/* Configure the Vector Table location -------------------------------------*/
|
||
#if defined(USER_VECT_TAB_ADDRESS)
|
||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||
#endif /* USER_VECT_TAB_ADDRESS */
|
||
}
|
||
8000726: bf00 nop
|
||
8000728: 46bd mov sp, r7
|
||
800072a: bc80 pop {r7}
|
||
800072c: 4770 bx lr
|
||
...
|
||
|
||
08000730 <Reset_Handler>:
|
||
.weak Reset_Handler
|
||
.type Reset_Handler, %function
|
||
Reset_Handler:
|
||
|
||
/* Copy the data segment initializers from flash to SRAM */
|
||
movs r1, #0
|
||
8000730: 2100 movs r1, #0
|
||
b LoopCopyDataInit
|
||
8000732: e003 b.n 800073c <LoopCopyDataInit>
|
||
|
||
08000734 <CopyDataInit>:
|
||
|
||
CopyDataInit:
|
||
ldr r3, =_sidata
|
||
8000734: 4b0b ldr r3, [pc, #44] ; (8000764 <LoopFillZerobss+0x14>)
|
||
ldr r3, [r3, r1]
|
||
8000736: 585b ldr r3, [r3, r1]
|
||
str r3, [r0, r1]
|
||
8000738: 5043 str r3, [r0, r1]
|
||
adds r1, r1, #4
|
||
800073a: 3104 adds r1, #4
|
||
|
||
0800073c <LoopCopyDataInit>:
|
||
|
||
LoopCopyDataInit:
|
||
ldr r0, =_sdata
|
||
800073c: 480a ldr r0, [pc, #40] ; (8000768 <LoopFillZerobss+0x18>)
|
||
ldr r3, =_edata
|
||
800073e: 4b0b ldr r3, [pc, #44] ; (800076c <LoopFillZerobss+0x1c>)
|
||
adds r2, r0, r1
|
||
8000740: 1842 adds r2, r0, r1
|
||
cmp r2, r3
|
||
8000742: 429a cmp r2, r3
|
||
bcc CopyDataInit
|
||
8000744: d3f6 bcc.n 8000734 <CopyDataInit>
|
||
ldr r2, =_sbss
|
||
8000746: 4a0a ldr r2, [pc, #40] ; (8000770 <LoopFillZerobss+0x20>)
|
||
b LoopFillZerobss
|
||
8000748: e002 b.n 8000750 <LoopFillZerobss>
|
||
|
||
0800074a <FillZerobss>:
|
||
/* Zero fill the bss segment. */
|
||
FillZerobss:
|
||
movs r3, #0
|
||
800074a: 2300 movs r3, #0
|
||
str r3, [r2], #4
|
||
800074c: f842 3b04 str.w r3, [r2], #4
|
||
|
||
08000750 <LoopFillZerobss>:
|
||
|
||
LoopFillZerobss:
|
||
ldr r3, = _ebss
|
||
8000750: 4b08 ldr r3, [pc, #32] ; (8000774 <LoopFillZerobss+0x24>)
|
||
cmp r2, r3
|
||
8000752: 429a cmp r2, r3
|
||
bcc FillZerobss
|
||
8000754: d3f9 bcc.n 800074a <FillZerobss>
|
||
|
||
/* Call the clock system intitialization function.*/
|
||
bl SystemInit
|
||
8000756: f7ff ffe4 bl 8000722 <SystemInit>
|
||
/* Call static constructors */
|
||
bl __libc_init_array
|
||
800075a: f005 fbbf bl 8005edc <__libc_init_array>
|
||
/* Call the application's entry point.*/
|
||
bl main
|
||
800075e: f7ff fd61 bl 8000224 <main>
|
||
bx lr
|
||
8000762: 4770 bx lr
|
||
ldr r3, =_sidata
|
||
8000764: 08006ab4 .word 0x08006ab4
|
||
ldr r0, =_sdata
|
||
8000768: 20000000 .word 0x20000000
|
||
ldr r3, =_edata
|
||
800076c: 20000024 .word 0x20000024
|
||
ldr r2, =_sbss
|
||
8000770: 20000024 .word 0x20000024
|
||
ldr r3, = _ebss
|
||
8000774: 200007e0 .word 0x200007e0
|
||
|
||
08000778 <ADC1_2_IRQHandler>:
|
||
* @retval : None
|
||
*/
|
||
.section .text.Default_Handler,"ax",%progbits
|
||
Default_Handler:
|
||
Infinite_Loop:
|
||
b Infinite_Loop
|
||
8000778: e7fe b.n 8000778 <ADC1_2_IRQHandler>
|
||
...
|
||
|
||
0800077c <HAL_Init>:
|
||
* need to ensure that the SysTick time base is always set to 1 millisecond
|
||
* to have correct HAL operation.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_Init(void)
|
||
{
|
||
800077c: b580 push {r7, lr}
|
||
800077e: af00 add r7, sp, #0
|
||
defined(STM32F102x6) || defined(STM32F102xB) || \
|
||
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
|
||
defined(STM32F105xC) || defined(STM32F107xC)
|
||
|
||
/* Prefetch buffer is not available on value line devices */
|
||
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
||
8000780: 4b08 ldr r3, [pc, #32] ; (80007a4 <HAL_Init+0x28>)
|
||
8000782: 681b ldr r3, [r3, #0]
|
||
8000784: 4a07 ldr r2, [pc, #28] ; (80007a4 <HAL_Init+0x28>)
|
||
8000786: f043 0310 orr.w r3, r3, #16
|
||
800078a: 6013 str r3, [r2, #0]
|
||
#endif
|
||
#endif /* PREFETCH_ENABLE */
|
||
|
||
/* Set Interrupt Group Priority */
|
||
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
||
800078c: 2003 movs r0, #3
|
||
800078e: f000 f92b bl 80009e8 <HAL_NVIC_SetPriorityGrouping>
|
||
|
||
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
|
||
HAL_InitTick(TICK_INT_PRIORITY);
|
||
8000792: 2000 movs r0, #0
|
||
8000794: f000 f808 bl 80007a8 <HAL_InitTick>
|
||
|
||
/* Init the low level hardware */
|
||
HAL_MspInit();
|
||
8000798: f7ff fec0 bl 800051c <HAL_MspInit>
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
800079c: 2300 movs r3, #0
|
||
}
|
||
800079e: 4618 mov r0, r3
|
||
80007a0: bd80 pop {r7, pc}
|
||
80007a2: bf00 nop
|
||
80007a4: 40022000 .word 0x40022000
|
||
|
||
080007a8 <HAL_InitTick>:
|
||
* implementation in user file.
|
||
* @param TickPriority Tick interrupt priority.
|
||
* @retval HAL status
|
||
*/
|
||
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||
{
|
||
80007a8: b580 push {r7, lr}
|
||
80007aa: b082 sub sp, #8
|
||
80007ac: af00 add r7, sp, #0
|
||
80007ae: 6078 str r0, [r7, #4]
|
||
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
||
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
||
80007b0: 4b12 ldr r3, [pc, #72] ; (80007fc <HAL_InitTick+0x54>)
|
||
80007b2: 681a ldr r2, [r3, #0]
|
||
80007b4: 4b12 ldr r3, [pc, #72] ; (8000800 <HAL_InitTick+0x58>)
|
||
80007b6: 781b ldrb r3, [r3, #0]
|
||
80007b8: 4619 mov r1, r3
|
||
80007ba: f44f 737a mov.w r3, #1000 ; 0x3e8
|
||
80007be: fbb3 f3f1 udiv r3, r3, r1
|
||
80007c2: fbb2 f3f3 udiv r3, r2, r3
|
||
80007c6: 4618 mov r0, r3
|
||
80007c8: f000 f935 bl 8000a36 <HAL_SYSTICK_Config>
|
||
80007cc: 4603 mov r3, r0
|
||
80007ce: 2b00 cmp r3, #0
|
||
80007d0: d001 beq.n 80007d6 <HAL_InitTick+0x2e>
|
||
{
|
||
return HAL_ERROR;
|
||
80007d2: 2301 movs r3, #1
|
||
80007d4: e00e b.n 80007f4 <HAL_InitTick+0x4c>
|
||
}
|
||
|
||
/* Configure the SysTick IRQ priority */
|
||
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
||
80007d6: 687b ldr r3, [r7, #4]
|
||
80007d8: 2b0f cmp r3, #15
|
||
80007da: d80a bhi.n 80007f2 <HAL_InitTick+0x4a>
|
||
{
|
||
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
||
80007dc: 2200 movs r2, #0
|
||
80007de: 6879 ldr r1, [r7, #4]
|
||
80007e0: f04f 30ff mov.w r0, #4294967295
|
||
80007e4: f000 f90b bl 80009fe <HAL_NVIC_SetPriority>
|
||
uwTickPrio = TickPriority;
|
||
80007e8: 4a06 ldr r2, [pc, #24] ; (8000804 <HAL_InitTick+0x5c>)
|
||
80007ea: 687b ldr r3, [r7, #4]
|
||
80007ec: 6013 str r3, [r2, #0]
|
||
{
|
||
return HAL_ERROR;
|
||
}
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
80007ee: 2300 movs r3, #0
|
||
80007f0: e000 b.n 80007f4 <HAL_InitTick+0x4c>
|
||
return HAL_ERROR;
|
||
80007f2: 2301 movs r3, #1
|
||
}
|
||
80007f4: 4618 mov r0, r3
|
||
80007f6: 3708 adds r7, #8
|
||
80007f8: 46bd mov sp, r7
|
||
80007fa: bd80 pop {r7, pc}
|
||
80007fc: 20000000 .word 0x20000000
|
||
8000800: 20000008 .word 0x20000008
|
||
8000804: 20000004 .word 0x20000004
|
||
|
||
08000808 <HAL_IncTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_IncTick(void)
|
||
{
|
||
8000808: b480 push {r7}
|
||
800080a: af00 add r7, sp, #0
|
||
uwTick += uwTickFreq;
|
||
800080c: 4b05 ldr r3, [pc, #20] ; (8000824 <HAL_IncTick+0x1c>)
|
||
800080e: 781b ldrb r3, [r3, #0]
|
||
8000810: 461a mov r2, r3
|
||
8000812: 4b05 ldr r3, [pc, #20] ; (8000828 <HAL_IncTick+0x20>)
|
||
8000814: 681b ldr r3, [r3, #0]
|
||
8000816: 4413 add r3, r2
|
||
8000818: 4a03 ldr r2, [pc, #12] ; (8000828 <HAL_IncTick+0x20>)
|
||
800081a: 6013 str r3, [r2, #0]
|
||
}
|
||
800081c: bf00 nop
|
||
800081e: 46bd mov sp, r7
|
||
8000820: bc80 pop {r7}
|
||
8000822: 4770 bx lr
|
||
8000824: 20000008 .word 0x20000008
|
||
8000828: 20000114 .word 0x20000114
|
||
|
||
0800082c <HAL_GetTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval tick value
|
||
*/
|
||
__weak uint32_t HAL_GetTick(void)
|
||
{
|
||
800082c: b480 push {r7}
|
||
800082e: af00 add r7, sp, #0
|
||
return uwTick;
|
||
8000830: 4b02 ldr r3, [pc, #8] ; (800083c <HAL_GetTick+0x10>)
|
||
8000832: 681b ldr r3, [r3, #0]
|
||
}
|
||
8000834: 4618 mov r0, r3
|
||
8000836: 46bd mov sp, r7
|
||
8000838: bc80 pop {r7}
|
||
800083a: 4770 bx lr
|
||
800083c: 20000114 .word 0x20000114
|
||
|
||
08000840 <HAL_Delay>:
|
||
* implementations in user file.
|
||
* @param Delay specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_Delay(uint32_t Delay)
|
||
{
|
||
8000840: b580 push {r7, lr}
|
||
8000842: b084 sub sp, #16
|
||
8000844: af00 add r7, sp, #0
|
||
8000846: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart = HAL_GetTick();
|
||
8000848: f7ff fff0 bl 800082c <HAL_GetTick>
|
||
800084c: 60b8 str r0, [r7, #8]
|
||
uint32_t wait = Delay;
|
||
800084e: 687b ldr r3, [r7, #4]
|
||
8000850: 60fb str r3, [r7, #12]
|
||
|
||
/* Add a freq to guarantee minimum wait */
|
||
if (wait < HAL_MAX_DELAY)
|
||
8000852: 68fb ldr r3, [r7, #12]
|
||
8000854: f1b3 3fff cmp.w r3, #4294967295
|
||
8000858: d005 beq.n 8000866 <HAL_Delay+0x26>
|
||
{
|
||
wait += (uint32_t)(uwTickFreq);
|
||
800085a: 4b0a ldr r3, [pc, #40] ; (8000884 <HAL_Delay+0x44>)
|
||
800085c: 781b ldrb r3, [r3, #0]
|
||
800085e: 461a mov r2, r3
|
||
8000860: 68fb ldr r3, [r7, #12]
|
||
8000862: 4413 add r3, r2
|
||
8000864: 60fb str r3, [r7, #12]
|
||
}
|
||
|
||
while ((HAL_GetTick() - tickstart) < wait)
|
||
8000866: bf00 nop
|
||
8000868: f7ff ffe0 bl 800082c <HAL_GetTick>
|
||
800086c: 4602 mov r2, r0
|
||
800086e: 68bb ldr r3, [r7, #8]
|
||
8000870: 1ad3 subs r3, r2, r3
|
||
8000872: 68fa ldr r2, [r7, #12]
|
||
8000874: 429a cmp r2, r3
|
||
8000876: d8f7 bhi.n 8000868 <HAL_Delay+0x28>
|
||
{
|
||
}
|
||
}
|
||
8000878: bf00 nop
|
||
800087a: bf00 nop
|
||
800087c: 3710 adds r7, #16
|
||
800087e: 46bd mov sp, r7
|
||
8000880: bd80 pop {r7, pc}
|
||
8000882: bf00 nop
|
||
8000884: 20000008 .word 0x20000008
|
||
|
||
08000888 <__NVIC_SetPriorityGrouping>:
|
||
In case of a conflict between priority grouping and available
|
||
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
|
||
\param [in] PriorityGroup Priority grouping field.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
8000888: b480 push {r7}
|
||
800088a: b085 sub sp, #20
|
||
800088c: af00 add r7, sp, #0
|
||
800088e: 6078 str r0, [r7, #4]
|
||
uint32_t reg_value;
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
8000890: 687b ldr r3, [r7, #4]
|
||
8000892: f003 0307 and.w r3, r3, #7
|
||
8000896: 60fb str r3, [r7, #12]
|
||
|
||
reg_value = SCB->AIRCR; /* read old register configuration */
|
||
8000898: 4b0c ldr r3, [pc, #48] ; (80008cc <__NVIC_SetPriorityGrouping+0x44>)
|
||
800089a: 68db ldr r3, [r3, #12]
|
||
800089c: 60bb str r3, [r7, #8]
|
||
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
||
800089e: 68ba ldr r2, [r7, #8]
|
||
80008a0: f64f 03ff movw r3, #63743 ; 0xf8ff
|
||
80008a4: 4013 ands r3, r2
|
||
80008a6: 60bb str r3, [r7, #8]
|
||
reg_value = (reg_value |
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
||
80008a8: 68fb ldr r3, [r7, #12]
|
||
80008aa: 021a lsls r2, r3, #8
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
80008ac: 68bb ldr r3, [r7, #8]
|
||
80008ae: 4313 orrs r3, r2
|
||
reg_value = (reg_value |
|
||
80008b0: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
|
||
80008b4: f443 3300 orr.w r3, r3, #131072 ; 0x20000
|
||
80008b8: 60bb str r3, [r7, #8]
|
||
SCB->AIRCR = reg_value;
|
||
80008ba: 4a04 ldr r2, [pc, #16] ; (80008cc <__NVIC_SetPriorityGrouping+0x44>)
|
||
80008bc: 68bb ldr r3, [r7, #8]
|
||
80008be: 60d3 str r3, [r2, #12]
|
||
}
|
||
80008c0: bf00 nop
|
||
80008c2: 3714 adds r7, #20
|
||
80008c4: 46bd mov sp, r7
|
||
80008c6: bc80 pop {r7}
|
||
80008c8: 4770 bx lr
|
||
80008ca: bf00 nop
|
||
80008cc: e000ed00 .word 0xe000ed00
|
||
|
||
080008d0 <__NVIC_GetPriorityGrouping>:
|
||
\brief Get Priority Grouping
|
||
\details Reads the priority grouping field from the NVIC Interrupt Controller.
|
||
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
|
||
*/
|
||
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
|
||
{
|
||
80008d0: b480 push {r7}
|
||
80008d2: af00 add r7, sp, #0
|
||
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
||
80008d4: 4b04 ldr r3, [pc, #16] ; (80008e8 <__NVIC_GetPriorityGrouping+0x18>)
|
||
80008d6: 68db ldr r3, [r3, #12]
|
||
80008d8: 0a1b lsrs r3, r3, #8
|
||
80008da: f003 0307 and.w r3, r3, #7
|
||
}
|
||
80008de: 4618 mov r0, r3
|
||
80008e0: 46bd mov sp, r7
|
||
80008e2: bc80 pop {r7}
|
||
80008e4: 4770 bx lr
|
||
80008e6: bf00 nop
|
||
80008e8: e000ed00 .word 0xe000ed00
|
||
|
||
080008ec <__NVIC_SetPriority>:
|
||
\param [in] IRQn Interrupt number.
|
||
\param [in] priority Priority to set.
|
||
\note The priority cannot be set for every processor exception.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
||
{
|
||
80008ec: b480 push {r7}
|
||
80008ee: b083 sub sp, #12
|
||
80008f0: af00 add r7, sp, #0
|
||
80008f2: 4603 mov r3, r0
|
||
80008f4: 6039 str r1, [r7, #0]
|
||
80008f6: 71fb strb r3, [r7, #7]
|
||
if ((int32_t)(IRQn) >= 0)
|
||
80008f8: f997 3007 ldrsb.w r3, [r7, #7]
|
||
80008fc: 2b00 cmp r3, #0
|
||
80008fe: db0a blt.n 8000916 <__NVIC_SetPriority+0x2a>
|
||
{
|
||
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
8000900: 683b ldr r3, [r7, #0]
|
||
8000902: b2da uxtb r2, r3
|
||
8000904: 490c ldr r1, [pc, #48] ; (8000938 <__NVIC_SetPriority+0x4c>)
|
||
8000906: f997 3007 ldrsb.w r3, [r7, #7]
|
||
800090a: 0112 lsls r2, r2, #4
|
||
800090c: b2d2 uxtb r2, r2
|
||
800090e: 440b add r3, r1
|
||
8000910: f883 2300 strb.w r2, [r3, #768] ; 0x300
|
||
}
|
||
else
|
||
{
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
}
|
||
}
|
||
8000914: e00a b.n 800092c <__NVIC_SetPriority+0x40>
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
8000916: 683b ldr r3, [r7, #0]
|
||
8000918: b2da uxtb r2, r3
|
||
800091a: 4908 ldr r1, [pc, #32] ; (800093c <__NVIC_SetPriority+0x50>)
|
||
800091c: 79fb ldrb r3, [r7, #7]
|
||
800091e: f003 030f and.w r3, r3, #15
|
||
8000922: 3b04 subs r3, #4
|
||
8000924: 0112 lsls r2, r2, #4
|
||
8000926: b2d2 uxtb r2, r2
|
||
8000928: 440b add r3, r1
|
||
800092a: 761a strb r2, [r3, #24]
|
||
}
|
||
800092c: bf00 nop
|
||
800092e: 370c adds r7, #12
|
||
8000930: 46bd mov sp, r7
|
||
8000932: bc80 pop {r7}
|
||
8000934: 4770 bx lr
|
||
8000936: bf00 nop
|
||
8000938: e000e100 .word 0xe000e100
|
||
800093c: e000ed00 .word 0xe000ed00
|
||
|
||
08000940 <NVIC_EncodePriority>:
|
||
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
||
\param [in] SubPriority Subpriority value (starting from 0).
|
||
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
||
*/
|
||
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
8000940: b480 push {r7}
|
||
8000942: b089 sub sp, #36 ; 0x24
|
||
8000944: af00 add r7, sp, #0
|
||
8000946: 60f8 str r0, [r7, #12]
|
||
8000948: 60b9 str r1, [r7, #8]
|
||
800094a: 607a str r2, [r7, #4]
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
800094c: 68fb ldr r3, [r7, #12]
|
||
800094e: f003 0307 and.w r3, r3, #7
|
||
8000952: 61fb str r3, [r7, #28]
|
||
uint32_t PreemptPriorityBits;
|
||
uint32_t SubPriorityBits;
|
||
|
||
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
||
8000954: 69fb ldr r3, [r7, #28]
|
||
8000956: f1c3 0307 rsb r3, r3, #7
|
||
800095a: 2b04 cmp r3, #4
|
||
800095c: bf28 it cs
|
||
800095e: 2304 movcs r3, #4
|
||
8000960: 61bb str r3, [r7, #24]
|
||
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
||
8000962: 69fb ldr r3, [r7, #28]
|
||
8000964: 3304 adds r3, #4
|
||
8000966: 2b06 cmp r3, #6
|
||
8000968: d902 bls.n 8000970 <NVIC_EncodePriority+0x30>
|
||
800096a: 69fb ldr r3, [r7, #28]
|
||
800096c: 3b03 subs r3, #3
|
||
800096e: e000 b.n 8000972 <NVIC_EncodePriority+0x32>
|
||
8000970: 2300 movs r3, #0
|
||
8000972: 617b str r3, [r7, #20]
|
||
|
||
return (
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
8000974: f04f 32ff mov.w r2, #4294967295
|
||
8000978: 69bb ldr r3, [r7, #24]
|
||
800097a: fa02 f303 lsl.w r3, r2, r3
|
||
800097e: 43da mvns r2, r3
|
||
8000980: 68bb ldr r3, [r7, #8]
|
||
8000982: 401a ands r2, r3
|
||
8000984: 697b ldr r3, [r7, #20]
|
||
8000986: 409a lsls r2, r3
|
||
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
||
8000988: f04f 31ff mov.w r1, #4294967295
|
||
800098c: 697b ldr r3, [r7, #20]
|
||
800098e: fa01 f303 lsl.w r3, r1, r3
|
||
8000992: 43d9 mvns r1, r3
|
||
8000994: 687b ldr r3, [r7, #4]
|
||
8000996: 400b ands r3, r1
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
8000998: 4313 orrs r3, r2
|
||
);
|
||
}
|
||
800099a: 4618 mov r0, r3
|
||
800099c: 3724 adds r7, #36 ; 0x24
|
||
800099e: 46bd mov sp, r7
|
||
80009a0: bc80 pop {r7}
|
||
80009a2: 4770 bx lr
|
||
|
||
080009a4 <SysTick_Config>:
|
||
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
||
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
||
must contain a vendor-specific implementation of this function.
|
||
*/
|
||
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
||
{
|
||
80009a4: b580 push {r7, lr}
|
||
80009a6: b082 sub sp, #8
|
||
80009a8: af00 add r7, sp, #0
|
||
80009aa: 6078 str r0, [r7, #4]
|
||
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
||
80009ac: 687b ldr r3, [r7, #4]
|
||
80009ae: 3b01 subs r3, #1
|
||
80009b0: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
|
||
80009b4: d301 bcc.n 80009ba <SysTick_Config+0x16>
|
||
{
|
||
return (1UL); /* Reload value impossible */
|
||
80009b6: 2301 movs r3, #1
|
||
80009b8: e00f b.n 80009da <SysTick_Config+0x36>
|
||
}
|
||
|
||
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
||
80009ba: 4a0a ldr r2, [pc, #40] ; (80009e4 <SysTick_Config+0x40>)
|
||
80009bc: 687b ldr r3, [r7, #4]
|
||
80009be: 3b01 subs r3, #1
|
||
80009c0: 6053 str r3, [r2, #4]
|
||
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
||
80009c2: 210f movs r1, #15
|
||
80009c4: f04f 30ff mov.w r0, #4294967295
|
||
80009c8: f7ff ff90 bl 80008ec <__NVIC_SetPriority>
|
||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
||
80009cc: 4b05 ldr r3, [pc, #20] ; (80009e4 <SysTick_Config+0x40>)
|
||
80009ce: 2200 movs r2, #0
|
||
80009d0: 609a str r2, [r3, #8]
|
||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||
80009d2: 4b04 ldr r3, [pc, #16] ; (80009e4 <SysTick_Config+0x40>)
|
||
80009d4: 2207 movs r2, #7
|
||
80009d6: 601a str r2, [r3, #0]
|
||
SysTick_CTRL_TICKINT_Msk |
|
||
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
||
return (0UL); /* Function successful */
|
||
80009d8: 2300 movs r3, #0
|
||
}
|
||
80009da: 4618 mov r0, r3
|
||
80009dc: 3708 adds r7, #8
|
||
80009de: 46bd mov sp, r7
|
||
80009e0: bd80 pop {r7, pc}
|
||
80009e2: bf00 nop
|
||
80009e4: e000e010 .word 0xe000e010
|
||
|
||
080009e8 <HAL_NVIC_SetPriorityGrouping>:
|
||
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
|
||
* The pending IRQ priority will be managed only by the subpriority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
80009e8: b580 push {r7, lr}
|
||
80009ea: b082 sub sp, #8
|
||
80009ec: af00 add r7, sp, #0
|
||
80009ee: 6078 str r0, [r7, #4]
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
||
|
||
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
||
NVIC_SetPriorityGrouping(PriorityGroup);
|
||
80009f0: 6878 ldr r0, [r7, #4]
|
||
80009f2: f7ff ff49 bl 8000888 <__NVIC_SetPriorityGrouping>
|
||
}
|
||
80009f6: bf00 nop
|
||
80009f8: 3708 adds r7, #8
|
||
80009fa: 46bd mov sp, r7
|
||
80009fc: bd80 pop {r7, pc}
|
||
|
||
080009fe <HAL_NVIC_SetPriority>:
|
||
* This parameter can be a value between 0 and 15
|
||
* A lower priority value indicates a higher priority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
80009fe: b580 push {r7, lr}
|
||
8000a00: b086 sub sp, #24
|
||
8000a02: af00 add r7, sp, #0
|
||
8000a04: 4603 mov r3, r0
|
||
8000a06: 60b9 str r1, [r7, #8]
|
||
8000a08: 607a str r2, [r7, #4]
|
||
8000a0a: 73fb strb r3, [r7, #15]
|
||
uint32_t prioritygroup = 0x00U;
|
||
8000a0c: 2300 movs r3, #0
|
||
8000a0e: 617b str r3, [r7, #20]
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
||
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
||
|
||
prioritygroup = NVIC_GetPriorityGrouping();
|
||
8000a10: f7ff ff5e bl 80008d0 <__NVIC_GetPriorityGrouping>
|
||
8000a14: 6178 str r0, [r7, #20]
|
||
|
||
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
||
8000a16: 687a ldr r2, [r7, #4]
|
||
8000a18: 68b9 ldr r1, [r7, #8]
|
||
8000a1a: 6978 ldr r0, [r7, #20]
|
||
8000a1c: f7ff ff90 bl 8000940 <NVIC_EncodePriority>
|
||
8000a20: 4602 mov r2, r0
|
||
8000a22: f997 300f ldrsb.w r3, [r7, #15]
|
||
8000a26: 4611 mov r1, r2
|
||
8000a28: 4618 mov r0, r3
|
||
8000a2a: f7ff ff5f bl 80008ec <__NVIC_SetPriority>
|
||
}
|
||
8000a2e: bf00 nop
|
||
8000a30: 3718 adds r7, #24
|
||
8000a32: 46bd mov sp, r7
|
||
8000a34: bd80 pop {r7, pc}
|
||
|
||
08000a36 <HAL_SYSTICK_Config>:
|
||
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
|
||
* @retval status: - 0 Function succeeded.
|
||
* - 1 Function failed.
|
||
*/
|
||
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
||
{
|
||
8000a36: b580 push {r7, lr}
|
||
8000a38: b082 sub sp, #8
|
||
8000a3a: af00 add r7, sp, #0
|
||
8000a3c: 6078 str r0, [r7, #4]
|
||
return SysTick_Config(TicksNumb);
|
||
8000a3e: 6878 ldr r0, [r7, #4]
|
||
8000a40: f7ff ffb0 bl 80009a4 <SysTick_Config>
|
||
8000a44: 4603 mov r3, r0
|
||
}
|
||
8000a46: 4618 mov r0, r3
|
||
8000a48: 3708 adds r7, #8
|
||
8000a4a: 46bd mov sp, r7
|
||
8000a4c: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08000a50 <HAL_GPIO_Init>:
|
||
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
|
||
* the configuration information for the specified GPIO peripheral.
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
||
{
|
||
8000a50: b480 push {r7}
|
||
8000a52: b08b sub sp, #44 ; 0x2c
|
||
8000a54: af00 add r7, sp, #0
|
||
8000a56: 6078 str r0, [r7, #4]
|
||
8000a58: 6039 str r1, [r7, #0]
|
||
uint32_t position = 0x00u;
|
||
8000a5a: 2300 movs r3, #0
|
||
8000a5c: 627b str r3, [r7, #36] ; 0x24
|
||
uint32_t ioposition;
|
||
uint32_t iocurrent;
|
||
uint32_t temp;
|
||
uint32_t config = 0x00u;
|
||
8000a5e: 2300 movs r3, #0
|
||
8000a60: 623b str r3, [r7, #32]
|
||
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
||
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
||
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
||
|
||
/* Configure the port pins */
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
8000a62: e179 b.n 8000d58 <HAL_GPIO_Init+0x308>
|
||
{
|
||
/* Get the IO position */
|
||
ioposition = (0x01uL << position);
|
||
8000a64: 2201 movs r2, #1
|
||
8000a66: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000a68: fa02 f303 lsl.w r3, r2, r3
|
||
8000a6c: 61fb str r3, [r7, #28]
|
||
|
||
/* Get the current IO position */
|
||
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
|
||
8000a6e: 683b ldr r3, [r7, #0]
|
||
8000a70: 681b ldr r3, [r3, #0]
|
||
8000a72: 69fa ldr r2, [r7, #28]
|
||
8000a74: 4013 ands r3, r2
|
||
8000a76: 61bb str r3, [r7, #24]
|
||
|
||
if (iocurrent == ioposition)
|
||
8000a78: 69ba ldr r2, [r7, #24]
|
||
8000a7a: 69fb ldr r3, [r7, #28]
|
||
8000a7c: 429a cmp r2, r3
|
||
8000a7e: f040 8168 bne.w 8000d52 <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Check the Alternate function parameters */
|
||
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
|
||
|
||
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
|
||
switch (GPIO_Init->Mode)
|
||
8000a82: 683b ldr r3, [r7, #0]
|
||
8000a84: 685b ldr r3, [r3, #4]
|
||
8000a86: 4aa0 ldr r2, [pc, #640] ; (8000d08 <HAL_GPIO_Init+0x2b8>)
|
||
8000a88: 4293 cmp r3, r2
|
||
8000a8a: d05e beq.n 8000b4a <HAL_GPIO_Init+0xfa>
|
||
8000a8c: 4a9e ldr r2, [pc, #632] ; (8000d08 <HAL_GPIO_Init+0x2b8>)
|
||
8000a8e: 4293 cmp r3, r2
|
||
8000a90: d875 bhi.n 8000b7e <HAL_GPIO_Init+0x12e>
|
||
8000a92: 4a9e ldr r2, [pc, #632] ; (8000d0c <HAL_GPIO_Init+0x2bc>)
|
||
8000a94: 4293 cmp r3, r2
|
||
8000a96: d058 beq.n 8000b4a <HAL_GPIO_Init+0xfa>
|
||
8000a98: 4a9c ldr r2, [pc, #624] ; (8000d0c <HAL_GPIO_Init+0x2bc>)
|
||
8000a9a: 4293 cmp r3, r2
|
||
8000a9c: d86f bhi.n 8000b7e <HAL_GPIO_Init+0x12e>
|
||
8000a9e: 4a9c ldr r2, [pc, #624] ; (8000d10 <HAL_GPIO_Init+0x2c0>)
|
||
8000aa0: 4293 cmp r3, r2
|
||
8000aa2: d052 beq.n 8000b4a <HAL_GPIO_Init+0xfa>
|
||
8000aa4: 4a9a ldr r2, [pc, #616] ; (8000d10 <HAL_GPIO_Init+0x2c0>)
|
||
8000aa6: 4293 cmp r3, r2
|
||
8000aa8: d869 bhi.n 8000b7e <HAL_GPIO_Init+0x12e>
|
||
8000aaa: 4a9a ldr r2, [pc, #616] ; (8000d14 <HAL_GPIO_Init+0x2c4>)
|
||
8000aac: 4293 cmp r3, r2
|
||
8000aae: d04c beq.n 8000b4a <HAL_GPIO_Init+0xfa>
|
||
8000ab0: 4a98 ldr r2, [pc, #608] ; (8000d14 <HAL_GPIO_Init+0x2c4>)
|
||
8000ab2: 4293 cmp r3, r2
|
||
8000ab4: d863 bhi.n 8000b7e <HAL_GPIO_Init+0x12e>
|
||
8000ab6: 4a98 ldr r2, [pc, #608] ; (8000d18 <HAL_GPIO_Init+0x2c8>)
|
||
8000ab8: 4293 cmp r3, r2
|
||
8000aba: d046 beq.n 8000b4a <HAL_GPIO_Init+0xfa>
|
||
8000abc: 4a96 ldr r2, [pc, #600] ; (8000d18 <HAL_GPIO_Init+0x2c8>)
|
||
8000abe: 4293 cmp r3, r2
|
||
8000ac0: d85d bhi.n 8000b7e <HAL_GPIO_Init+0x12e>
|
||
8000ac2: 2b12 cmp r3, #18
|
||
8000ac4: d82a bhi.n 8000b1c <HAL_GPIO_Init+0xcc>
|
||
8000ac6: 2b12 cmp r3, #18
|
||
8000ac8: d859 bhi.n 8000b7e <HAL_GPIO_Init+0x12e>
|
||
8000aca: a201 add r2, pc, #4 ; (adr r2, 8000ad0 <HAL_GPIO_Init+0x80>)
|
||
8000acc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8000ad0: 08000b4b .word 0x08000b4b
|
||
8000ad4: 08000b25 .word 0x08000b25
|
||
8000ad8: 08000b37 .word 0x08000b37
|
||
8000adc: 08000b79 .word 0x08000b79
|
||
8000ae0: 08000b7f .word 0x08000b7f
|
||
8000ae4: 08000b7f .word 0x08000b7f
|
||
8000ae8: 08000b7f .word 0x08000b7f
|
||
8000aec: 08000b7f .word 0x08000b7f
|
||
8000af0: 08000b7f .word 0x08000b7f
|
||
8000af4: 08000b7f .word 0x08000b7f
|
||
8000af8: 08000b7f .word 0x08000b7f
|
||
8000afc: 08000b7f .word 0x08000b7f
|
||
8000b00: 08000b7f .word 0x08000b7f
|
||
8000b04: 08000b7f .word 0x08000b7f
|
||
8000b08: 08000b7f .word 0x08000b7f
|
||
8000b0c: 08000b7f .word 0x08000b7f
|
||
8000b10: 08000b7f .word 0x08000b7f
|
||
8000b14: 08000b2d .word 0x08000b2d
|
||
8000b18: 08000b41 .word 0x08000b41
|
||
8000b1c: 4a7f ldr r2, [pc, #508] ; (8000d1c <HAL_GPIO_Init+0x2cc>)
|
||
8000b1e: 4293 cmp r3, r2
|
||
8000b20: d013 beq.n 8000b4a <HAL_GPIO_Init+0xfa>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
break;
|
||
|
||
/* Parameters are checked with assert_param */
|
||
default:
|
||
break;
|
||
8000b22: e02c b.n 8000b7e <HAL_GPIO_Init+0x12e>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
|
||
8000b24: 683b ldr r3, [r7, #0]
|
||
8000b26: 68db ldr r3, [r3, #12]
|
||
8000b28: 623b str r3, [r7, #32]
|
||
break;
|
||
8000b2a: e029 b.n 8000b80 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
|
||
8000b2c: 683b ldr r3, [r7, #0]
|
||
8000b2e: 68db ldr r3, [r3, #12]
|
||
8000b30: 3304 adds r3, #4
|
||
8000b32: 623b str r3, [r7, #32]
|
||
break;
|
||
8000b34: e024 b.n 8000b80 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
|
||
8000b36: 683b ldr r3, [r7, #0]
|
||
8000b38: 68db ldr r3, [r3, #12]
|
||
8000b3a: 3308 adds r3, #8
|
||
8000b3c: 623b str r3, [r7, #32]
|
||
break;
|
||
8000b3e: e01f b.n 8000b80 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
|
||
8000b40: 683b ldr r3, [r7, #0]
|
||
8000b42: 68db ldr r3, [r3, #12]
|
||
8000b44: 330c adds r3, #12
|
||
8000b46: 623b str r3, [r7, #32]
|
||
break;
|
||
8000b48: e01a b.n 8000b80 <HAL_GPIO_Init+0x130>
|
||
if (GPIO_Init->Pull == GPIO_NOPULL)
|
||
8000b4a: 683b ldr r3, [r7, #0]
|
||
8000b4c: 689b ldr r3, [r3, #8]
|
||
8000b4e: 2b00 cmp r3, #0
|
||
8000b50: d102 bne.n 8000b58 <HAL_GPIO_Init+0x108>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
|
||
8000b52: 2304 movs r3, #4
|
||
8000b54: 623b str r3, [r7, #32]
|
||
break;
|
||
8000b56: e013 b.n 8000b80 <HAL_GPIO_Init+0x130>
|
||
else if (GPIO_Init->Pull == GPIO_PULLUP)
|
||
8000b58: 683b ldr r3, [r7, #0]
|
||
8000b5a: 689b ldr r3, [r3, #8]
|
||
8000b5c: 2b01 cmp r3, #1
|
||
8000b5e: d105 bne.n 8000b6c <HAL_GPIO_Init+0x11c>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8000b60: 2308 movs r3, #8
|
||
8000b62: 623b str r3, [r7, #32]
|
||
GPIOx->BSRR = ioposition;
|
||
8000b64: 687b ldr r3, [r7, #4]
|
||
8000b66: 69fa ldr r2, [r7, #28]
|
||
8000b68: 611a str r2, [r3, #16]
|
||
break;
|
||
8000b6a: e009 b.n 8000b80 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8000b6c: 2308 movs r3, #8
|
||
8000b6e: 623b str r3, [r7, #32]
|
||
GPIOx->BRR = ioposition;
|
||
8000b70: 687b ldr r3, [r7, #4]
|
||
8000b72: 69fa ldr r2, [r7, #28]
|
||
8000b74: 615a str r2, [r3, #20]
|
||
break;
|
||
8000b76: e003 b.n 8000b80 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
8000b78: 2300 movs r3, #0
|
||
8000b7a: 623b str r3, [r7, #32]
|
||
break;
|
||
8000b7c: e000 b.n 8000b80 <HAL_GPIO_Init+0x130>
|
||
break;
|
||
8000b7e: bf00 nop
|
||
}
|
||
|
||
/* Check if the current bit belongs to first half or last half of the pin count number
|
||
in order to address CRH or CRL register*/
|
||
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
|
||
8000b80: 69bb ldr r3, [r7, #24]
|
||
8000b82: 2bff cmp r3, #255 ; 0xff
|
||
8000b84: d801 bhi.n 8000b8a <HAL_GPIO_Init+0x13a>
|
||
8000b86: 687b ldr r3, [r7, #4]
|
||
8000b88: e001 b.n 8000b8e <HAL_GPIO_Init+0x13e>
|
||
8000b8a: 687b ldr r3, [r7, #4]
|
||
8000b8c: 3304 adds r3, #4
|
||
8000b8e: 617b str r3, [r7, #20]
|
||
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
|
||
8000b90: 69bb ldr r3, [r7, #24]
|
||
8000b92: 2bff cmp r3, #255 ; 0xff
|
||
8000b94: d802 bhi.n 8000b9c <HAL_GPIO_Init+0x14c>
|
||
8000b96: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000b98: 009b lsls r3, r3, #2
|
||
8000b9a: e002 b.n 8000ba2 <HAL_GPIO_Init+0x152>
|
||
8000b9c: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000b9e: 3b08 subs r3, #8
|
||
8000ba0: 009b lsls r3, r3, #2
|
||
8000ba2: 613b str r3, [r7, #16]
|
||
|
||
/* Apply the new configuration of the pin to the register */
|
||
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
|
||
8000ba4: 697b ldr r3, [r7, #20]
|
||
8000ba6: 681a ldr r2, [r3, #0]
|
||
8000ba8: 210f movs r1, #15
|
||
8000baa: 693b ldr r3, [r7, #16]
|
||
8000bac: fa01 f303 lsl.w r3, r1, r3
|
||
8000bb0: 43db mvns r3, r3
|
||
8000bb2: 401a ands r2, r3
|
||
8000bb4: 6a39 ldr r1, [r7, #32]
|
||
8000bb6: 693b ldr r3, [r7, #16]
|
||
8000bb8: fa01 f303 lsl.w r3, r1, r3
|
||
8000bbc: 431a orrs r2, r3
|
||
8000bbe: 697b ldr r3, [r7, #20]
|
||
8000bc0: 601a str r2, [r3, #0]
|
||
|
||
/*--------------------- EXTI Mode Configuration ------------------------*/
|
||
/* Configure the External Interrupt or event for the current IO */
|
||
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
|
||
8000bc2: 683b ldr r3, [r7, #0]
|
||
8000bc4: 685b ldr r3, [r3, #4]
|
||
8000bc6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8000bca: 2b00 cmp r3, #0
|
||
8000bcc: f000 80c1 beq.w 8000d52 <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Enable AFIO Clock */
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
8000bd0: 4b53 ldr r3, [pc, #332] ; (8000d20 <HAL_GPIO_Init+0x2d0>)
|
||
8000bd2: 699b ldr r3, [r3, #24]
|
||
8000bd4: 4a52 ldr r2, [pc, #328] ; (8000d20 <HAL_GPIO_Init+0x2d0>)
|
||
8000bd6: f043 0301 orr.w r3, r3, #1
|
||
8000bda: 6193 str r3, [r2, #24]
|
||
8000bdc: 4b50 ldr r3, [pc, #320] ; (8000d20 <HAL_GPIO_Init+0x2d0>)
|
||
8000bde: 699b ldr r3, [r3, #24]
|
||
8000be0: f003 0301 and.w r3, r3, #1
|
||
8000be4: 60bb str r3, [r7, #8]
|
||
8000be6: 68bb ldr r3, [r7, #8]
|
||
temp = AFIO->EXTICR[position >> 2u];
|
||
8000be8: 4a4e ldr r2, [pc, #312] ; (8000d24 <HAL_GPIO_Init+0x2d4>)
|
||
8000bea: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000bec: 089b lsrs r3, r3, #2
|
||
8000bee: 3302 adds r3, #2
|
||
8000bf0: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
||
8000bf4: 60fb str r3, [r7, #12]
|
||
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
|
||
8000bf6: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000bf8: f003 0303 and.w r3, r3, #3
|
||
8000bfc: 009b lsls r3, r3, #2
|
||
8000bfe: 220f movs r2, #15
|
||
8000c00: fa02 f303 lsl.w r3, r2, r3
|
||
8000c04: 43db mvns r3, r3
|
||
8000c06: 68fa ldr r2, [r7, #12]
|
||
8000c08: 4013 ands r3, r2
|
||
8000c0a: 60fb str r3, [r7, #12]
|
||
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
|
||
8000c0c: 687b ldr r3, [r7, #4]
|
||
8000c0e: 4a46 ldr r2, [pc, #280] ; (8000d28 <HAL_GPIO_Init+0x2d8>)
|
||
8000c10: 4293 cmp r3, r2
|
||
8000c12: d01f beq.n 8000c54 <HAL_GPIO_Init+0x204>
|
||
8000c14: 687b ldr r3, [r7, #4]
|
||
8000c16: 4a45 ldr r2, [pc, #276] ; (8000d2c <HAL_GPIO_Init+0x2dc>)
|
||
8000c18: 4293 cmp r3, r2
|
||
8000c1a: d019 beq.n 8000c50 <HAL_GPIO_Init+0x200>
|
||
8000c1c: 687b ldr r3, [r7, #4]
|
||
8000c1e: 4a44 ldr r2, [pc, #272] ; (8000d30 <HAL_GPIO_Init+0x2e0>)
|
||
8000c20: 4293 cmp r3, r2
|
||
8000c22: d013 beq.n 8000c4c <HAL_GPIO_Init+0x1fc>
|
||
8000c24: 687b ldr r3, [r7, #4]
|
||
8000c26: 4a43 ldr r2, [pc, #268] ; (8000d34 <HAL_GPIO_Init+0x2e4>)
|
||
8000c28: 4293 cmp r3, r2
|
||
8000c2a: d00d beq.n 8000c48 <HAL_GPIO_Init+0x1f8>
|
||
8000c2c: 687b ldr r3, [r7, #4]
|
||
8000c2e: 4a42 ldr r2, [pc, #264] ; (8000d38 <HAL_GPIO_Init+0x2e8>)
|
||
8000c30: 4293 cmp r3, r2
|
||
8000c32: d007 beq.n 8000c44 <HAL_GPIO_Init+0x1f4>
|
||
8000c34: 687b ldr r3, [r7, #4]
|
||
8000c36: 4a41 ldr r2, [pc, #260] ; (8000d3c <HAL_GPIO_Init+0x2ec>)
|
||
8000c38: 4293 cmp r3, r2
|
||
8000c3a: d101 bne.n 8000c40 <HAL_GPIO_Init+0x1f0>
|
||
8000c3c: 2305 movs r3, #5
|
||
8000c3e: e00a b.n 8000c56 <HAL_GPIO_Init+0x206>
|
||
8000c40: 2306 movs r3, #6
|
||
8000c42: e008 b.n 8000c56 <HAL_GPIO_Init+0x206>
|
||
8000c44: 2304 movs r3, #4
|
||
8000c46: e006 b.n 8000c56 <HAL_GPIO_Init+0x206>
|
||
8000c48: 2303 movs r3, #3
|
||
8000c4a: e004 b.n 8000c56 <HAL_GPIO_Init+0x206>
|
||
8000c4c: 2302 movs r3, #2
|
||
8000c4e: e002 b.n 8000c56 <HAL_GPIO_Init+0x206>
|
||
8000c50: 2301 movs r3, #1
|
||
8000c52: e000 b.n 8000c56 <HAL_GPIO_Init+0x206>
|
||
8000c54: 2300 movs r3, #0
|
||
8000c56: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8000c58: f002 0203 and.w r2, r2, #3
|
||
8000c5c: 0092 lsls r2, r2, #2
|
||
8000c5e: 4093 lsls r3, r2
|
||
8000c60: 68fa ldr r2, [r7, #12]
|
||
8000c62: 4313 orrs r3, r2
|
||
8000c64: 60fb str r3, [r7, #12]
|
||
AFIO->EXTICR[position >> 2u] = temp;
|
||
8000c66: 492f ldr r1, [pc, #188] ; (8000d24 <HAL_GPIO_Init+0x2d4>)
|
||
8000c68: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000c6a: 089b lsrs r3, r3, #2
|
||
8000c6c: 3302 adds r3, #2
|
||
8000c6e: 68fa ldr r2, [r7, #12]
|
||
8000c70: f841 2023 str.w r2, [r1, r3, lsl #2]
|
||
|
||
|
||
/* Configure the interrupt mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
|
||
8000c74: 683b ldr r3, [r7, #0]
|
||
8000c76: 685b ldr r3, [r3, #4]
|
||
8000c78: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8000c7c: 2b00 cmp r3, #0
|
||
8000c7e: d006 beq.n 8000c8e <HAL_GPIO_Init+0x23e>
|
||
{
|
||
SET_BIT(EXTI->IMR, iocurrent);
|
||
8000c80: 4b2f ldr r3, [pc, #188] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000c82: 681a ldr r2, [r3, #0]
|
||
8000c84: 492e ldr r1, [pc, #184] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000c86: 69bb ldr r3, [r7, #24]
|
||
8000c88: 4313 orrs r3, r2
|
||
8000c8a: 600b str r3, [r1, #0]
|
||
8000c8c: e006 b.n 8000c9c <HAL_GPIO_Init+0x24c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->IMR, iocurrent);
|
||
8000c8e: 4b2c ldr r3, [pc, #176] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000c90: 681a ldr r2, [r3, #0]
|
||
8000c92: 69bb ldr r3, [r7, #24]
|
||
8000c94: 43db mvns r3, r3
|
||
8000c96: 492a ldr r1, [pc, #168] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000c98: 4013 ands r3, r2
|
||
8000c9a: 600b str r3, [r1, #0]
|
||
}
|
||
|
||
/* Configure the event mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
|
||
8000c9c: 683b ldr r3, [r7, #0]
|
||
8000c9e: 685b ldr r3, [r3, #4]
|
||
8000ca0: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8000ca4: 2b00 cmp r3, #0
|
||
8000ca6: d006 beq.n 8000cb6 <HAL_GPIO_Init+0x266>
|
||
{
|
||
SET_BIT(EXTI->EMR, iocurrent);
|
||
8000ca8: 4b25 ldr r3, [pc, #148] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000caa: 685a ldr r2, [r3, #4]
|
||
8000cac: 4924 ldr r1, [pc, #144] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000cae: 69bb ldr r3, [r7, #24]
|
||
8000cb0: 4313 orrs r3, r2
|
||
8000cb2: 604b str r3, [r1, #4]
|
||
8000cb4: e006 b.n 8000cc4 <HAL_GPIO_Init+0x274>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->EMR, iocurrent);
|
||
8000cb6: 4b22 ldr r3, [pc, #136] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000cb8: 685a ldr r2, [r3, #4]
|
||
8000cba: 69bb ldr r3, [r7, #24]
|
||
8000cbc: 43db mvns r3, r3
|
||
8000cbe: 4920 ldr r1, [pc, #128] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000cc0: 4013 ands r3, r2
|
||
8000cc2: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Enable or disable the rising trigger */
|
||
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
|
||
8000cc4: 683b ldr r3, [r7, #0]
|
||
8000cc6: 685b ldr r3, [r3, #4]
|
||
8000cc8: f403 1380 and.w r3, r3, #1048576 ; 0x100000
|
||
8000ccc: 2b00 cmp r3, #0
|
||
8000cce: d006 beq.n 8000cde <HAL_GPIO_Init+0x28e>
|
||
{
|
||
SET_BIT(EXTI->RTSR, iocurrent);
|
||
8000cd0: 4b1b ldr r3, [pc, #108] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000cd2: 689a ldr r2, [r3, #8]
|
||
8000cd4: 491a ldr r1, [pc, #104] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000cd6: 69bb ldr r3, [r7, #24]
|
||
8000cd8: 4313 orrs r3, r2
|
||
8000cda: 608b str r3, [r1, #8]
|
||
8000cdc: e006 b.n 8000cec <HAL_GPIO_Init+0x29c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->RTSR, iocurrent);
|
||
8000cde: 4b18 ldr r3, [pc, #96] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000ce0: 689a ldr r2, [r3, #8]
|
||
8000ce2: 69bb ldr r3, [r7, #24]
|
||
8000ce4: 43db mvns r3, r3
|
||
8000ce6: 4916 ldr r1, [pc, #88] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000ce8: 4013 ands r3, r2
|
||
8000cea: 608b str r3, [r1, #8]
|
||
}
|
||
|
||
/* Enable or disable the falling trigger */
|
||
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
|
||
8000cec: 683b ldr r3, [r7, #0]
|
||
8000cee: 685b ldr r3, [r3, #4]
|
||
8000cf0: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
||
8000cf4: 2b00 cmp r3, #0
|
||
8000cf6: d025 beq.n 8000d44 <HAL_GPIO_Init+0x2f4>
|
||
{
|
||
SET_BIT(EXTI->FTSR, iocurrent);
|
||
8000cf8: 4b11 ldr r3, [pc, #68] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000cfa: 68da ldr r2, [r3, #12]
|
||
8000cfc: 4910 ldr r1, [pc, #64] ; (8000d40 <HAL_GPIO_Init+0x2f0>)
|
||
8000cfe: 69bb ldr r3, [r7, #24]
|
||
8000d00: 4313 orrs r3, r2
|
||
8000d02: 60cb str r3, [r1, #12]
|
||
8000d04: e025 b.n 8000d52 <HAL_GPIO_Init+0x302>
|
||
8000d06: bf00 nop
|
||
8000d08: 10320000 .word 0x10320000
|
||
8000d0c: 10310000 .word 0x10310000
|
||
8000d10: 10220000 .word 0x10220000
|
||
8000d14: 10210000 .word 0x10210000
|
||
8000d18: 10120000 .word 0x10120000
|
||
8000d1c: 10110000 .word 0x10110000
|
||
8000d20: 40021000 .word 0x40021000
|
||
8000d24: 40010000 .word 0x40010000
|
||
8000d28: 40010800 .word 0x40010800
|
||
8000d2c: 40010c00 .word 0x40010c00
|
||
8000d30: 40011000 .word 0x40011000
|
||
8000d34: 40011400 .word 0x40011400
|
||
8000d38: 40011800 .word 0x40011800
|
||
8000d3c: 40011c00 .word 0x40011c00
|
||
8000d40: 40010400 .word 0x40010400
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->FTSR, iocurrent);
|
||
8000d44: 4b0b ldr r3, [pc, #44] ; (8000d74 <HAL_GPIO_Init+0x324>)
|
||
8000d46: 68da ldr r2, [r3, #12]
|
||
8000d48: 69bb ldr r3, [r7, #24]
|
||
8000d4a: 43db mvns r3, r3
|
||
8000d4c: 4909 ldr r1, [pc, #36] ; (8000d74 <HAL_GPIO_Init+0x324>)
|
||
8000d4e: 4013 ands r3, r2
|
||
8000d50: 60cb str r3, [r1, #12]
|
||
}
|
||
}
|
||
}
|
||
|
||
position++;
|
||
8000d52: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000d54: 3301 adds r3, #1
|
||
8000d56: 627b str r3, [r7, #36] ; 0x24
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
8000d58: 683b ldr r3, [r7, #0]
|
||
8000d5a: 681a ldr r2, [r3, #0]
|
||
8000d5c: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000d5e: fa22 f303 lsr.w r3, r2, r3
|
||
8000d62: 2b00 cmp r3, #0
|
||
8000d64: f47f ae7e bne.w 8000a64 <HAL_GPIO_Init+0x14>
|
||
}
|
||
}
|
||
8000d68: bf00 nop
|
||
8000d6a: bf00 nop
|
||
8000d6c: 372c adds r7, #44 ; 0x2c
|
||
8000d6e: 46bd mov sp, r7
|
||
8000d70: bc80 pop {r7}
|
||
8000d72: 4770 bx lr
|
||
8000d74: 40010400 .word 0x40010400
|
||
|
||
08000d78 <HAL_GPIO_WritePin>:
|
||
* @arg GPIO_PIN_RESET: to clear the port pin
|
||
* @arg GPIO_PIN_SET: to set the port pin
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
||
{
|
||
8000d78: b480 push {r7}
|
||
8000d7a: b083 sub sp, #12
|
||
8000d7c: af00 add r7, sp, #0
|
||
8000d7e: 6078 str r0, [r7, #4]
|
||
8000d80: 460b mov r3, r1
|
||
8000d82: 807b strh r3, [r7, #2]
|
||
8000d84: 4613 mov r3, r2
|
||
8000d86: 707b strb r3, [r7, #1]
|
||
/* Check the parameters */
|
||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
||
|
||
if (PinState != GPIO_PIN_RESET)
|
||
8000d88: 787b ldrb r3, [r7, #1]
|
||
8000d8a: 2b00 cmp r3, #0
|
||
8000d8c: d003 beq.n 8000d96 <HAL_GPIO_WritePin+0x1e>
|
||
{
|
||
GPIOx->BSRR = GPIO_Pin;
|
||
8000d8e: 887a ldrh r2, [r7, #2]
|
||
8000d90: 687b ldr r3, [r7, #4]
|
||
8000d92: 611a str r2, [r3, #16]
|
||
}
|
||
else
|
||
{
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
}
|
||
}
|
||
8000d94: e003 b.n 8000d9e <HAL_GPIO_WritePin+0x26>
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
8000d96: 887b ldrh r3, [r7, #2]
|
||
8000d98: 041a lsls r2, r3, #16
|
||
8000d9a: 687b ldr r3, [r7, #4]
|
||
8000d9c: 611a str r2, [r3, #16]
|
||
}
|
||
8000d9e: bf00 nop
|
||
8000da0: 370c adds r7, #12
|
||
8000da2: 46bd mov sp, r7
|
||
8000da4: bc80 pop {r7}
|
||
8000da6: 4770 bx lr
|
||
|
||
08000da8 <HAL_RCC_OscConfig>:
|
||
* supported by this macro. User should request a transition to HSE Off
|
||
* first and then HSE On or HSE Bypass.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
||
{
|
||
8000da8: b580 push {r7, lr}
|
||
8000daa: b086 sub sp, #24
|
||
8000dac: af00 add r7, sp, #0
|
||
8000dae: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart;
|
||
uint32_t pll_config;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_OscInitStruct == NULL)
|
||
8000db0: 687b ldr r3, [r7, #4]
|
||
8000db2: 2b00 cmp r3, #0
|
||
8000db4: d101 bne.n 8000dba <HAL_RCC_OscConfig+0x12>
|
||
{
|
||
return HAL_ERROR;
|
||
8000db6: 2301 movs r3, #1
|
||
8000db8: e26c b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
||
|
||
/*------------------------------- HSE Configuration ------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
||
8000dba: 687b ldr r3, [r7, #4]
|
||
8000dbc: 681b ldr r3, [r3, #0]
|
||
8000dbe: f003 0301 and.w r3, r3, #1
|
||
8000dc2: 2b00 cmp r3, #0
|
||
8000dc4: f000 8087 beq.w 8000ed6 <HAL_RCC_OscConfig+0x12e>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
||
|
||
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|
||
8000dc8: 4b92 ldr r3, [pc, #584] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000dca: 685b ldr r3, [r3, #4]
|
||
8000dcc: f003 030c and.w r3, r3, #12
|
||
8000dd0: 2b04 cmp r3, #4
|
||
8000dd2: d00c beq.n 8000dee <HAL_RCC_OscConfig+0x46>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
|
||
8000dd4: 4b8f ldr r3, [pc, #572] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000dd6: 685b ldr r3, [r3, #4]
|
||
8000dd8: f003 030c and.w r3, r3, #12
|
||
8000ddc: 2b08 cmp r3, #8
|
||
8000dde: d112 bne.n 8000e06 <HAL_RCC_OscConfig+0x5e>
|
||
8000de0: 4b8c ldr r3, [pc, #560] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000de2: 685b ldr r3, [r3, #4]
|
||
8000de4: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8000de8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8000dec: d10b bne.n 8000e06 <HAL_RCC_OscConfig+0x5e>
|
||
{
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8000dee: 4b89 ldr r3, [pc, #548] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000df0: 681b ldr r3, [r3, #0]
|
||
8000df2: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8000df6: 2b00 cmp r3, #0
|
||
8000df8: d06c beq.n 8000ed4 <HAL_RCC_OscConfig+0x12c>
|
||
8000dfa: 687b ldr r3, [r7, #4]
|
||
8000dfc: 685b ldr r3, [r3, #4]
|
||
8000dfe: 2b00 cmp r3, #0
|
||
8000e00: d168 bne.n 8000ed4 <HAL_RCC_OscConfig+0x12c>
|
||
{
|
||
return HAL_ERROR;
|
||
8000e02: 2301 movs r3, #1
|
||
8000e04: e246 b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Set the new HSE configuration ---------------------------------------*/
|
||
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
||
8000e06: 687b ldr r3, [r7, #4]
|
||
8000e08: 685b ldr r3, [r3, #4]
|
||
8000e0a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8000e0e: d106 bne.n 8000e1e <HAL_RCC_OscConfig+0x76>
|
||
8000e10: 4b80 ldr r3, [pc, #512] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e12: 681b ldr r3, [r3, #0]
|
||
8000e14: 4a7f ldr r2, [pc, #508] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e16: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8000e1a: 6013 str r3, [r2, #0]
|
||
8000e1c: e02e b.n 8000e7c <HAL_RCC_OscConfig+0xd4>
|
||
8000e1e: 687b ldr r3, [r7, #4]
|
||
8000e20: 685b ldr r3, [r3, #4]
|
||
8000e22: 2b00 cmp r3, #0
|
||
8000e24: d10c bne.n 8000e40 <HAL_RCC_OscConfig+0x98>
|
||
8000e26: 4b7b ldr r3, [pc, #492] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e28: 681b ldr r3, [r3, #0]
|
||
8000e2a: 4a7a ldr r2, [pc, #488] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e2c: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8000e30: 6013 str r3, [r2, #0]
|
||
8000e32: 4b78 ldr r3, [pc, #480] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e34: 681b ldr r3, [r3, #0]
|
||
8000e36: 4a77 ldr r2, [pc, #476] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e38: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8000e3c: 6013 str r3, [r2, #0]
|
||
8000e3e: e01d b.n 8000e7c <HAL_RCC_OscConfig+0xd4>
|
||
8000e40: 687b ldr r3, [r7, #4]
|
||
8000e42: 685b ldr r3, [r3, #4]
|
||
8000e44: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
|
||
8000e48: d10c bne.n 8000e64 <HAL_RCC_OscConfig+0xbc>
|
||
8000e4a: 4b72 ldr r3, [pc, #456] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e4c: 681b ldr r3, [r3, #0]
|
||
8000e4e: 4a71 ldr r2, [pc, #452] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e50: f443 2380 orr.w r3, r3, #262144 ; 0x40000
|
||
8000e54: 6013 str r3, [r2, #0]
|
||
8000e56: 4b6f ldr r3, [pc, #444] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e58: 681b ldr r3, [r3, #0]
|
||
8000e5a: 4a6e ldr r2, [pc, #440] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e5c: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8000e60: 6013 str r3, [r2, #0]
|
||
8000e62: e00b b.n 8000e7c <HAL_RCC_OscConfig+0xd4>
|
||
8000e64: 4b6b ldr r3, [pc, #428] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e66: 681b ldr r3, [r3, #0]
|
||
8000e68: 4a6a ldr r2, [pc, #424] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e6a: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8000e6e: 6013 str r3, [r2, #0]
|
||
8000e70: 4b68 ldr r3, [pc, #416] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e72: 681b ldr r3, [r3, #0]
|
||
8000e74: 4a67 ldr r2, [pc, #412] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000e76: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8000e7a: 6013 str r3, [r2, #0]
|
||
|
||
|
||
/* Check the HSE State */
|
||
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
|
||
8000e7c: 687b ldr r3, [r7, #4]
|
||
8000e7e: 685b ldr r3, [r3, #4]
|
||
8000e80: 2b00 cmp r3, #0
|
||
8000e82: d013 beq.n 8000eac <HAL_RCC_OscConfig+0x104>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8000e84: f7ff fcd2 bl 800082c <HAL_GetTick>
|
||
8000e88: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8000e8a: e008 b.n 8000e9e <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8000e8c: f7ff fcce bl 800082c <HAL_GetTick>
|
||
8000e90: 4602 mov r2, r0
|
||
8000e92: 693b ldr r3, [r7, #16]
|
||
8000e94: 1ad3 subs r3, r2, r3
|
||
8000e96: 2b64 cmp r3, #100 ; 0x64
|
||
8000e98: d901 bls.n 8000e9e <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8000e9a: 2303 movs r3, #3
|
||
8000e9c: e1fa b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8000e9e: 4b5d ldr r3, [pc, #372] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000ea0: 681b ldr r3, [r3, #0]
|
||
8000ea2: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8000ea6: 2b00 cmp r3, #0
|
||
8000ea8: d0f0 beq.n 8000e8c <HAL_RCC_OscConfig+0xe4>
|
||
8000eaa: e014 b.n 8000ed6 <HAL_RCC_OscConfig+0x12e>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8000eac: f7ff fcbe bl 800082c <HAL_GetTick>
|
||
8000eb0: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8000eb2: e008 b.n 8000ec6 <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8000eb4: f7ff fcba bl 800082c <HAL_GetTick>
|
||
8000eb8: 4602 mov r2, r0
|
||
8000eba: 693b ldr r3, [r7, #16]
|
||
8000ebc: 1ad3 subs r3, r2, r3
|
||
8000ebe: 2b64 cmp r3, #100 ; 0x64
|
||
8000ec0: d901 bls.n 8000ec6 <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8000ec2: 2303 movs r3, #3
|
||
8000ec4: e1e6 b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8000ec6: 4b53 ldr r3, [pc, #332] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000ec8: 681b ldr r3, [r3, #0]
|
||
8000eca: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8000ece: 2b00 cmp r3, #0
|
||
8000ed0: d1f0 bne.n 8000eb4 <HAL_RCC_OscConfig+0x10c>
|
||
8000ed2: e000 b.n 8000ed6 <HAL_RCC_OscConfig+0x12e>
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8000ed4: bf00 nop
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*----------------------------- HSI Configuration --------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
||
8000ed6: 687b ldr r3, [r7, #4]
|
||
8000ed8: 681b ldr r3, [r3, #0]
|
||
8000eda: f003 0302 and.w r3, r3, #2
|
||
8000ede: 2b00 cmp r3, #0
|
||
8000ee0: d063 beq.n 8000faa <HAL_RCC_OscConfig+0x202>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
||
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
||
|
||
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
|
||
8000ee2: 4b4c ldr r3, [pc, #304] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000ee4: 685b ldr r3, [r3, #4]
|
||
8000ee6: f003 030c and.w r3, r3, #12
|
||
8000eea: 2b00 cmp r3, #0
|
||
8000eec: d00b beq.n 8000f06 <HAL_RCC_OscConfig+0x15e>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
|
||
8000eee: 4b49 ldr r3, [pc, #292] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000ef0: 685b ldr r3, [r3, #4]
|
||
8000ef2: f003 030c and.w r3, r3, #12
|
||
8000ef6: 2b08 cmp r3, #8
|
||
8000ef8: d11c bne.n 8000f34 <HAL_RCC_OscConfig+0x18c>
|
||
8000efa: 4b46 ldr r3, [pc, #280] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000efc: 685b ldr r3, [r3, #4]
|
||
8000efe: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8000f02: 2b00 cmp r3, #0
|
||
8000f04: d116 bne.n 8000f34 <HAL_RCC_OscConfig+0x18c>
|
||
{
|
||
/* When HSI is used as system clock it will not disabled */
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8000f06: 4b43 ldr r3, [pc, #268] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000f08: 681b ldr r3, [r3, #0]
|
||
8000f0a: f003 0302 and.w r3, r3, #2
|
||
8000f0e: 2b00 cmp r3, #0
|
||
8000f10: d005 beq.n 8000f1e <HAL_RCC_OscConfig+0x176>
|
||
8000f12: 687b ldr r3, [r7, #4]
|
||
8000f14: 691b ldr r3, [r3, #16]
|
||
8000f16: 2b01 cmp r3, #1
|
||
8000f18: d001 beq.n 8000f1e <HAL_RCC_OscConfig+0x176>
|
||
{
|
||
return HAL_ERROR;
|
||
8000f1a: 2301 movs r3, #1
|
||
8000f1c: e1ba b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
/* Otherwise, just the calibration is allowed */
|
||
else
|
||
{
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8000f1e: 4b3d ldr r3, [pc, #244] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000f20: 681b ldr r3, [r3, #0]
|
||
8000f22: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8000f26: 687b ldr r3, [r7, #4]
|
||
8000f28: 695b ldr r3, [r3, #20]
|
||
8000f2a: 00db lsls r3, r3, #3
|
||
8000f2c: 4939 ldr r1, [pc, #228] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000f2e: 4313 orrs r3, r2
|
||
8000f30: 600b str r3, [r1, #0]
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8000f32: e03a b.n 8000faa <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check the HSI State */
|
||
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
|
||
8000f34: 687b ldr r3, [r7, #4]
|
||
8000f36: 691b ldr r3, [r3, #16]
|
||
8000f38: 2b00 cmp r3, #0
|
||
8000f3a: d020 beq.n 8000f7e <HAL_RCC_OscConfig+0x1d6>
|
||
{
|
||
/* Enable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_ENABLE();
|
||
8000f3c: 4b36 ldr r3, [pc, #216] ; (8001018 <HAL_RCC_OscConfig+0x270>)
|
||
8000f3e: 2201 movs r2, #1
|
||
8000f40: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8000f42: f7ff fc73 bl 800082c <HAL_GetTick>
|
||
8000f46: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8000f48: e008 b.n 8000f5c <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
8000f4a: f7ff fc6f bl 800082c <HAL_GetTick>
|
||
8000f4e: 4602 mov r2, r0
|
||
8000f50: 693b ldr r3, [r7, #16]
|
||
8000f52: 1ad3 subs r3, r2, r3
|
||
8000f54: 2b02 cmp r3, #2
|
||
8000f56: d901 bls.n 8000f5c <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8000f58: 2303 movs r3, #3
|
||
8000f5a: e19b b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8000f5c: 4b2d ldr r3, [pc, #180] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000f5e: 681b ldr r3, [r3, #0]
|
||
8000f60: f003 0302 and.w r3, r3, #2
|
||
8000f64: 2b00 cmp r3, #0
|
||
8000f66: d0f0 beq.n 8000f4a <HAL_RCC_OscConfig+0x1a2>
|
||
}
|
||
}
|
||
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8000f68: 4b2a ldr r3, [pc, #168] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000f6a: 681b ldr r3, [r3, #0]
|
||
8000f6c: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8000f70: 687b ldr r3, [r7, #4]
|
||
8000f72: 695b ldr r3, [r3, #20]
|
||
8000f74: 00db lsls r3, r3, #3
|
||
8000f76: 4927 ldr r1, [pc, #156] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000f78: 4313 orrs r3, r2
|
||
8000f7a: 600b str r3, [r1, #0]
|
||
8000f7c: e015 b.n 8000faa <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_DISABLE();
|
||
8000f7e: 4b26 ldr r3, [pc, #152] ; (8001018 <HAL_RCC_OscConfig+0x270>)
|
||
8000f80: 2200 movs r2, #0
|
||
8000f82: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8000f84: f7ff fc52 bl 800082c <HAL_GetTick>
|
||
8000f88: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
8000f8a: e008 b.n 8000f9e <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
8000f8c: f7ff fc4e bl 800082c <HAL_GetTick>
|
||
8000f90: 4602 mov r2, r0
|
||
8000f92: 693b ldr r3, [r7, #16]
|
||
8000f94: 1ad3 subs r3, r2, r3
|
||
8000f96: 2b02 cmp r3, #2
|
||
8000f98: d901 bls.n 8000f9e <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8000f9a: 2303 movs r3, #3
|
||
8000f9c: e17a b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
8000f9e: 4b1d ldr r3, [pc, #116] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000fa0: 681b ldr r3, [r3, #0]
|
||
8000fa2: f003 0302 and.w r3, r3, #2
|
||
8000fa6: 2b00 cmp r3, #0
|
||
8000fa8: d1f0 bne.n 8000f8c <HAL_RCC_OscConfig+0x1e4>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSI Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
||
8000faa: 687b ldr r3, [r7, #4]
|
||
8000fac: 681b ldr r3, [r3, #0]
|
||
8000fae: f003 0308 and.w r3, r3, #8
|
||
8000fb2: 2b00 cmp r3, #0
|
||
8000fb4: d03a beq.n 800102c <HAL_RCC_OscConfig+0x284>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
||
|
||
/* Check the LSI State */
|
||
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
|
||
8000fb6: 687b ldr r3, [r7, #4]
|
||
8000fb8: 699b ldr r3, [r3, #24]
|
||
8000fba: 2b00 cmp r3, #0
|
||
8000fbc: d019 beq.n 8000ff2 <HAL_RCC_OscConfig+0x24a>
|
||
{
|
||
/* Enable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_ENABLE();
|
||
8000fbe: 4b17 ldr r3, [pc, #92] ; (800101c <HAL_RCC_OscConfig+0x274>)
|
||
8000fc0: 2201 movs r2, #1
|
||
8000fc2: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8000fc4: f7ff fc32 bl 800082c <HAL_GetTick>
|
||
8000fc8: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
8000fca: e008 b.n 8000fde <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
8000fcc: f7ff fc2e bl 800082c <HAL_GetTick>
|
||
8000fd0: 4602 mov r2, r0
|
||
8000fd2: 693b ldr r3, [r7, #16]
|
||
8000fd4: 1ad3 subs r3, r2, r3
|
||
8000fd6: 2b02 cmp r3, #2
|
||
8000fd8: d901 bls.n 8000fde <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8000fda: 2303 movs r3, #3
|
||
8000fdc: e15a b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
8000fde: 4b0d ldr r3, [pc, #52] ; (8001014 <HAL_RCC_OscConfig+0x26c>)
|
||
8000fe0: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8000fe2: f003 0302 and.w r3, r3, #2
|
||
8000fe6: 2b00 cmp r3, #0
|
||
8000fe8: d0f0 beq.n 8000fcc <HAL_RCC_OscConfig+0x224>
|
||
}
|
||
}
|
||
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
|
||
should be added.*/
|
||
RCC_Delay(1);
|
||
8000fea: 2001 movs r0, #1
|
||
8000fec: f000 faa6 bl 800153c <RCC_Delay>
|
||
8000ff0: e01c b.n 800102c <HAL_RCC_OscConfig+0x284>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_DISABLE();
|
||
8000ff2: 4b0a ldr r3, [pc, #40] ; (800101c <HAL_RCC_OscConfig+0x274>)
|
||
8000ff4: 2200 movs r2, #0
|
||
8000ff6: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8000ff8: f7ff fc18 bl 800082c <HAL_GetTick>
|
||
8000ffc: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
8000ffe: e00f b.n 8001020 <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
8001000: f7ff fc14 bl 800082c <HAL_GetTick>
|
||
8001004: 4602 mov r2, r0
|
||
8001006: 693b ldr r3, [r7, #16]
|
||
8001008: 1ad3 subs r3, r2, r3
|
||
800100a: 2b02 cmp r3, #2
|
||
800100c: d908 bls.n 8001020 <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800100e: 2303 movs r3, #3
|
||
8001010: e140 b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
8001012: bf00 nop
|
||
8001014: 40021000 .word 0x40021000
|
||
8001018: 42420000 .word 0x42420000
|
||
800101c: 42420480 .word 0x42420480
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
8001020: 4b9e ldr r3, [pc, #632] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001022: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8001024: f003 0302 and.w r3, r3, #2
|
||
8001028: 2b00 cmp r3, #0
|
||
800102a: d1e9 bne.n 8001000 <HAL_RCC_OscConfig+0x258>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSE Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
||
800102c: 687b ldr r3, [r7, #4]
|
||
800102e: 681b ldr r3, [r3, #0]
|
||
8001030: f003 0304 and.w r3, r3, #4
|
||
8001034: 2b00 cmp r3, #0
|
||
8001036: f000 80a6 beq.w 8001186 <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
FlagStatus pwrclkchanged = RESET;
|
||
800103a: 2300 movs r3, #0
|
||
800103c: 75fb strb r3, [r7, #23]
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
||
|
||
/* Update LSE configuration in Backup Domain control register */
|
||
/* Requires to enable write access to Backup Domain of necessary */
|
||
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
|
||
800103e: 4b97 ldr r3, [pc, #604] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001040: 69db ldr r3, [r3, #28]
|
||
8001042: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8001046: 2b00 cmp r3, #0
|
||
8001048: d10d bne.n 8001066 <HAL_RCC_OscConfig+0x2be>
|
||
{
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
800104a: 4b94 ldr r3, [pc, #592] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
800104c: 69db ldr r3, [r3, #28]
|
||
800104e: 4a93 ldr r2, [pc, #588] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001050: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
8001054: 61d3 str r3, [r2, #28]
|
||
8001056: 4b91 ldr r3, [pc, #580] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001058: 69db ldr r3, [r3, #28]
|
||
800105a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
800105e: 60bb str r3, [r7, #8]
|
||
8001060: 68bb ldr r3, [r7, #8]
|
||
pwrclkchanged = SET;
|
||
8001062: 2301 movs r3, #1
|
||
8001064: 75fb strb r3, [r7, #23]
|
||
}
|
||
|
||
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8001066: 4b8e ldr r3, [pc, #568] ; (80012a0 <HAL_RCC_OscConfig+0x4f8>)
|
||
8001068: 681b ldr r3, [r3, #0]
|
||
800106a: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
800106e: 2b00 cmp r3, #0
|
||
8001070: d118 bne.n 80010a4 <HAL_RCC_OscConfig+0x2fc>
|
||
{
|
||
/* Enable write access to Backup domain */
|
||
SET_BIT(PWR->CR, PWR_CR_DBP);
|
||
8001072: 4b8b ldr r3, [pc, #556] ; (80012a0 <HAL_RCC_OscConfig+0x4f8>)
|
||
8001074: 681b ldr r3, [r3, #0]
|
||
8001076: 4a8a ldr r2, [pc, #552] ; (80012a0 <HAL_RCC_OscConfig+0x4f8>)
|
||
8001078: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
800107c: 6013 str r3, [r2, #0]
|
||
|
||
/* Wait for Backup domain Write protection disable */
|
||
tickstart = HAL_GetTick();
|
||
800107e: f7ff fbd5 bl 800082c <HAL_GetTick>
|
||
8001082: 6138 str r0, [r7, #16]
|
||
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8001084: e008 b.n 8001098 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
||
8001086: f7ff fbd1 bl 800082c <HAL_GetTick>
|
||
800108a: 4602 mov r2, r0
|
||
800108c: 693b ldr r3, [r7, #16]
|
||
800108e: 1ad3 subs r3, r2, r3
|
||
8001090: 2b64 cmp r3, #100 ; 0x64
|
||
8001092: d901 bls.n 8001098 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001094: 2303 movs r3, #3
|
||
8001096: e0fd b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8001098: 4b81 ldr r3, [pc, #516] ; (80012a0 <HAL_RCC_OscConfig+0x4f8>)
|
||
800109a: 681b ldr r3, [r3, #0]
|
||
800109c: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
80010a0: 2b00 cmp r3, #0
|
||
80010a2: d0f0 beq.n 8001086 <HAL_RCC_OscConfig+0x2de>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Set the new LSE configuration -----------------------------------------*/
|
||
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
||
80010a4: 687b ldr r3, [r7, #4]
|
||
80010a6: 68db ldr r3, [r3, #12]
|
||
80010a8: 2b01 cmp r3, #1
|
||
80010aa: d106 bne.n 80010ba <HAL_RCC_OscConfig+0x312>
|
||
80010ac: 4b7b ldr r3, [pc, #492] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80010ae: 6a1b ldr r3, [r3, #32]
|
||
80010b0: 4a7a ldr r2, [pc, #488] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80010b2: f043 0301 orr.w r3, r3, #1
|
||
80010b6: 6213 str r3, [r2, #32]
|
||
80010b8: e02d b.n 8001116 <HAL_RCC_OscConfig+0x36e>
|
||
80010ba: 687b ldr r3, [r7, #4]
|
||
80010bc: 68db ldr r3, [r3, #12]
|
||
80010be: 2b00 cmp r3, #0
|
||
80010c0: d10c bne.n 80010dc <HAL_RCC_OscConfig+0x334>
|
||
80010c2: 4b76 ldr r3, [pc, #472] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80010c4: 6a1b ldr r3, [r3, #32]
|
||
80010c6: 4a75 ldr r2, [pc, #468] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80010c8: f023 0301 bic.w r3, r3, #1
|
||
80010cc: 6213 str r3, [r2, #32]
|
||
80010ce: 4b73 ldr r3, [pc, #460] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80010d0: 6a1b ldr r3, [r3, #32]
|
||
80010d2: 4a72 ldr r2, [pc, #456] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80010d4: f023 0304 bic.w r3, r3, #4
|
||
80010d8: 6213 str r3, [r2, #32]
|
||
80010da: e01c b.n 8001116 <HAL_RCC_OscConfig+0x36e>
|
||
80010dc: 687b ldr r3, [r7, #4]
|
||
80010de: 68db ldr r3, [r3, #12]
|
||
80010e0: 2b05 cmp r3, #5
|
||
80010e2: d10c bne.n 80010fe <HAL_RCC_OscConfig+0x356>
|
||
80010e4: 4b6d ldr r3, [pc, #436] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80010e6: 6a1b ldr r3, [r3, #32]
|
||
80010e8: 4a6c ldr r2, [pc, #432] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80010ea: f043 0304 orr.w r3, r3, #4
|
||
80010ee: 6213 str r3, [r2, #32]
|
||
80010f0: 4b6a ldr r3, [pc, #424] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80010f2: 6a1b ldr r3, [r3, #32]
|
||
80010f4: 4a69 ldr r2, [pc, #420] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80010f6: f043 0301 orr.w r3, r3, #1
|
||
80010fa: 6213 str r3, [r2, #32]
|
||
80010fc: e00b b.n 8001116 <HAL_RCC_OscConfig+0x36e>
|
||
80010fe: 4b67 ldr r3, [pc, #412] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001100: 6a1b ldr r3, [r3, #32]
|
||
8001102: 4a66 ldr r2, [pc, #408] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001104: f023 0301 bic.w r3, r3, #1
|
||
8001108: 6213 str r3, [r2, #32]
|
||
800110a: 4b64 ldr r3, [pc, #400] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
800110c: 6a1b ldr r3, [r3, #32]
|
||
800110e: 4a63 ldr r2, [pc, #396] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001110: f023 0304 bic.w r3, r3, #4
|
||
8001114: 6213 str r3, [r2, #32]
|
||
/* Check the LSE State */
|
||
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
|
||
8001116: 687b ldr r3, [r7, #4]
|
||
8001118: 68db ldr r3, [r3, #12]
|
||
800111a: 2b00 cmp r3, #0
|
||
800111c: d015 beq.n 800114a <HAL_RCC_OscConfig+0x3a2>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
800111e: f7ff fb85 bl 800082c <HAL_GetTick>
|
||
8001122: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
8001124: e00a b.n 800113c <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
8001126: f7ff fb81 bl 800082c <HAL_GetTick>
|
||
800112a: 4602 mov r2, r0
|
||
800112c: 693b ldr r3, [r7, #16]
|
||
800112e: 1ad3 subs r3, r2, r3
|
||
8001130: f241 3288 movw r2, #5000 ; 0x1388
|
||
8001134: 4293 cmp r3, r2
|
||
8001136: d901 bls.n 800113c <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001138: 2303 movs r3, #3
|
||
800113a: e0ab b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
800113c: 4b57 ldr r3, [pc, #348] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
800113e: 6a1b ldr r3, [r3, #32]
|
||
8001140: f003 0302 and.w r3, r3, #2
|
||
8001144: 2b00 cmp r3, #0
|
||
8001146: d0ee beq.n 8001126 <HAL_RCC_OscConfig+0x37e>
|
||
8001148: e014 b.n 8001174 <HAL_RCC_OscConfig+0x3cc>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
800114a: f7ff fb6f bl 800082c <HAL_GetTick>
|
||
800114e: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
8001150: e00a b.n 8001168 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
8001152: f7ff fb6b bl 800082c <HAL_GetTick>
|
||
8001156: 4602 mov r2, r0
|
||
8001158: 693b ldr r3, [r7, #16]
|
||
800115a: 1ad3 subs r3, r2, r3
|
||
800115c: f241 3288 movw r2, #5000 ; 0x1388
|
||
8001160: 4293 cmp r3, r2
|
||
8001162: d901 bls.n 8001168 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001164: 2303 movs r3, #3
|
||
8001166: e095 b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
8001168: 4b4c ldr r3, [pc, #304] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
800116a: 6a1b ldr r3, [r3, #32]
|
||
800116c: f003 0302 and.w r3, r3, #2
|
||
8001170: 2b00 cmp r3, #0
|
||
8001172: d1ee bne.n 8001152 <HAL_RCC_OscConfig+0x3aa>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Require to disable power clock if necessary */
|
||
if (pwrclkchanged == SET)
|
||
8001174: 7dfb ldrb r3, [r7, #23]
|
||
8001176: 2b01 cmp r3, #1
|
||
8001178: d105 bne.n 8001186 <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
__HAL_RCC_PWR_CLK_DISABLE();
|
||
800117a: 4b48 ldr r3, [pc, #288] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
800117c: 69db ldr r3, [r3, #28]
|
||
800117e: 4a47 ldr r2, [pc, #284] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001180: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
|
||
8001184: 61d3 str r3, [r2, #28]
|
||
|
||
#endif /* RCC_CR_PLL2ON */
|
||
/*-------------------------------- PLL Configuration -----------------------*/
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
||
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
||
8001186: 687b ldr r3, [r7, #4]
|
||
8001188: 69db ldr r3, [r3, #28]
|
||
800118a: 2b00 cmp r3, #0
|
||
800118c: f000 8081 beq.w 8001292 <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
/* Check if the PLL is used as system clock or not */
|
||
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
|
||
8001190: 4b42 ldr r3, [pc, #264] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001192: 685b ldr r3, [r3, #4]
|
||
8001194: f003 030c and.w r3, r3, #12
|
||
8001198: 2b08 cmp r3, #8
|
||
800119a: d061 beq.n 8001260 <HAL_RCC_OscConfig+0x4b8>
|
||
{
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
||
800119c: 687b ldr r3, [r7, #4]
|
||
800119e: 69db ldr r3, [r3, #28]
|
||
80011a0: 2b02 cmp r3, #2
|
||
80011a2: d146 bne.n 8001232 <HAL_RCC_OscConfig+0x48a>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
|
||
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
|
||
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
80011a4: 4b3f ldr r3, [pc, #252] ; (80012a4 <HAL_RCC_OscConfig+0x4fc>)
|
||
80011a6: 2200 movs r2, #0
|
||
80011a8: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80011aa: f7ff fb3f bl 800082c <HAL_GetTick>
|
||
80011ae: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
80011b0: e008 b.n 80011c4 <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
80011b2: f7ff fb3b bl 800082c <HAL_GetTick>
|
||
80011b6: 4602 mov r2, r0
|
||
80011b8: 693b ldr r3, [r7, #16]
|
||
80011ba: 1ad3 subs r3, r2, r3
|
||
80011bc: 2b02 cmp r3, #2
|
||
80011be: d901 bls.n 80011c4 <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80011c0: 2303 movs r3, #3
|
||
80011c2: e067 b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
80011c4: 4b35 ldr r3, [pc, #212] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80011c6: 681b ldr r3, [r3, #0]
|
||
80011c8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
80011cc: 2b00 cmp r3, #0
|
||
80011ce: d1f0 bne.n 80011b2 <HAL_RCC_OscConfig+0x40a>
|
||
}
|
||
}
|
||
|
||
/* Configure the HSE prediv factor --------------------------------*/
|
||
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
|
||
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
|
||
80011d0: 687b ldr r3, [r7, #4]
|
||
80011d2: 6a1b ldr r3, [r3, #32]
|
||
80011d4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
80011d8: d108 bne.n 80011ec <HAL_RCC_OscConfig+0x444>
|
||
/* Set PREDIV1 source */
|
||
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
|
||
#endif /* RCC_CFGR2_PREDIV1SRC */
|
||
|
||
/* Set PREDIV1 Value */
|
||
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
|
||
80011da: 4b30 ldr r3, [pc, #192] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80011dc: 685b ldr r3, [r3, #4]
|
||
80011de: f423 3200 bic.w r2, r3, #131072 ; 0x20000
|
||
80011e2: 687b ldr r3, [r7, #4]
|
||
80011e4: 689b ldr r3, [r3, #8]
|
||
80011e6: 492d ldr r1, [pc, #180] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80011e8: 4313 orrs r3, r2
|
||
80011ea: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Configure the main PLL clock source and multiplication factors. */
|
||
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
||
80011ec: 4b2b ldr r3, [pc, #172] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
80011ee: 685b ldr r3, [r3, #4]
|
||
80011f0: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000
|
||
80011f4: 687b ldr r3, [r7, #4]
|
||
80011f6: 6a19 ldr r1, [r3, #32]
|
||
80011f8: 687b ldr r3, [r7, #4]
|
||
80011fa: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80011fc: 430b orrs r3, r1
|
||
80011fe: 4927 ldr r1, [pc, #156] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001200: 4313 orrs r3, r2
|
||
8001202: 604b str r3, [r1, #4]
|
||
RCC_OscInitStruct->PLL.PLLMUL);
|
||
/* Enable the main PLL. */
|
||
__HAL_RCC_PLL_ENABLE();
|
||
8001204: 4b27 ldr r3, [pc, #156] ; (80012a4 <HAL_RCC_OscConfig+0x4fc>)
|
||
8001206: 2201 movs r2, #1
|
||
8001208: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
800120a: f7ff fb0f bl 800082c <HAL_GetTick>
|
||
800120e: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
8001210: e008 b.n 8001224 <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
8001212: f7ff fb0b bl 800082c <HAL_GetTick>
|
||
8001216: 4602 mov r2, r0
|
||
8001218: 693b ldr r3, [r7, #16]
|
||
800121a: 1ad3 subs r3, r2, r3
|
||
800121c: 2b02 cmp r3, #2
|
||
800121e: d901 bls.n 8001224 <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001220: 2303 movs r3, #3
|
||
8001222: e037 b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
8001224: 4b1d ldr r3, [pc, #116] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001226: 681b ldr r3, [r3, #0]
|
||
8001228: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
800122c: 2b00 cmp r3, #0
|
||
800122e: d0f0 beq.n 8001212 <HAL_RCC_OscConfig+0x46a>
|
||
8001230: e02f b.n 8001292 <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
8001232: 4b1c ldr r3, [pc, #112] ; (80012a4 <HAL_RCC_OscConfig+0x4fc>)
|
||
8001234: 2200 movs r2, #0
|
||
8001236: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8001238: f7ff faf8 bl 800082c <HAL_GetTick>
|
||
800123c: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
800123e: e008 b.n 8001252 <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
8001240: f7ff faf4 bl 800082c <HAL_GetTick>
|
||
8001244: 4602 mov r2, r0
|
||
8001246: 693b ldr r3, [r7, #16]
|
||
8001248: 1ad3 subs r3, r2, r3
|
||
800124a: 2b02 cmp r3, #2
|
||
800124c: d901 bls.n 8001252 <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800124e: 2303 movs r3, #3
|
||
8001250: e020 b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
8001252: 4b12 ldr r3, [pc, #72] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
8001254: 681b ldr r3, [r3, #0]
|
||
8001256: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
800125a: 2b00 cmp r3, #0
|
||
800125c: d1f0 bne.n 8001240 <HAL_RCC_OscConfig+0x498>
|
||
800125e: e018 b.n 8001292 <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check if there is a request to disable the PLL used as System clock source */
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
||
8001260: 687b ldr r3, [r7, #4]
|
||
8001262: 69db ldr r3, [r3, #28]
|
||
8001264: 2b01 cmp r3, #1
|
||
8001266: d101 bne.n 800126c <HAL_RCC_OscConfig+0x4c4>
|
||
{
|
||
return HAL_ERROR;
|
||
8001268: 2301 movs r3, #1
|
||
800126a: e013 b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
else
|
||
{
|
||
/* Do not return HAL_ERROR if request repeats the current configuration */
|
||
pll_config = RCC->CFGR;
|
||
800126c: 4b0b ldr r3, [pc, #44] ; (800129c <HAL_RCC_OscConfig+0x4f4>)
|
||
800126e: 685b ldr r3, [r3, #4]
|
||
8001270: 60fb str r3, [r7, #12]
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
8001272: 68fb ldr r3, [r7, #12]
|
||
8001274: f403 3280 and.w r2, r3, #65536 ; 0x10000
|
||
8001278: 687b ldr r3, [r7, #4]
|
||
800127a: 6a1b ldr r3, [r3, #32]
|
||
800127c: 429a cmp r2, r3
|
||
800127e: d106 bne.n 800128e <HAL_RCC_OscConfig+0x4e6>
|
||
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
|
||
8001280: 68fb ldr r3, [r7, #12]
|
||
8001282: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
|
||
8001286: 687b ldr r3, [r7, #4]
|
||
8001288: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
800128a: 429a cmp r2, r3
|
||
800128c: d001 beq.n 8001292 <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
return HAL_ERROR;
|
||
800128e: 2301 movs r3, #1
|
||
8001290: e000 b.n 8001294 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
return HAL_OK;
|
||
8001292: 2300 movs r3, #0
|
||
}
|
||
8001294: 4618 mov r0, r3
|
||
8001296: 3718 adds r7, #24
|
||
8001298: 46bd mov sp, r7
|
||
800129a: bd80 pop {r7, pc}
|
||
800129c: 40021000 .word 0x40021000
|
||
80012a0: 40007000 .word 0x40007000
|
||
80012a4: 42420060 .word 0x42420060
|
||
|
||
080012a8 <HAL_RCC_ClockConfig>:
|
||
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
|
||
* currently used as system clock source.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
||
{
|
||
80012a8: b580 push {r7, lr}
|
||
80012aa: b084 sub sp, #16
|
||
80012ac: af00 add r7, sp, #0
|
||
80012ae: 6078 str r0, [r7, #4]
|
||
80012b0: 6039 str r1, [r7, #0]
|
||
uint32_t tickstart;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_ClkInitStruct == NULL)
|
||
80012b2: 687b ldr r3, [r7, #4]
|
||
80012b4: 2b00 cmp r3, #0
|
||
80012b6: d101 bne.n 80012bc <HAL_RCC_ClockConfig+0x14>
|
||
{
|
||
return HAL_ERROR;
|
||
80012b8: 2301 movs r3, #1
|
||
80012ba: e0d0 b.n 800145e <HAL_RCC_ClockConfig+0x1b6>
|
||
must be correctly programmed according to the frequency of the CPU clock
|
||
(HCLK) of the device. */
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Increasing the number of wait states because of higher CPU frequency */
|
||
if (FLatency > __HAL_FLASH_GET_LATENCY())
|
||
80012bc: 4b6a ldr r3, [pc, #424] ; (8001468 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80012be: 681b ldr r3, [r3, #0]
|
||
80012c0: f003 0307 and.w r3, r3, #7
|
||
80012c4: 683a ldr r2, [r7, #0]
|
||
80012c6: 429a cmp r2, r3
|
||
80012c8: d910 bls.n 80012ec <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
80012ca: 4b67 ldr r3, [pc, #412] ; (8001468 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80012cc: 681b ldr r3, [r3, #0]
|
||
80012ce: f023 0207 bic.w r2, r3, #7
|
||
80012d2: 4965 ldr r1, [pc, #404] ; (8001468 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80012d4: 683b ldr r3, [r7, #0]
|
||
80012d6: 4313 orrs r3, r2
|
||
80012d8: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
80012da: 4b63 ldr r3, [pc, #396] ; (8001468 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80012dc: 681b ldr r3, [r3, #0]
|
||
80012de: f003 0307 and.w r3, r3, #7
|
||
80012e2: 683a ldr r2, [r7, #0]
|
||
80012e4: 429a cmp r2, r3
|
||
80012e6: d001 beq.n 80012ec <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
return HAL_ERROR;
|
||
80012e8: 2301 movs r3, #1
|
||
80012ea: e0b8 b.n 800145e <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
/*-------------------------- HCLK Configuration --------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
||
80012ec: 687b ldr r3, [r7, #4]
|
||
80012ee: 681b ldr r3, [r3, #0]
|
||
80012f0: f003 0302 and.w r3, r3, #2
|
||
80012f4: 2b00 cmp r3, #0
|
||
80012f6: d020 beq.n 800133a <HAL_RCC_ClockConfig+0x92>
|
||
{
|
||
/* Set the highest APBx dividers in order to ensure that we do not go through
|
||
a non-spec phase whatever we decrease or increase HCLK. */
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
80012f8: 687b ldr r3, [r7, #4]
|
||
80012fa: 681b ldr r3, [r3, #0]
|
||
80012fc: f003 0304 and.w r3, r3, #4
|
||
8001300: 2b00 cmp r3, #0
|
||
8001302: d005 beq.n 8001310 <HAL_RCC_ClockConfig+0x68>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
|
||
8001304: 4b59 ldr r3, [pc, #356] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001306: 685b ldr r3, [r3, #4]
|
||
8001308: 4a58 ldr r2, [pc, #352] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
800130a: f443 63e0 orr.w r3, r3, #1792 ; 0x700
|
||
800130e: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
8001310: 687b ldr r3, [r7, #4]
|
||
8001312: 681b ldr r3, [r3, #0]
|
||
8001314: f003 0308 and.w r3, r3, #8
|
||
8001318: 2b00 cmp r3, #0
|
||
800131a: d005 beq.n 8001328 <HAL_RCC_ClockConfig+0x80>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
|
||
800131c: 4b53 ldr r3, [pc, #332] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
800131e: 685b ldr r3, [r3, #4]
|
||
8001320: 4a52 ldr r2, [pc, #328] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001322: f443 5360 orr.w r3, r3, #14336 ; 0x3800
|
||
8001326: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
/* Set the new HCLK clock divider */
|
||
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
||
8001328: 4b50 ldr r3, [pc, #320] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
800132a: 685b ldr r3, [r3, #4]
|
||
800132c: f023 02f0 bic.w r2, r3, #240 ; 0xf0
|
||
8001330: 687b ldr r3, [r7, #4]
|
||
8001332: 689b ldr r3, [r3, #8]
|
||
8001334: 494d ldr r1, [pc, #308] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001336: 4313 orrs r3, r2
|
||
8001338: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*------------------------- SYSCLK Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
||
800133a: 687b ldr r3, [r7, #4]
|
||
800133c: 681b ldr r3, [r3, #0]
|
||
800133e: f003 0301 and.w r3, r3, #1
|
||
8001342: 2b00 cmp r3, #0
|
||
8001344: d040 beq.n 80013c8 <HAL_RCC_ClockConfig+0x120>
|
||
{
|
||
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
||
|
||
/* HSE is selected as System Clock Source */
|
||
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
||
8001346: 687b ldr r3, [r7, #4]
|
||
8001348: 685b ldr r3, [r3, #4]
|
||
800134a: 2b01 cmp r3, #1
|
||
800134c: d107 bne.n 800135e <HAL_RCC_ClockConfig+0xb6>
|
||
{
|
||
/* Check the HSE ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
800134e: 4b47 ldr r3, [pc, #284] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001350: 681b ldr r3, [r3, #0]
|
||
8001352: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8001356: 2b00 cmp r3, #0
|
||
8001358: d115 bne.n 8001386 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
800135a: 2301 movs r3, #1
|
||
800135c: e07f b.n 800145e <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
/* PLL is selected as System Clock Source */
|
||
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
|
||
800135e: 687b ldr r3, [r7, #4]
|
||
8001360: 685b ldr r3, [r3, #4]
|
||
8001362: 2b02 cmp r3, #2
|
||
8001364: d107 bne.n 8001376 <HAL_RCC_ClockConfig+0xce>
|
||
{
|
||
/* Check the PLL ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
8001366: 4b41 ldr r3, [pc, #260] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001368: 681b ldr r3, [r3, #0]
|
||
800136a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
800136e: 2b00 cmp r3, #0
|
||
8001370: d109 bne.n 8001386 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
8001372: 2301 movs r3, #1
|
||
8001374: e073 b.n 800145e <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
/* HSI is selected as System Clock Source */
|
||
else
|
||
{
|
||
/* Check the HSI ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8001376: 4b3d ldr r3, [pc, #244] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001378: 681b ldr r3, [r3, #0]
|
||
800137a: f003 0302 and.w r3, r3, #2
|
||
800137e: 2b00 cmp r3, #0
|
||
8001380: d101 bne.n 8001386 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
8001382: 2301 movs r3, #1
|
||
8001384: e06b b.n 800145e <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
||
8001386: 4b39 ldr r3, [pc, #228] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001388: 685b ldr r3, [r3, #4]
|
||
800138a: f023 0203 bic.w r2, r3, #3
|
||
800138e: 687b ldr r3, [r7, #4]
|
||
8001390: 685b ldr r3, [r3, #4]
|
||
8001392: 4936 ldr r1, [pc, #216] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001394: 4313 orrs r3, r2
|
||
8001396: 604b str r3, [r1, #4]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8001398: f7ff fa48 bl 800082c <HAL_GetTick>
|
||
800139c: 60f8 str r0, [r7, #12]
|
||
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
800139e: e00a b.n 80013b6 <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
||
80013a0: f7ff fa44 bl 800082c <HAL_GetTick>
|
||
80013a4: 4602 mov r2, r0
|
||
80013a6: 68fb ldr r3, [r7, #12]
|
||
80013a8: 1ad3 subs r3, r2, r3
|
||
80013aa: f241 3288 movw r2, #5000 ; 0x1388
|
||
80013ae: 4293 cmp r3, r2
|
||
80013b0: d901 bls.n 80013b6 <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80013b2: 2303 movs r3, #3
|
||
80013b4: e053 b.n 800145e <HAL_RCC_ClockConfig+0x1b6>
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
80013b6: 4b2d ldr r3, [pc, #180] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
80013b8: 685b ldr r3, [r3, #4]
|
||
80013ba: f003 020c and.w r2, r3, #12
|
||
80013be: 687b ldr r3, [r7, #4]
|
||
80013c0: 685b ldr r3, [r3, #4]
|
||
80013c2: 009b lsls r3, r3, #2
|
||
80013c4: 429a cmp r2, r3
|
||
80013c6: d1eb bne.n 80013a0 <HAL_RCC_ClockConfig+0xf8>
|
||
}
|
||
}
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Decreasing the number of wait states because of lower CPU frequency */
|
||
if (FLatency < __HAL_FLASH_GET_LATENCY())
|
||
80013c8: 4b27 ldr r3, [pc, #156] ; (8001468 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80013ca: 681b ldr r3, [r3, #0]
|
||
80013cc: f003 0307 and.w r3, r3, #7
|
||
80013d0: 683a ldr r2, [r7, #0]
|
||
80013d2: 429a cmp r2, r3
|
||
80013d4: d210 bcs.n 80013f8 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
80013d6: 4b24 ldr r3, [pc, #144] ; (8001468 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80013d8: 681b ldr r3, [r3, #0]
|
||
80013da: f023 0207 bic.w r2, r3, #7
|
||
80013de: 4922 ldr r1, [pc, #136] ; (8001468 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80013e0: 683b ldr r3, [r7, #0]
|
||
80013e2: 4313 orrs r3, r2
|
||
80013e4: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
80013e6: 4b20 ldr r3, [pc, #128] ; (8001468 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80013e8: 681b ldr r3, [r3, #0]
|
||
80013ea: f003 0307 and.w r3, r3, #7
|
||
80013ee: 683a ldr r2, [r7, #0]
|
||
80013f0: 429a cmp r2, r3
|
||
80013f2: d001 beq.n 80013f8 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
return HAL_ERROR;
|
||
80013f4: 2301 movs r3, #1
|
||
80013f6: e032 b.n 800145e <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
|
||
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
80013f8: 687b ldr r3, [r7, #4]
|
||
80013fa: 681b ldr r3, [r3, #0]
|
||
80013fc: f003 0304 and.w r3, r3, #4
|
||
8001400: 2b00 cmp r3, #0
|
||
8001402: d008 beq.n 8001416 <HAL_RCC_ClockConfig+0x16e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
||
8001404: 4b19 ldr r3, [pc, #100] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001406: 685b ldr r3, [r3, #4]
|
||
8001408: f423 62e0 bic.w r2, r3, #1792 ; 0x700
|
||
800140c: 687b ldr r3, [r7, #4]
|
||
800140e: 68db ldr r3, [r3, #12]
|
||
8001410: 4916 ldr r1, [pc, #88] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001412: 4313 orrs r3, r2
|
||
8001414: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*-------------------------- PCLK2 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
8001416: 687b ldr r3, [r7, #4]
|
||
8001418: 681b ldr r3, [r3, #0]
|
||
800141a: f003 0308 and.w r3, r3, #8
|
||
800141e: 2b00 cmp r3, #0
|
||
8001420: d009 beq.n 8001436 <HAL_RCC_ClockConfig+0x18e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
|
||
8001422: 4b12 ldr r3, [pc, #72] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001424: 685b ldr r3, [r3, #4]
|
||
8001426: f423 5260 bic.w r2, r3, #14336 ; 0x3800
|
||
800142a: 687b ldr r3, [r7, #4]
|
||
800142c: 691b ldr r3, [r3, #16]
|
||
800142e: 00db lsls r3, r3, #3
|
||
8001430: 490e ldr r1, [pc, #56] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001432: 4313 orrs r3, r2
|
||
8001434: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Update the SystemCoreClock global variable */
|
||
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
|
||
8001436: f000 f821 bl 800147c <HAL_RCC_GetSysClockFreq>
|
||
800143a: 4602 mov r2, r0
|
||
800143c: 4b0b ldr r3, [pc, #44] ; (800146c <HAL_RCC_ClockConfig+0x1c4>)
|
||
800143e: 685b ldr r3, [r3, #4]
|
||
8001440: 091b lsrs r3, r3, #4
|
||
8001442: f003 030f and.w r3, r3, #15
|
||
8001446: 490a ldr r1, [pc, #40] ; (8001470 <HAL_RCC_ClockConfig+0x1c8>)
|
||
8001448: 5ccb ldrb r3, [r1, r3]
|
||
800144a: fa22 f303 lsr.w r3, r2, r3
|
||
800144e: 4a09 ldr r2, [pc, #36] ; (8001474 <HAL_RCC_ClockConfig+0x1cc>)
|
||
8001450: 6013 str r3, [r2, #0]
|
||
|
||
/* Configure the source of time base considering new system clocks settings*/
|
||
HAL_InitTick(uwTickPrio);
|
||
8001452: 4b09 ldr r3, [pc, #36] ; (8001478 <HAL_RCC_ClockConfig+0x1d0>)
|
||
8001454: 681b ldr r3, [r3, #0]
|
||
8001456: 4618 mov r0, r3
|
||
8001458: f7ff f9a6 bl 80007a8 <HAL_InitTick>
|
||
|
||
return HAL_OK;
|
||
800145c: 2300 movs r3, #0
|
||
}
|
||
800145e: 4618 mov r0, r3
|
||
8001460: 3710 adds r7, #16
|
||
8001462: 46bd mov sp, r7
|
||
8001464: bd80 pop {r7, pc}
|
||
8001466: bf00 nop
|
||
8001468: 40022000 .word 0x40022000
|
||
800146c: 40021000 .word 0x40021000
|
||
8001470: 08005fb8 .word 0x08005fb8
|
||
8001474: 20000000 .word 0x20000000
|
||
8001478: 20000004 .word 0x20000004
|
||
|
||
0800147c <HAL_RCC_GetSysClockFreq>:
|
||
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
|
||
*
|
||
* @retval SYSCLK frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetSysClockFreq(void)
|
||
{
|
||
800147c: b490 push {r4, r7}
|
||
800147e: b08a sub sp, #40 ; 0x28
|
||
8001480: af00 add r7, sp, #0
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
|
||
8001482: 4b2a ldr r3, [pc, #168] ; (800152c <HAL_RCC_GetSysClockFreq+0xb0>)
|
||
8001484: 1d3c adds r4, r7, #4
|
||
8001486: cb0f ldmia r3, {r0, r1, r2, r3}
|
||
8001488: e884 000f stmia.w r4, {r0, r1, r2, r3}
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPredivFactorTable[2] = {1, 2};
|
||
800148c: f240 2301 movw r3, #513 ; 0x201
|
||
8001490: 803b strh r3, [r7, #0]
|
||
#endif /*RCC_CFGR2_PREDIV1*/
|
||
|
||
#endif
|
||
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
||
8001492: 2300 movs r3, #0
|
||
8001494: 61fb str r3, [r7, #28]
|
||
8001496: 2300 movs r3, #0
|
||
8001498: 61bb str r3, [r7, #24]
|
||
800149a: 2300 movs r3, #0
|
||
800149c: 627b str r3, [r7, #36] ; 0x24
|
||
800149e: 2300 movs r3, #0
|
||
80014a0: 617b str r3, [r7, #20]
|
||
uint32_t sysclockfreq = 0U;
|
||
80014a2: 2300 movs r3, #0
|
||
80014a4: 623b str r3, [r7, #32]
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
uint32_t prediv2 = 0U, pll2mul = 0U;
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
|
||
tmpreg = RCC->CFGR;
|
||
80014a6: 4b22 ldr r3, [pc, #136] ; (8001530 <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
80014a8: 685b ldr r3, [r3, #4]
|
||
80014aa: 61fb str r3, [r7, #28]
|
||
|
||
/* Get SYSCLK source -------------------------------------------------------*/
|
||
switch (tmpreg & RCC_CFGR_SWS)
|
||
80014ac: 69fb ldr r3, [r7, #28]
|
||
80014ae: f003 030c and.w r3, r3, #12
|
||
80014b2: 2b04 cmp r3, #4
|
||
80014b4: d002 beq.n 80014bc <HAL_RCC_GetSysClockFreq+0x40>
|
||
80014b6: 2b08 cmp r3, #8
|
||
80014b8: d003 beq.n 80014c2 <HAL_RCC_GetSysClockFreq+0x46>
|
||
80014ba: e02d b.n 8001518 <HAL_RCC_GetSysClockFreq+0x9c>
|
||
{
|
||
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
||
{
|
||
sysclockfreq = HSE_VALUE;
|
||
80014bc: 4b1d ldr r3, [pc, #116] ; (8001534 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
80014be: 623b str r3, [r7, #32]
|
||
break;
|
||
80014c0: e02d b.n 800151e <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
||
{
|
||
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
|
||
80014c2: 69fb ldr r3, [r7, #28]
|
||
80014c4: 0c9b lsrs r3, r3, #18
|
||
80014c6: f003 030f and.w r3, r3, #15
|
||
80014ca: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
80014ce: 4413 add r3, r2
|
||
80014d0: f813 3c24 ldrb.w r3, [r3, #-36]
|
||
80014d4: 617b str r3, [r7, #20]
|
||
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
|
||
80014d6: 69fb ldr r3, [r7, #28]
|
||
80014d8: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
80014dc: 2b00 cmp r3, #0
|
||
80014de: d013 beq.n 8001508 <HAL_RCC_GetSysClockFreq+0x8c>
|
||
{
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
|
||
#else
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
|
||
80014e0: 4b13 ldr r3, [pc, #76] ; (8001530 <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
80014e2: 685b ldr r3, [r3, #4]
|
||
80014e4: 0c5b lsrs r3, r3, #17
|
||
80014e6: f003 0301 and.w r3, r3, #1
|
||
80014ea: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
80014ee: 4413 add r3, r2
|
||
80014f0: f813 3c28 ldrb.w r3, [r3, #-40]
|
||
80014f4: 61bb str r3, [r7, #24]
|
||
{
|
||
pllclk = pllclk / 2;
|
||
}
|
||
#else
|
||
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
|
||
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
|
||
80014f6: 697b ldr r3, [r7, #20]
|
||
80014f8: 4a0e ldr r2, [pc, #56] ; (8001534 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
80014fa: fb02 f203 mul.w r2, r2, r3
|
||
80014fe: 69bb ldr r3, [r7, #24]
|
||
8001500: fbb2 f3f3 udiv r3, r2, r3
|
||
8001504: 627b str r3, [r7, #36] ; 0x24
|
||
8001506: e004 b.n 8001512 <HAL_RCC_GetSysClockFreq+0x96>
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
}
|
||
else
|
||
{
|
||
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
|
||
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
|
||
8001508: 697b ldr r3, [r7, #20]
|
||
800150a: 4a0b ldr r2, [pc, #44] ; (8001538 <HAL_RCC_GetSysClockFreq+0xbc>)
|
||
800150c: fb02 f303 mul.w r3, r2, r3
|
||
8001510: 627b str r3, [r7, #36] ; 0x24
|
||
}
|
||
sysclockfreq = pllclk;
|
||
8001512: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001514: 623b str r3, [r7, #32]
|
||
break;
|
||
8001516: e002 b.n 800151e <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
|
||
default: /* HSI used as system clock */
|
||
{
|
||
sysclockfreq = HSI_VALUE;
|
||
8001518: 4b06 ldr r3, [pc, #24] ; (8001534 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
800151a: 623b str r3, [r7, #32]
|
||
break;
|
||
800151c: bf00 nop
|
||
}
|
||
}
|
||
return sysclockfreq;
|
||
800151e: 6a3b ldr r3, [r7, #32]
|
||
}
|
||
8001520: 4618 mov r0, r3
|
||
8001522: 3728 adds r7, #40 ; 0x28
|
||
8001524: 46bd mov sp, r7
|
||
8001526: bc90 pop {r4, r7}
|
||
8001528: 4770 bx lr
|
||
800152a: bf00 nop
|
||
800152c: 08005f4c .word 0x08005f4c
|
||
8001530: 40021000 .word 0x40021000
|
||
8001534: 007a1200 .word 0x007a1200
|
||
8001538: 003d0900 .word 0x003d0900
|
||
|
||
0800153c <RCC_Delay>:
|
||
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
|
||
* @param mdelay: specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
static void RCC_Delay(uint32_t mdelay)
|
||
{
|
||
800153c: b480 push {r7}
|
||
800153e: b085 sub sp, #20
|
||
8001540: af00 add r7, sp, #0
|
||
8001542: 6078 str r0, [r7, #4]
|
||
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
|
||
8001544: 4b0a ldr r3, [pc, #40] ; (8001570 <RCC_Delay+0x34>)
|
||
8001546: 681b ldr r3, [r3, #0]
|
||
8001548: 4a0a ldr r2, [pc, #40] ; (8001574 <RCC_Delay+0x38>)
|
||
800154a: fba2 2303 umull r2, r3, r2, r3
|
||
800154e: 0a5b lsrs r3, r3, #9
|
||
8001550: 687a ldr r2, [r7, #4]
|
||
8001552: fb02 f303 mul.w r3, r2, r3
|
||
8001556: 60fb str r3, [r7, #12]
|
||
do
|
||
{
|
||
__NOP();
|
||
8001558: bf00 nop
|
||
}
|
||
while (Delay --);
|
||
800155a: 68fb ldr r3, [r7, #12]
|
||
800155c: 1e5a subs r2, r3, #1
|
||
800155e: 60fa str r2, [r7, #12]
|
||
8001560: 2b00 cmp r3, #0
|
||
8001562: d1f9 bne.n 8001558 <RCC_Delay+0x1c>
|
||
}
|
||
8001564: bf00 nop
|
||
8001566: bf00 nop
|
||
8001568: 3714 adds r7, #20
|
||
800156a: 46bd mov sp, r7
|
||
800156c: bc80 pop {r7}
|
||
800156e: 4770 bx lr
|
||
8001570: 20000000 .word 0x20000000
|
||
8001574: 10624dd3 .word 0x10624dd3
|
||
|
||
08001578 <HAL_SPI_Init>:
|
||
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
|
||
* the configuration information for SPI module.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
|
||
{
|
||
8001578: b580 push {r7, lr}
|
||
800157a: b082 sub sp, #8
|
||
800157c: af00 add r7, sp, #0
|
||
800157e: 6078 str r0, [r7, #4]
|
||
/* Check the SPI handle allocation */
|
||
if (hspi == NULL)
|
||
8001580: 687b ldr r3, [r7, #4]
|
||
8001582: 2b00 cmp r3, #0
|
||
8001584: d101 bne.n 800158a <HAL_SPI_Init+0x12>
|
||
{
|
||
return HAL_ERROR;
|
||
8001586: 2301 movs r3, #1
|
||
8001588: e076 b.n 8001678 <HAL_SPI_Init+0x100>
|
||
assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
|
||
assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
|
||
/* TI mode is not supported on this device.
|
||
TIMode parameter is mandatory equal to SPI_TIMODE_DISABLE */
|
||
assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
|
||
if (hspi->Init.TIMode == SPI_TIMODE_DISABLE)
|
||
800158a: 687b ldr r3, [r7, #4]
|
||
800158c: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800158e: 2b00 cmp r3, #0
|
||
8001590: d108 bne.n 80015a4 <HAL_SPI_Init+0x2c>
|
||
{
|
||
assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
|
||
assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
|
||
|
||
if (hspi->Init.Mode == SPI_MODE_MASTER)
|
||
8001592: 687b ldr r3, [r7, #4]
|
||
8001594: 685b ldr r3, [r3, #4]
|
||
8001596: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
800159a: d009 beq.n 80015b0 <HAL_SPI_Init+0x38>
|
||
assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
|
||
}
|
||
else
|
||
{
|
||
/* Baudrate prescaler not use in Motoraola Slave mode. force to default value */
|
||
hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
|
||
800159c: 687b ldr r3, [r7, #4]
|
||
800159e: 2200 movs r2, #0
|
||
80015a0: 61da str r2, [r3, #28]
|
||
80015a2: e005 b.n 80015b0 <HAL_SPI_Init+0x38>
|
||
else
|
||
{
|
||
assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
|
||
|
||
/* Force polarity and phase to TI protocaol requirements */
|
||
hspi->Init.CLKPolarity = SPI_POLARITY_LOW;
|
||
80015a4: 687b ldr r3, [r7, #4]
|
||
80015a6: 2200 movs r2, #0
|
||
80015a8: 611a str r2, [r3, #16]
|
||
hspi->Init.CLKPhase = SPI_PHASE_1EDGE;
|
||
80015aa: 687b ldr r3, [r7, #4]
|
||
80015ac: 2200 movs r2, #0
|
||
80015ae: 615a str r2, [r3, #20]
|
||
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
|
||
{
|
||
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
|
||
}
|
||
#else
|
||
hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||
80015b0: 687b ldr r3, [r7, #4]
|
||
80015b2: 2200 movs r2, #0
|
||
80015b4: 629a str r2, [r3, #40] ; 0x28
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
if (hspi->State == HAL_SPI_STATE_RESET)
|
||
80015b6: 687b ldr r3, [r7, #4]
|
||
80015b8: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
80015bc: b2db uxtb r3, r3
|
||
80015be: 2b00 cmp r3, #0
|
||
80015c0: d106 bne.n 80015d0 <HAL_SPI_Init+0x58>
|
||
{
|
||
/* Allocate lock resource and initialize it */
|
||
hspi->Lock = HAL_UNLOCKED;
|
||
80015c2: 687b ldr r3, [r7, #4]
|
||
80015c4: 2200 movs r2, #0
|
||
80015c6: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
|
||
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
||
hspi->MspInitCallback(hspi);
|
||
#else
|
||
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
||
HAL_SPI_MspInit(hspi);
|
||
80015ca: 6878 ldr r0, [r7, #4]
|
||
80015cc: f7fe ffd8 bl 8000580 <HAL_SPI_MspInit>
|
||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||
}
|
||
|
||
hspi->State = HAL_SPI_STATE_BUSY;
|
||
80015d0: 687b ldr r3, [r7, #4]
|
||
80015d2: 2202 movs r2, #2
|
||
80015d4: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
|
||
/* Disable the selected SPI peripheral */
|
||
__HAL_SPI_DISABLE(hspi);
|
||
80015d8: 687b ldr r3, [r7, #4]
|
||
80015da: 681b ldr r3, [r3, #0]
|
||
80015dc: 681a ldr r2, [r3, #0]
|
||
80015de: 687b ldr r3, [r7, #4]
|
||
80015e0: 681b ldr r3, [r3, #0]
|
||
80015e2: f022 0240 bic.w r2, r2, #64 ; 0x40
|
||
80015e6: 601a str r2, [r3, #0]
|
||
|
||
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
|
||
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
|
||
Communication speed, First bit and CRC calculation state */
|
||
WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) |
|
||
80015e8: 687b ldr r3, [r7, #4]
|
||
80015ea: 685b ldr r3, [r3, #4]
|
||
80015ec: f403 7282 and.w r2, r3, #260 ; 0x104
|
||
80015f0: 687b ldr r3, [r7, #4]
|
||
80015f2: 689b ldr r3, [r3, #8]
|
||
80015f4: f403 4304 and.w r3, r3, #33792 ; 0x8400
|
||
80015f8: 431a orrs r2, r3
|
||
80015fa: 687b ldr r3, [r7, #4]
|
||
80015fc: 68db ldr r3, [r3, #12]
|
||
80015fe: f403 6300 and.w r3, r3, #2048 ; 0x800
|
||
8001602: 431a orrs r2, r3
|
||
8001604: 687b ldr r3, [r7, #4]
|
||
8001606: 691b ldr r3, [r3, #16]
|
||
8001608: f003 0302 and.w r3, r3, #2
|
||
800160c: 431a orrs r2, r3
|
||
800160e: 687b ldr r3, [r7, #4]
|
||
8001610: 695b ldr r3, [r3, #20]
|
||
8001612: f003 0301 and.w r3, r3, #1
|
||
8001616: 431a orrs r2, r3
|
||
8001618: 687b ldr r3, [r7, #4]
|
||
800161a: 699b ldr r3, [r3, #24]
|
||
800161c: f403 7300 and.w r3, r3, #512 ; 0x200
|
||
8001620: 431a orrs r2, r3
|
||
8001622: 687b ldr r3, [r7, #4]
|
||
8001624: 69db ldr r3, [r3, #28]
|
||
8001626: f003 0338 and.w r3, r3, #56 ; 0x38
|
||
800162a: 431a orrs r2, r3
|
||
800162c: 687b ldr r3, [r7, #4]
|
||
800162e: 6a1b ldr r3, [r3, #32]
|
||
8001630: f003 0380 and.w r3, r3, #128 ; 0x80
|
||
8001634: ea42 0103 orr.w r1, r2, r3
|
||
8001638: 687b ldr r3, [r7, #4]
|
||
800163a: 6a9b ldr r3, [r3, #40] ; 0x28
|
||
800163c: f403 5200 and.w r2, r3, #8192 ; 0x2000
|
||
8001640: 687b ldr r3, [r7, #4]
|
||
8001642: 681b ldr r3, [r3, #0]
|
||
8001644: 430a orrs r2, r1
|
||
8001646: 601a str r2, [r3, #0]
|
||
(hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) |
|
||
(hspi->Init.FirstBit & SPI_CR1_LSBFIRST) |
|
||
(hspi->Init.CRCCalculation & SPI_CR1_CRCEN)));
|
||
|
||
/* Configure : NSS management */
|
||
WRITE_REG(hspi->Instance->CR2, ((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE));
|
||
8001648: 687b ldr r3, [r7, #4]
|
||
800164a: 699b ldr r3, [r3, #24]
|
||
800164c: 0c1a lsrs r2, r3, #16
|
||
800164e: 687b ldr r3, [r7, #4]
|
||
8001650: 681b ldr r3, [r3, #0]
|
||
8001652: f002 0204 and.w r2, r2, #4
|
||
8001656: 605a str r2, [r3, #4]
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
#if defined(SPI_I2SCFGR_I2SMOD)
|
||
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
|
||
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
|
||
8001658: 687b ldr r3, [r7, #4]
|
||
800165a: 681b ldr r3, [r3, #0]
|
||
800165c: 69da ldr r2, [r3, #28]
|
||
800165e: 687b ldr r3, [r7, #4]
|
||
8001660: 681b ldr r3, [r3, #0]
|
||
8001662: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
||
8001666: 61da str r2, [r3, #28]
|
||
#endif /* SPI_I2SCFGR_I2SMOD */
|
||
|
||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||
8001668: 687b ldr r3, [r7, #4]
|
||
800166a: 2200 movs r2, #0
|
||
800166c: 655a str r2, [r3, #84] ; 0x54
|
||
hspi->State = HAL_SPI_STATE_READY;
|
||
800166e: 687b ldr r3, [r7, #4]
|
||
8001670: 2201 movs r2, #1
|
||
8001672: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
|
||
return HAL_OK;
|
||
8001676: 2300 movs r3, #0
|
||
}
|
||
8001678: 4618 mov r0, r3
|
||
800167a: 3708 adds r7, #8
|
||
800167c: 46bd mov sp, r7
|
||
800167e: bd80 pop {r7, pc}
|
||
|
||
08001680 <HAL_SPI_Transmit>:
|
||
* @param Size amount of data to be sent
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||
{
|
||
8001680: b580 push {r7, lr}
|
||
8001682: b088 sub sp, #32
|
||
8001684: af00 add r7, sp, #0
|
||
8001686: 60f8 str r0, [r7, #12]
|
||
8001688: 60b9 str r1, [r7, #8]
|
||
800168a: 603b str r3, [r7, #0]
|
||
800168c: 4613 mov r3, r2
|
||
800168e: 80fb strh r3, [r7, #6]
|
||
uint32_t tickstart;
|
||
HAL_StatusTypeDef errorcode = HAL_OK;
|
||
8001690: 2300 movs r3, #0
|
||
8001692: 77fb strb r3, [r7, #31]
|
||
|
||
/* Check Direction parameter */
|
||
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hspi);
|
||
8001694: 68fb ldr r3, [r7, #12]
|
||
8001696: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
|
||
800169a: 2b01 cmp r3, #1
|
||
800169c: d101 bne.n 80016a2 <HAL_SPI_Transmit+0x22>
|
||
800169e: 2302 movs r3, #2
|
||
80016a0: e126 b.n 80018f0 <HAL_SPI_Transmit+0x270>
|
||
80016a2: 68fb ldr r3, [r7, #12]
|
||
80016a4: 2201 movs r2, #1
|
||
80016a6: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
|
||
/* Init tickstart for timeout management*/
|
||
tickstart = HAL_GetTick();
|
||
80016aa: f7ff f8bf bl 800082c <HAL_GetTick>
|
||
80016ae: 61b8 str r0, [r7, #24]
|
||
initial_TxXferCount = Size;
|
||
80016b0: 88fb ldrh r3, [r7, #6]
|
||
80016b2: 82fb strh r3, [r7, #22]
|
||
|
||
if (hspi->State != HAL_SPI_STATE_READY)
|
||
80016b4: 68fb ldr r3, [r7, #12]
|
||
80016b6: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
80016ba: b2db uxtb r3, r3
|
||
80016bc: 2b01 cmp r3, #1
|
||
80016be: d002 beq.n 80016c6 <HAL_SPI_Transmit+0x46>
|
||
{
|
||
errorcode = HAL_BUSY;
|
||
80016c0: 2302 movs r3, #2
|
||
80016c2: 77fb strb r3, [r7, #31]
|
||
goto error;
|
||
80016c4: e10b b.n 80018de <HAL_SPI_Transmit+0x25e>
|
||
}
|
||
|
||
if ((pData == NULL) || (Size == 0U))
|
||
80016c6: 68bb ldr r3, [r7, #8]
|
||
80016c8: 2b00 cmp r3, #0
|
||
80016ca: d002 beq.n 80016d2 <HAL_SPI_Transmit+0x52>
|
||
80016cc: 88fb ldrh r3, [r7, #6]
|
||
80016ce: 2b00 cmp r3, #0
|
||
80016d0: d102 bne.n 80016d8 <HAL_SPI_Transmit+0x58>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
80016d2: 2301 movs r3, #1
|
||
80016d4: 77fb strb r3, [r7, #31]
|
||
goto error;
|
||
80016d6: e102 b.n 80018de <HAL_SPI_Transmit+0x25e>
|
||
}
|
||
|
||
/* Set the transaction information */
|
||
hspi->State = HAL_SPI_STATE_BUSY_TX;
|
||
80016d8: 68fb ldr r3, [r7, #12]
|
||
80016da: 2203 movs r2, #3
|
||
80016dc: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||
80016e0: 68fb ldr r3, [r7, #12]
|
||
80016e2: 2200 movs r2, #0
|
||
80016e4: 655a str r2, [r3, #84] ; 0x54
|
||
hspi->pTxBuffPtr = (uint8_t *)pData;
|
||
80016e6: 68fb ldr r3, [r7, #12]
|
||
80016e8: 68ba ldr r2, [r7, #8]
|
||
80016ea: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferSize = Size;
|
||
80016ec: 68fb ldr r3, [r7, #12]
|
||
80016ee: 88fa ldrh r2, [r7, #6]
|
||
80016f0: 869a strh r2, [r3, #52] ; 0x34
|
||
hspi->TxXferCount = Size;
|
||
80016f2: 68fb ldr r3, [r7, #12]
|
||
80016f4: 88fa ldrh r2, [r7, #6]
|
||
80016f6: 86da strh r2, [r3, #54] ; 0x36
|
||
|
||
/*Init field not used in handle to zero */
|
||
hspi->pRxBuffPtr = (uint8_t *)NULL;
|
||
80016f8: 68fb ldr r3, [r7, #12]
|
||
80016fa: 2200 movs r2, #0
|
||
80016fc: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferSize = 0U;
|
||
80016fe: 68fb ldr r3, [r7, #12]
|
||
8001700: 2200 movs r2, #0
|
||
8001702: 879a strh r2, [r3, #60] ; 0x3c
|
||
hspi->RxXferCount = 0U;
|
||
8001704: 68fb ldr r3, [r7, #12]
|
||
8001706: 2200 movs r2, #0
|
||
8001708: 87da strh r2, [r3, #62] ; 0x3e
|
||
hspi->TxISR = NULL;
|
||
800170a: 68fb ldr r3, [r7, #12]
|
||
800170c: 2200 movs r2, #0
|
||
800170e: 645a str r2, [r3, #68] ; 0x44
|
||
hspi->RxISR = NULL;
|
||
8001710: 68fb ldr r3, [r7, #12]
|
||
8001712: 2200 movs r2, #0
|
||
8001714: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Configure communication direction : 1Line */
|
||
if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
|
||
8001716: 68fb ldr r3, [r7, #12]
|
||
8001718: 689b ldr r3, [r3, #8]
|
||
800171a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
||
800171e: d10f bne.n 8001740 <HAL_SPI_Transmit+0xc0>
|
||
{
|
||
/* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
|
||
__HAL_SPI_DISABLE(hspi);
|
||
8001720: 68fb ldr r3, [r7, #12]
|
||
8001722: 681b ldr r3, [r3, #0]
|
||
8001724: 681a ldr r2, [r3, #0]
|
||
8001726: 68fb ldr r3, [r7, #12]
|
||
8001728: 681b ldr r3, [r3, #0]
|
||
800172a: f022 0240 bic.w r2, r2, #64 ; 0x40
|
||
800172e: 601a str r2, [r3, #0]
|
||
SPI_1LINE_TX(hspi);
|
||
8001730: 68fb ldr r3, [r7, #12]
|
||
8001732: 681b ldr r3, [r3, #0]
|
||
8001734: 681a ldr r2, [r3, #0]
|
||
8001736: 68fb ldr r3, [r7, #12]
|
||
8001738: 681b ldr r3, [r3, #0]
|
||
800173a: f442 4280 orr.w r2, r2, #16384 ; 0x4000
|
||
800173e: 601a str r2, [r3, #0]
|
||
SPI_RESET_CRC(hspi);
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Check if the SPI is already enabled */
|
||
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
|
||
8001740: 68fb ldr r3, [r7, #12]
|
||
8001742: 681b ldr r3, [r3, #0]
|
||
8001744: 681b ldr r3, [r3, #0]
|
||
8001746: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
800174a: 2b40 cmp r3, #64 ; 0x40
|
||
800174c: d007 beq.n 800175e <HAL_SPI_Transmit+0xde>
|
||
{
|
||
/* Enable SPI peripheral */
|
||
__HAL_SPI_ENABLE(hspi);
|
||
800174e: 68fb ldr r3, [r7, #12]
|
||
8001750: 681b ldr r3, [r3, #0]
|
||
8001752: 681a ldr r2, [r3, #0]
|
||
8001754: 68fb ldr r3, [r7, #12]
|
||
8001756: 681b ldr r3, [r3, #0]
|
||
8001758: f042 0240 orr.w r2, r2, #64 ; 0x40
|
||
800175c: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Transmit data in 16 Bit mode */
|
||
if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
|
||
800175e: 68fb ldr r3, [r7, #12]
|
||
8001760: 68db ldr r3, [r3, #12]
|
||
8001762: f5b3 6f00 cmp.w r3, #2048 ; 0x800
|
||
8001766: d14b bne.n 8001800 <HAL_SPI_Transmit+0x180>
|
||
{
|
||
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
|
||
8001768: 68fb ldr r3, [r7, #12]
|
||
800176a: 685b ldr r3, [r3, #4]
|
||
800176c: 2b00 cmp r3, #0
|
||
800176e: d002 beq.n 8001776 <HAL_SPI_Transmit+0xf6>
|
||
8001770: 8afb ldrh r3, [r7, #22]
|
||
8001772: 2b01 cmp r3, #1
|
||
8001774: d13e bne.n 80017f4 <HAL_SPI_Transmit+0x174>
|
||
{
|
||
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
|
||
8001776: 68fb ldr r3, [r7, #12]
|
||
8001778: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
800177a: 881a ldrh r2, [r3, #0]
|
||
800177c: 68fb ldr r3, [r7, #12]
|
||
800177e: 681b ldr r3, [r3, #0]
|
||
8001780: 60da str r2, [r3, #12]
|
||
hspi->pTxBuffPtr += sizeof(uint16_t);
|
||
8001782: 68fb ldr r3, [r7, #12]
|
||
8001784: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001786: 1c9a adds r2, r3, #2
|
||
8001788: 68fb ldr r3, [r7, #12]
|
||
800178a: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
800178c: 68fb ldr r3, [r7, #12]
|
||
800178e: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001790: b29b uxth r3, r3
|
||
8001792: 3b01 subs r3, #1
|
||
8001794: b29a uxth r2, r3
|
||
8001796: 68fb ldr r3, [r7, #12]
|
||
8001798: 86da strh r2, [r3, #54] ; 0x36
|
||
}
|
||
/* Transmit data in 16 Bit mode */
|
||
while (hspi->TxXferCount > 0U)
|
||
800179a: e02b b.n 80017f4 <HAL_SPI_Transmit+0x174>
|
||
{
|
||
/* Wait until TXE flag is set to send data */
|
||
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
|
||
800179c: 68fb ldr r3, [r7, #12]
|
||
800179e: 681b ldr r3, [r3, #0]
|
||
80017a0: 689b ldr r3, [r3, #8]
|
||
80017a2: f003 0302 and.w r3, r3, #2
|
||
80017a6: 2b02 cmp r3, #2
|
||
80017a8: d112 bne.n 80017d0 <HAL_SPI_Transmit+0x150>
|
||
{
|
||
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
|
||
80017aa: 68fb ldr r3, [r7, #12]
|
||
80017ac: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
80017ae: 881a ldrh r2, [r3, #0]
|
||
80017b0: 68fb ldr r3, [r7, #12]
|
||
80017b2: 681b ldr r3, [r3, #0]
|
||
80017b4: 60da str r2, [r3, #12]
|
||
hspi->pTxBuffPtr += sizeof(uint16_t);
|
||
80017b6: 68fb ldr r3, [r7, #12]
|
||
80017b8: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
80017ba: 1c9a adds r2, r3, #2
|
||
80017bc: 68fb ldr r3, [r7, #12]
|
||
80017be: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
80017c0: 68fb ldr r3, [r7, #12]
|
||
80017c2: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
80017c4: b29b uxth r3, r3
|
||
80017c6: 3b01 subs r3, #1
|
||
80017c8: b29a uxth r2, r3
|
||
80017ca: 68fb ldr r3, [r7, #12]
|
||
80017cc: 86da strh r2, [r3, #54] ; 0x36
|
||
80017ce: e011 b.n 80017f4 <HAL_SPI_Transmit+0x174>
|
||
}
|
||
else
|
||
{
|
||
/* Timeout management */
|
||
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
|
||
80017d0: f7ff f82c bl 800082c <HAL_GetTick>
|
||
80017d4: 4602 mov r2, r0
|
||
80017d6: 69bb ldr r3, [r7, #24]
|
||
80017d8: 1ad3 subs r3, r2, r3
|
||
80017da: 683a ldr r2, [r7, #0]
|
||
80017dc: 429a cmp r2, r3
|
||
80017de: d803 bhi.n 80017e8 <HAL_SPI_Transmit+0x168>
|
||
80017e0: 683b ldr r3, [r7, #0]
|
||
80017e2: f1b3 3fff cmp.w r3, #4294967295
|
||
80017e6: d102 bne.n 80017ee <HAL_SPI_Transmit+0x16e>
|
||
80017e8: 683b ldr r3, [r7, #0]
|
||
80017ea: 2b00 cmp r3, #0
|
||
80017ec: d102 bne.n 80017f4 <HAL_SPI_Transmit+0x174>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
80017ee: 2303 movs r3, #3
|
||
80017f0: 77fb strb r3, [r7, #31]
|
||
goto error;
|
||
80017f2: e074 b.n 80018de <HAL_SPI_Transmit+0x25e>
|
||
while (hspi->TxXferCount > 0U)
|
||
80017f4: 68fb ldr r3, [r7, #12]
|
||
80017f6: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
80017f8: b29b uxth r3, r3
|
||
80017fa: 2b00 cmp r3, #0
|
||
80017fc: d1ce bne.n 800179c <HAL_SPI_Transmit+0x11c>
|
||
80017fe: e04c b.n 800189a <HAL_SPI_Transmit+0x21a>
|
||
}
|
||
}
|
||
/* Transmit data in 8 Bit mode */
|
||
else
|
||
{
|
||
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
|
||
8001800: 68fb ldr r3, [r7, #12]
|
||
8001802: 685b ldr r3, [r3, #4]
|
||
8001804: 2b00 cmp r3, #0
|
||
8001806: d002 beq.n 800180e <HAL_SPI_Transmit+0x18e>
|
||
8001808: 8afb ldrh r3, [r7, #22]
|
||
800180a: 2b01 cmp r3, #1
|
||
800180c: d140 bne.n 8001890 <HAL_SPI_Transmit+0x210>
|
||
{
|
||
*((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
|
||
800180e: 68fb ldr r3, [r7, #12]
|
||
8001810: 6b1a ldr r2, [r3, #48] ; 0x30
|
||
8001812: 68fb ldr r3, [r7, #12]
|
||
8001814: 681b ldr r3, [r3, #0]
|
||
8001816: 330c adds r3, #12
|
||
8001818: 7812 ldrb r2, [r2, #0]
|
||
800181a: 701a strb r2, [r3, #0]
|
||
hspi->pTxBuffPtr += sizeof(uint8_t);
|
||
800181c: 68fb ldr r3, [r7, #12]
|
||
800181e: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001820: 1c5a adds r2, r3, #1
|
||
8001822: 68fb ldr r3, [r7, #12]
|
||
8001824: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001826: 68fb ldr r3, [r7, #12]
|
||
8001828: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
800182a: b29b uxth r3, r3
|
||
800182c: 3b01 subs r3, #1
|
||
800182e: b29a uxth r2, r3
|
||
8001830: 68fb ldr r3, [r7, #12]
|
||
8001832: 86da strh r2, [r3, #54] ; 0x36
|
||
}
|
||
while (hspi->TxXferCount > 0U)
|
||
8001834: e02c b.n 8001890 <HAL_SPI_Transmit+0x210>
|
||
{
|
||
/* Wait until TXE flag is set to send data */
|
||
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
|
||
8001836: 68fb ldr r3, [r7, #12]
|
||
8001838: 681b ldr r3, [r3, #0]
|
||
800183a: 689b ldr r3, [r3, #8]
|
||
800183c: f003 0302 and.w r3, r3, #2
|
||
8001840: 2b02 cmp r3, #2
|
||
8001842: d113 bne.n 800186c <HAL_SPI_Transmit+0x1ec>
|
||
{
|
||
*((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
|
||
8001844: 68fb ldr r3, [r7, #12]
|
||
8001846: 6b1a ldr r2, [r3, #48] ; 0x30
|
||
8001848: 68fb ldr r3, [r7, #12]
|
||
800184a: 681b ldr r3, [r3, #0]
|
||
800184c: 330c adds r3, #12
|
||
800184e: 7812 ldrb r2, [r2, #0]
|
||
8001850: 701a strb r2, [r3, #0]
|
||
hspi->pTxBuffPtr += sizeof(uint8_t);
|
||
8001852: 68fb ldr r3, [r7, #12]
|
||
8001854: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001856: 1c5a adds r2, r3, #1
|
||
8001858: 68fb ldr r3, [r7, #12]
|
||
800185a: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
800185c: 68fb ldr r3, [r7, #12]
|
||
800185e: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001860: b29b uxth r3, r3
|
||
8001862: 3b01 subs r3, #1
|
||
8001864: b29a uxth r2, r3
|
||
8001866: 68fb ldr r3, [r7, #12]
|
||
8001868: 86da strh r2, [r3, #54] ; 0x36
|
||
800186a: e011 b.n 8001890 <HAL_SPI_Transmit+0x210>
|
||
}
|
||
else
|
||
{
|
||
/* Timeout management */
|
||
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
|
||
800186c: f7fe ffde bl 800082c <HAL_GetTick>
|
||
8001870: 4602 mov r2, r0
|
||
8001872: 69bb ldr r3, [r7, #24]
|
||
8001874: 1ad3 subs r3, r2, r3
|
||
8001876: 683a ldr r2, [r7, #0]
|
||
8001878: 429a cmp r2, r3
|
||
800187a: d803 bhi.n 8001884 <HAL_SPI_Transmit+0x204>
|
||
800187c: 683b ldr r3, [r7, #0]
|
||
800187e: f1b3 3fff cmp.w r3, #4294967295
|
||
8001882: d102 bne.n 800188a <HAL_SPI_Transmit+0x20a>
|
||
8001884: 683b ldr r3, [r7, #0]
|
||
8001886: 2b00 cmp r3, #0
|
||
8001888: d102 bne.n 8001890 <HAL_SPI_Transmit+0x210>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
800188a: 2303 movs r3, #3
|
||
800188c: 77fb strb r3, [r7, #31]
|
||
goto error;
|
||
800188e: e026 b.n 80018de <HAL_SPI_Transmit+0x25e>
|
||
while (hspi->TxXferCount > 0U)
|
||
8001890: 68fb ldr r3, [r7, #12]
|
||
8001892: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001894: b29b uxth r3, r3
|
||
8001896: 2b00 cmp r3, #0
|
||
8001898: d1cd bne.n 8001836 <HAL_SPI_Transmit+0x1b6>
|
||
SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Check the end of the transaction */
|
||
if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
|
||
800189a: 69ba ldr r2, [r7, #24]
|
||
800189c: 6839 ldr r1, [r7, #0]
|
||
800189e: 68f8 ldr r0, [r7, #12]
|
||
80018a0: f000 fbc4 bl 800202c <SPI_EndRxTxTransaction>
|
||
80018a4: 4603 mov r3, r0
|
||
80018a6: 2b00 cmp r3, #0
|
||
80018a8: d002 beq.n 80018b0 <HAL_SPI_Transmit+0x230>
|
||
{
|
||
hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
|
||
80018aa: 68fb ldr r3, [r7, #12]
|
||
80018ac: 2220 movs r2, #32
|
||
80018ae: 655a str r2, [r3, #84] ; 0x54
|
||
}
|
||
|
||
/* Clear overrun flag in 2 Lines communication mode because received is not read */
|
||
if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
|
||
80018b0: 68fb ldr r3, [r7, #12]
|
||
80018b2: 689b ldr r3, [r3, #8]
|
||
80018b4: 2b00 cmp r3, #0
|
||
80018b6: d10a bne.n 80018ce <HAL_SPI_Transmit+0x24e>
|
||
{
|
||
__HAL_SPI_CLEAR_OVRFLAG(hspi);
|
||
80018b8: 2300 movs r3, #0
|
||
80018ba: 613b str r3, [r7, #16]
|
||
80018bc: 68fb ldr r3, [r7, #12]
|
||
80018be: 681b ldr r3, [r3, #0]
|
||
80018c0: 68db ldr r3, [r3, #12]
|
||
80018c2: 613b str r3, [r7, #16]
|
||
80018c4: 68fb ldr r3, [r7, #12]
|
||
80018c6: 681b ldr r3, [r3, #0]
|
||
80018c8: 689b ldr r3, [r3, #8]
|
||
80018ca: 613b str r3, [r7, #16]
|
||
80018cc: 693b ldr r3, [r7, #16]
|
||
}
|
||
|
||
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
|
||
80018ce: 68fb ldr r3, [r7, #12]
|
||
80018d0: 6d5b ldr r3, [r3, #84] ; 0x54
|
||
80018d2: 2b00 cmp r3, #0
|
||
80018d4: d002 beq.n 80018dc <HAL_SPI_Transmit+0x25c>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
80018d6: 2301 movs r3, #1
|
||
80018d8: 77fb strb r3, [r7, #31]
|
||
80018da: e000 b.n 80018de <HAL_SPI_Transmit+0x25e>
|
||
}
|
||
|
||
error:
|
||
80018dc: bf00 nop
|
||
hspi->State = HAL_SPI_STATE_READY;
|
||
80018de: 68fb ldr r3, [r7, #12]
|
||
80018e0: 2201 movs r2, #1
|
||
80018e2: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hspi);
|
||
80018e6: 68fb ldr r3, [r7, #12]
|
||
80018e8: 2200 movs r2, #0
|
||
80018ea: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
return errorcode;
|
||
80018ee: 7ffb ldrb r3, [r7, #31]
|
||
}
|
||
80018f0: 4618 mov r0, r3
|
||
80018f2: 3720 adds r7, #32
|
||
80018f4: 46bd mov sp, r7
|
||
80018f6: bd80 pop {r7, pc}
|
||
|
||
080018f8 <HAL_SPI_Receive>:
|
||
* @param Size amount of data to be received
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||
{
|
||
80018f8: b580 push {r7, lr}
|
||
80018fa: b088 sub sp, #32
|
||
80018fc: af02 add r7, sp, #8
|
||
80018fe: 60f8 str r0, [r7, #12]
|
||
8001900: 60b9 str r1, [r7, #8]
|
||
8001902: 603b str r3, [r7, #0]
|
||
8001904: 4613 mov r3, r2
|
||
8001906: 80fb strh r3, [r7, #6]
|
||
uint32_t tickstart;
|
||
HAL_StatusTypeDef errorcode = HAL_OK;
|
||
8001908: 2300 movs r3, #0
|
||
800190a: 75fb strb r3, [r7, #23]
|
||
|
||
if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
|
||
800190c: 68fb ldr r3, [r7, #12]
|
||
800190e: 685b ldr r3, [r3, #4]
|
||
8001910: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
8001914: d112 bne.n 800193c <HAL_SPI_Receive+0x44>
|
||
8001916: 68fb ldr r3, [r7, #12]
|
||
8001918: 689b ldr r3, [r3, #8]
|
||
800191a: 2b00 cmp r3, #0
|
||
800191c: d10e bne.n 800193c <HAL_SPI_Receive+0x44>
|
||
{
|
||
hspi->State = HAL_SPI_STATE_BUSY_RX;
|
||
800191e: 68fb ldr r3, [r7, #12]
|
||
8001920: 2204 movs r2, #4
|
||
8001922: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
|
||
return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
|
||
8001926: 88fa ldrh r2, [r7, #6]
|
||
8001928: 683b ldr r3, [r7, #0]
|
||
800192a: 9300 str r3, [sp, #0]
|
||
800192c: 4613 mov r3, r2
|
||
800192e: 68ba ldr r2, [r7, #8]
|
||
8001930: 68b9 ldr r1, [r7, #8]
|
||
8001932: 68f8 ldr r0, [r7, #12]
|
||
8001934: f000 f8f1 bl 8001b1a <HAL_SPI_TransmitReceive>
|
||
8001938: 4603 mov r3, r0
|
||
800193a: e0ea b.n 8001b12 <HAL_SPI_Receive+0x21a>
|
||
}
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hspi);
|
||
800193c: 68fb ldr r3, [r7, #12]
|
||
800193e: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
|
||
8001942: 2b01 cmp r3, #1
|
||
8001944: d101 bne.n 800194a <HAL_SPI_Receive+0x52>
|
||
8001946: 2302 movs r3, #2
|
||
8001948: e0e3 b.n 8001b12 <HAL_SPI_Receive+0x21a>
|
||
800194a: 68fb ldr r3, [r7, #12]
|
||
800194c: 2201 movs r2, #1
|
||
800194e: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
|
||
/* Init tickstart for timeout management*/
|
||
tickstart = HAL_GetTick();
|
||
8001952: f7fe ff6b bl 800082c <HAL_GetTick>
|
||
8001956: 6138 str r0, [r7, #16]
|
||
|
||
if (hspi->State != HAL_SPI_STATE_READY)
|
||
8001958: 68fb ldr r3, [r7, #12]
|
||
800195a: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
800195e: b2db uxtb r3, r3
|
||
8001960: 2b01 cmp r3, #1
|
||
8001962: d002 beq.n 800196a <HAL_SPI_Receive+0x72>
|
||
{
|
||
errorcode = HAL_BUSY;
|
||
8001964: 2302 movs r3, #2
|
||
8001966: 75fb strb r3, [r7, #23]
|
||
goto error;
|
||
8001968: e0ca b.n 8001b00 <HAL_SPI_Receive+0x208>
|
||
}
|
||
|
||
if ((pData == NULL) || (Size == 0U))
|
||
800196a: 68bb ldr r3, [r7, #8]
|
||
800196c: 2b00 cmp r3, #0
|
||
800196e: d002 beq.n 8001976 <HAL_SPI_Receive+0x7e>
|
||
8001970: 88fb ldrh r3, [r7, #6]
|
||
8001972: 2b00 cmp r3, #0
|
||
8001974: d102 bne.n 800197c <HAL_SPI_Receive+0x84>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
8001976: 2301 movs r3, #1
|
||
8001978: 75fb strb r3, [r7, #23]
|
||
goto error;
|
||
800197a: e0c1 b.n 8001b00 <HAL_SPI_Receive+0x208>
|
||
}
|
||
|
||
/* Set the transaction information */
|
||
hspi->State = HAL_SPI_STATE_BUSY_RX;
|
||
800197c: 68fb ldr r3, [r7, #12]
|
||
800197e: 2204 movs r2, #4
|
||
8001980: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||
8001984: 68fb ldr r3, [r7, #12]
|
||
8001986: 2200 movs r2, #0
|
||
8001988: 655a str r2, [r3, #84] ; 0x54
|
||
hspi->pRxBuffPtr = (uint8_t *)pData;
|
||
800198a: 68fb ldr r3, [r7, #12]
|
||
800198c: 68ba ldr r2, [r7, #8]
|
||
800198e: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferSize = Size;
|
||
8001990: 68fb ldr r3, [r7, #12]
|
||
8001992: 88fa ldrh r2, [r7, #6]
|
||
8001994: 879a strh r2, [r3, #60] ; 0x3c
|
||
hspi->RxXferCount = Size;
|
||
8001996: 68fb ldr r3, [r7, #12]
|
||
8001998: 88fa ldrh r2, [r7, #6]
|
||
800199a: 87da strh r2, [r3, #62] ; 0x3e
|
||
|
||
/*Init field not used in handle to zero */
|
||
hspi->pTxBuffPtr = (uint8_t *)NULL;
|
||
800199c: 68fb ldr r3, [r7, #12]
|
||
800199e: 2200 movs r2, #0
|
||
80019a0: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferSize = 0U;
|
||
80019a2: 68fb ldr r3, [r7, #12]
|
||
80019a4: 2200 movs r2, #0
|
||
80019a6: 869a strh r2, [r3, #52] ; 0x34
|
||
hspi->TxXferCount = 0U;
|
||
80019a8: 68fb ldr r3, [r7, #12]
|
||
80019aa: 2200 movs r2, #0
|
||
80019ac: 86da strh r2, [r3, #54] ; 0x36
|
||
hspi->RxISR = NULL;
|
||
80019ae: 68fb ldr r3, [r7, #12]
|
||
80019b0: 2200 movs r2, #0
|
||
80019b2: 641a str r2, [r3, #64] ; 0x40
|
||
hspi->TxISR = NULL;
|
||
80019b4: 68fb ldr r3, [r7, #12]
|
||
80019b6: 2200 movs r2, #0
|
||
80019b8: 645a str r2, [r3, #68] ; 0x44
|
||
hspi->RxXferCount--;
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Configure communication direction: 1Line */
|
||
if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
|
||
80019ba: 68fb ldr r3, [r7, #12]
|
||
80019bc: 689b ldr r3, [r3, #8]
|
||
80019be: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
||
80019c2: d10f bne.n 80019e4 <HAL_SPI_Receive+0xec>
|
||
{
|
||
/* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
|
||
__HAL_SPI_DISABLE(hspi);
|
||
80019c4: 68fb ldr r3, [r7, #12]
|
||
80019c6: 681b ldr r3, [r3, #0]
|
||
80019c8: 681a ldr r2, [r3, #0]
|
||
80019ca: 68fb ldr r3, [r7, #12]
|
||
80019cc: 681b ldr r3, [r3, #0]
|
||
80019ce: f022 0240 bic.w r2, r2, #64 ; 0x40
|
||
80019d2: 601a str r2, [r3, #0]
|
||
SPI_1LINE_RX(hspi);
|
||
80019d4: 68fb ldr r3, [r7, #12]
|
||
80019d6: 681b ldr r3, [r3, #0]
|
||
80019d8: 681a ldr r2, [r3, #0]
|
||
80019da: 68fb ldr r3, [r7, #12]
|
||
80019dc: 681b ldr r3, [r3, #0]
|
||
80019de: f422 4280 bic.w r2, r2, #16384 ; 0x4000
|
||
80019e2: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Check if the SPI is already enabled */
|
||
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
|
||
80019e4: 68fb ldr r3, [r7, #12]
|
||
80019e6: 681b ldr r3, [r3, #0]
|
||
80019e8: 681b ldr r3, [r3, #0]
|
||
80019ea: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
80019ee: 2b40 cmp r3, #64 ; 0x40
|
||
80019f0: d007 beq.n 8001a02 <HAL_SPI_Receive+0x10a>
|
||
{
|
||
/* Enable SPI peripheral */
|
||
__HAL_SPI_ENABLE(hspi);
|
||
80019f2: 68fb ldr r3, [r7, #12]
|
||
80019f4: 681b ldr r3, [r3, #0]
|
||
80019f6: 681a ldr r2, [r3, #0]
|
||
80019f8: 68fb ldr r3, [r7, #12]
|
||
80019fa: 681b ldr r3, [r3, #0]
|
||
80019fc: f042 0240 orr.w r2, r2, #64 ; 0x40
|
||
8001a00: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Receive data in 8 Bit mode */
|
||
if (hspi->Init.DataSize == SPI_DATASIZE_8BIT)
|
||
8001a02: 68fb ldr r3, [r7, #12]
|
||
8001a04: 68db ldr r3, [r3, #12]
|
||
8001a06: 2b00 cmp r3, #0
|
||
8001a08: d162 bne.n 8001ad0 <HAL_SPI_Receive+0x1d8>
|
||
{
|
||
/* Transfer loop */
|
||
while (hspi->RxXferCount > 0U)
|
||
8001a0a: e02e b.n 8001a6a <HAL_SPI_Receive+0x172>
|
||
{
|
||
/* Check the RXNE flag */
|
||
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
|
||
8001a0c: 68fb ldr r3, [r7, #12]
|
||
8001a0e: 681b ldr r3, [r3, #0]
|
||
8001a10: 689b ldr r3, [r3, #8]
|
||
8001a12: f003 0301 and.w r3, r3, #1
|
||
8001a16: 2b01 cmp r3, #1
|
||
8001a18: d115 bne.n 8001a46 <HAL_SPI_Receive+0x14e>
|
||
{
|
||
/* read the received data */
|
||
(* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR;
|
||
8001a1a: 68fb ldr r3, [r7, #12]
|
||
8001a1c: 681b ldr r3, [r3, #0]
|
||
8001a1e: f103 020c add.w r2, r3, #12
|
||
8001a22: 68fb ldr r3, [r7, #12]
|
||
8001a24: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001a26: 7812 ldrb r2, [r2, #0]
|
||
8001a28: b2d2 uxtb r2, r2
|
||
8001a2a: 701a strb r2, [r3, #0]
|
||
hspi->pRxBuffPtr += sizeof(uint8_t);
|
||
8001a2c: 68fb ldr r3, [r7, #12]
|
||
8001a2e: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001a30: 1c5a adds r2, r3, #1
|
||
8001a32: 68fb ldr r3, [r7, #12]
|
||
8001a34: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferCount--;
|
||
8001a36: 68fb ldr r3, [r7, #12]
|
||
8001a38: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001a3a: b29b uxth r3, r3
|
||
8001a3c: 3b01 subs r3, #1
|
||
8001a3e: b29a uxth r2, r3
|
||
8001a40: 68fb ldr r3, [r7, #12]
|
||
8001a42: 87da strh r2, [r3, #62] ; 0x3e
|
||
8001a44: e011 b.n 8001a6a <HAL_SPI_Receive+0x172>
|
||
}
|
||
else
|
||
{
|
||
/* Timeout management */
|
||
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
|
||
8001a46: f7fe fef1 bl 800082c <HAL_GetTick>
|
||
8001a4a: 4602 mov r2, r0
|
||
8001a4c: 693b ldr r3, [r7, #16]
|
||
8001a4e: 1ad3 subs r3, r2, r3
|
||
8001a50: 683a ldr r2, [r7, #0]
|
||
8001a52: 429a cmp r2, r3
|
||
8001a54: d803 bhi.n 8001a5e <HAL_SPI_Receive+0x166>
|
||
8001a56: 683b ldr r3, [r7, #0]
|
||
8001a58: f1b3 3fff cmp.w r3, #4294967295
|
||
8001a5c: d102 bne.n 8001a64 <HAL_SPI_Receive+0x16c>
|
||
8001a5e: 683b ldr r3, [r7, #0]
|
||
8001a60: 2b00 cmp r3, #0
|
||
8001a62: d102 bne.n 8001a6a <HAL_SPI_Receive+0x172>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
8001a64: 2303 movs r3, #3
|
||
8001a66: 75fb strb r3, [r7, #23]
|
||
goto error;
|
||
8001a68: e04a b.n 8001b00 <HAL_SPI_Receive+0x208>
|
||
while (hspi->RxXferCount > 0U)
|
||
8001a6a: 68fb ldr r3, [r7, #12]
|
||
8001a6c: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001a6e: b29b uxth r3, r3
|
||
8001a70: 2b00 cmp r3, #0
|
||
8001a72: d1cb bne.n 8001a0c <HAL_SPI_Receive+0x114>
|
||
8001a74: e031 b.n 8001ada <HAL_SPI_Receive+0x1e2>
|
||
{
|
||
/* Transfer loop */
|
||
while (hspi->RxXferCount > 0U)
|
||
{
|
||
/* Check the RXNE flag */
|
||
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
|
||
8001a76: 68fb ldr r3, [r7, #12]
|
||
8001a78: 681b ldr r3, [r3, #0]
|
||
8001a7a: 689b ldr r3, [r3, #8]
|
||
8001a7c: f003 0301 and.w r3, r3, #1
|
||
8001a80: 2b01 cmp r3, #1
|
||
8001a82: d113 bne.n 8001aac <HAL_SPI_Receive+0x1b4>
|
||
{
|
||
*((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
|
||
8001a84: 68fb ldr r3, [r7, #12]
|
||
8001a86: 681b ldr r3, [r3, #0]
|
||
8001a88: 68da ldr r2, [r3, #12]
|
||
8001a8a: 68fb ldr r3, [r7, #12]
|
||
8001a8c: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001a8e: b292 uxth r2, r2
|
||
8001a90: 801a strh r2, [r3, #0]
|
||
hspi->pRxBuffPtr += sizeof(uint16_t);
|
||
8001a92: 68fb ldr r3, [r7, #12]
|
||
8001a94: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001a96: 1c9a adds r2, r3, #2
|
||
8001a98: 68fb ldr r3, [r7, #12]
|
||
8001a9a: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferCount--;
|
||
8001a9c: 68fb ldr r3, [r7, #12]
|
||
8001a9e: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001aa0: b29b uxth r3, r3
|
||
8001aa2: 3b01 subs r3, #1
|
||
8001aa4: b29a uxth r2, r3
|
||
8001aa6: 68fb ldr r3, [r7, #12]
|
||
8001aa8: 87da strh r2, [r3, #62] ; 0x3e
|
||
8001aaa: e011 b.n 8001ad0 <HAL_SPI_Receive+0x1d8>
|
||
}
|
||
else
|
||
{
|
||
/* Timeout management */
|
||
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
|
||
8001aac: f7fe febe bl 800082c <HAL_GetTick>
|
||
8001ab0: 4602 mov r2, r0
|
||
8001ab2: 693b ldr r3, [r7, #16]
|
||
8001ab4: 1ad3 subs r3, r2, r3
|
||
8001ab6: 683a ldr r2, [r7, #0]
|
||
8001ab8: 429a cmp r2, r3
|
||
8001aba: d803 bhi.n 8001ac4 <HAL_SPI_Receive+0x1cc>
|
||
8001abc: 683b ldr r3, [r7, #0]
|
||
8001abe: f1b3 3fff cmp.w r3, #4294967295
|
||
8001ac2: d102 bne.n 8001aca <HAL_SPI_Receive+0x1d2>
|
||
8001ac4: 683b ldr r3, [r7, #0]
|
||
8001ac6: 2b00 cmp r3, #0
|
||
8001ac8: d102 bne.n 8001ad0 <HAL_SPI_Receive+0x1d8>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
8001aca: 2303 movs r3, #3
|
||
8001acc: 75fb strb r3, [r7, #23]
|
||
goto error;
|
||
8001ace: e017 b.n 8001b00 <HAL_SPI_Receive+0x208>
|
||
while (hspi->RxXferCount > 0U)
|
||
8001ad0: 68fb ldr r3, [r7, #12]
|
||
8001ad2: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001ad4: b29b uxth r3, r3
|
||
8001ad6: 2b00 cmp r3, #0
|
||
8001ad8: d1cd bne.n 8001a76 <HAL_SPI_Receive+0x17e>
|
||
READ_REG(hspi->Instance->DR);
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Check the end of the transaction */
|
||
if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK)
|
||
8001ada: 693a ldr r2, [r7, #16]
|
||
8001adc: 6839 ldr r1, [r7, #0]
|
||
8001ade: 68f8 ldr r0, [r7, #12]
|
||
8001ae0: f000 fa52 bl 8001f88 <SPI_EndRxTransaction>
|
||
8001ae4: 4603 mov r3, r0
|
||
8001ae6: 2b00 cmp r3, #0
|
||
8001ae8: d002 beq.n 8001af0 <HAL_SPI_Receive+0x1f8>
|
||
{
|
||
hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
|
||
8001aea: 68fb ldr r3, [r7, #12]
|
||
8001aec: 2220 movs r2, #32
|
||
8001aee: 655a str r2, [r3, #84] ; 0x54
|
||
__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
|
||
}
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
|
||
8001af0: 68fb ldr r3, [r7, #12]
|
||
8001af2: 6d5b ldr r3, [r3, #84] ; 0x54
|
||
8001af4: 2b00 cmp r3, #0
|
||
8001af6: d002 beq.n 8001afe <HAL_SPI_Receive+0x206>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
8001af8: 2301 movs r3, #1
|
||
8001afa: 75fb strb r3, [r7, #23]
|
||
8001afc: e000 b.n 8001b00 <HAL_SPI_Receive+0x208>
|
||
}
|
||
|
||
error :
|
||
8001afe: bf00 nop
|
||
hspi->State = HAL_SPI_STATE_READY;
|
||
8001b00: 68fb ldr r3, [r7, #12]
|
||
8001b02: 2201 movs r2, #1
|
||
8001b04: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
__HAL_UNLOCK(hspi);
|
||
8001b08: 68fb ldr r3, [r7, #12]
|
||
8001b0a: 2200 movs r2, #0
|
||
8001b0c: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
return errorcode;
|
||
8001b10: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
8001b12: 4618 mov r0, r3
|
||
8001b14: 3718 adds r7, #24
|
||
8001b16: 46bd mov sp, r7
|
||
8001b18: bd80 pop {r7, pc}
|
||
|
||
08001b1a <HAL_SPI_TransmitReceive>:
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
|
||
uint32_t Timeout)
|
||
{
|
||
8001b1a: b580 push {r7, lr}
|
||
8001b1c: b08c sub sp, #48 ; 0x30
|
||
8001b1e: af00 add r7, sp, #0
|
||
8001b20: 60f8 str r0, [r7, #12]
|
||
8001b22: 60b9 str r1, [r7, #8]
|
||
8001b24: 607a str r2, [r7, #4]
|
||
8001b26: 807b strh r3, [r7, #2]
|
||
uint32_t tmp_mode;
|
||
HAL_SPI_StateTypeDef tmp_state;
|
||
uint32_t tickstart;
|
||
|
||
/* Variable used to alternate Rx and Tx during transfer */
|
||
uint32_t txallowed = 1U;
|
||
8001b28: 2301 movs r3, #1
|
||
8001b2a: 62fb str r3, [r7, #44] ; 0x2c
|
||
HAL_StatusTypeDef errorcode = HAL_OK;
|
||
8001b2c: 2300 movs r3, #0
|
||
8001b2e: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
|
||
/* Check Direction parameter */
|
||
assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hspi);
|
||
8001b32: 68fb ldr r3, [r7, #12]
|
||
8001b34: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
|
||
8001b38: 2b01 cmp r3, #1
|
||
8001b3a: d101 bne.n 8001b40 <HAL_SPI_TransmitReceive+0x26>
|
||
8001b3c: 2302 movs r3, #2
|
||
8001b3e: e18a b.n 8001e56 <HAL_SPI_TransmitReceive+0x33c>
|
||
8001b40: 68fb ldr r3, [r7, #12]
|
||
8001b42: 2201 movs r2, #1
|
||
8001b44: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
|
||
/* Init tickstart for timeout management*/
|
||
tickstart = HAL_GetTick();
|
||
8001b48: f7fe fe70 bl 800082c <HAL_GetTick>
|
||
8001b4c: 6278 str r0, [r7, #36] ; 0x24
|
||
|
||
/* Init temporary variables */
|
||
tmp_state = hspi->State;
|
||
8001b4e: 68fb ldr r3, [r7, #12]
|
||
8001b50: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
8001b54: f887 3023 strb.w r3, [r7, #35] ; 0x23
|
||
tmp_mode = hspi->Init.Mode;
|
||
8001b58: 68fb ldr r3, [r7, #12]
|
||
8001b5a: 685b ldr r3, [r3, #4]
|
||
8001b5c: 61fb str r3, [r7, #28]
|
||
initial_TxXferCount = Size;
|
||
8001b5e: 887b ldrh r3, [r7, #2]
|
||
8001b60: 837b strh r3, [r7, #26]
|
||
|
||
if (!((tmp_state == HAL_SPI_STATE_READY) || \
|
||
8001b62: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
|
||
8001b66: 2b01 cmp r3, #1
|
||
8001b68: d00f beq.n 8001b8a <HAL_SPI_TransmitReceive+0x70>
|
||
8001b6a: 69fb ldr r3, [r7, #28]
|
||
8001b6c: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
8001b70: d107 bne.n 8001b82 <HAL_SPI_TransmitReceive+0x68>
|
||
((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
|
||
8001b72: 68fb ldr r3, [r7, #12]
|
||
8001b74: 689b ldr r3, [r3, #8]
|
||
8001b76: 2b00 cmp r3, #0
|
||
8001b78: d103 bne.n 8001b82 <HAL_SPI_TransmitReceive+0x68>
|
||
8001b7a: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
|
||
8001b7e: 2b04 cmp r3, #4
|
||
8001b80: d003 beq.n 8001b8a <HAL_SPI_TransmitReceive+0x70>
|
||
{
|
||
errorcode = HAL_BUSY;
|
||
8001b82: 2302 movs r3, #2
|
||
8001b84: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
goto error;
|
||
8001b88: e15b b.n 8001e42 <HAL_SPI_TransmitReceive+0x328>
|
||
}
|
||
|
||
if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
|
||
8001b8a: 68bb ldr r3, [r7, #8]
|
||
8001b8c: 2b00 cmp r3, #0
|
||
8001b8e: d005 beq.n 8001b9c <HAL_SPI_TransmitReceive+0x82>
|
||
8001b90: 687b ldr r3, [r7, #4]
|
||
8001b92: 2b00 cmp r3, #0
|
||
8001b94: d002 beq.n 8001b9c <HAL_SPI_TransmitReceive+0x82>
|
||
8001b96: 887b ldrh r3, [r7, #2]
|
||
8001b98: 2b00 cmp r3, #0
|
||
8001b9a: d103 bne.n 8001ba4 <HAL_SPI_TransmitReceive+0x8a>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
8001b9c: 2301 movs r3, #1
|
||
8001b9e: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
goto error;
|
||
8001ba2: e14e b.n 8001e42 <HAL_SPI_TransmitReceive+0x328>
|
||
}
|
||
|
||
/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
|
||
if (hspi->State != HAL_SPI_STATE_BUSY_RX)
|
||
8001ba4: 68fb ldr r3, [r7, #12]
|
||
8001ba6: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
8001baa: b2db uxtb r3, r3
|
||
8001bac: 2b04 cmp r3, #4
|
||
8001bae: d003 beq.n 8001bb8 <HAL_SPI_TransmitReceive+0x9e>
|
||
{
|
||
hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
|
||
8001bb0: 68fb ldr r3, [r7, #12]
|
||
8001bb2: 2205 movs r2, #5
|
||
8001bb4: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
}
|
||
|
||
/* Set the transaction information */
|
||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||
8001bb8: 68fb ldr r3, [r7, #12]
|
||
8001bba: 2200 movs r2, #0
|
||
8001bbc: 655a str r2, [r3, #84] ; 0x54
|
||
hspi->pRxBuffPtr = (uint8_t *)pRxData;
|
||
8001bbe: 68fb ldr r3, [r7, #12]
|
||
8001bc0: 687a ldr r2, [r7, #4]
|
||
8001bc2: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferCount = Size;
|
||
8001bc4: 68fb ldr r3, [r7, #12]
|
||
8001bc6: 887a ldrh r2, [r7, #2]
|
||
8001bc8: 87da strh r2, [r3, #62] ; 0x3e
|
||
hspi->RxXferSize = Size;
|
||
8001bca: 68fb ldr r3, [r7, #12]
|
||
8001bcc: 887a ldrh r2, [r7, #2]
|
||
8001bce: 879a strh r2, [r3, #60] ; 0x3c
|
||
hspi->pTxBuffPtr = (uint8_t *)pTxData;
|
||
8001bd0: 68fb ldr r3, [r7, #12]
|
||
8001bd2: 68ba ldr r2, [r7, #8]
|
||
8001bd4: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount = Size;
|
||
8001bd6: 68fb ldr r3, [r7, #12]
|
||
8001bd8: 887a ldrh r2, [r7, #2]
|
||
8001bda: 86da strh r2, [r3, #54] ; 0x36
|
||
hspi->TxXferSize = Size;
|
||
8001bdc: 68fb ldr r3, [r7, #12]
|
||
8001bde: 887a ldrh r2, [r7, #2]
|
||
8001be0: 869a strh r2, [r3, #52] ; 0x34
|
||
|
||
/*Init field not used in handle to zero */
|
||
hspi->RxISR = NULL;
|
||
8001be2: 68fb ldr r3, [r7, #12]
|
||
8001be4: 2200 movs r2, #0
|
||
8001be6: 641a str r2, [r3, #64] ; 0x40
|
||
hspi->TxISR = NULL;
|
||
8001be8: 68fb ldr r3, [r7, #12]
|
||
8001bea: 2200 movs r2, #0
|
||
8001bec: 645a str r2, [r3, #68] ; 0x44
|
||
SPI_RESET_CRC(hspi);
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Check if the SPI is already enabled */
|
||
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
|
||
8001bee: 68fb ldr r3, [r7, #12]
|
||
8001bf0: 681b ldr r3, [r3, #0]
|
||
8001bf2: 681b ldr r3, [r3, #0]
|
||
8001bf4: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
8001bf8: 2b40 cmp r3, #64 ; 0x40
|
||
8001bfa: d007 beq.n 8001c0c <HAL_SPI_TransmitReceive+0xf2>
|
||
{
|
||
/* Enable SPI peripheral */
|
||
__HAL_SPI_ENABLE(hspi);
|
||
8001bfc: 68fb ldr r3, [r7, #12]
|
||
8001bfe: 681b ldr r3, [r3, #0]
|
||
8001c00: 681a ldr r2, [r3, #0]
|
||
8001c02: 68fb ldr r3, [r7, #12]
|
||
8001c04: 681b ldr r3, [r3, #0]
|
||
8001c06: f042 0240 orr.w r2, r2, #64 ; 0x40
|
||
8001c0a: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Transmit and Receive data in 16 Bit mode */
|
||
if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
|
||
8001c0c: 68fb ldr r3, [r7, #12]
|
||
8001c0e: 68db ldr r3, [r3, #12]
|
||
8001c10: f5b3 6f00 cmp.w r3, #2048 ; 0x800
|
||
8001c14: d178 bne.n 8001d08 <HAL_SPI_TransmitReceive+0x1ee>
|
||
{
|
||
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
|
||
8001c16: 68fb ldr r3, [r7, #12]
|
||
8001c18: 685b ldr r3, [r3, #4]
|
||
8001c1a: 2b00 cmp r3, #0
|
||
8001c1c: d002 beq.n 8001c24 <HAL_SPI_TransmitReceive+0x10a>
|
||
8001c1e: 8b7b ldrh r3, [r7, #26]
|
||
8001c20: 2b01 cmp r3, #1
|
||
8001c22: d166 bne.n 8001cf2 <HAL_SPI_TransmitReceive+0x1d8>
|
||
{
|
||
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
|
||
8001c24: 68fb ldr r3, [r7, #12]
|
||
8001c26: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001c28: 881a ldrh r2, [r3, #0]
|
||
8001c2a: 68fb ldr r3, [r7, #12]
|
||
8001c2c: 681b ldr r3, [r3, #0]
|
||
8001c2e: 60da str r2, [r3, #12]
|
||
hspi->pTxBuffPtr += sizeof(uint16_t);
|
||
8001c30: 68fb ldr r3, [r7, #12]
|
||
8001c32: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001c34: 1c9a adds r2, r3, #2
|
||
8001c36: 68fb ldr r3, [r7, #12]
|
||
8001c38: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001c3a: 68fb ldr r3, [r7, #12]
|
||
8001c3c: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001c3e: b29b uxth r3, r3
|
||
8001c40: 3b01 subs r3, #1
|
||
8001c42: b29a uxth r2, r3
|
||
8001c44: 68fb ldr r3, [r7, #12]
|
||
8001c46: 86da strh r2, [r3, #54] ; 0x36
|
||
}
|
||
while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
|
||
8001c48: e053 b.n 8001cf2 <HAL_SPI_TransmitReceive+0x1d8>
|
||
{
|
||
/* Check TXE flag */
|
||
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
|
||
8001c4a: 68fb ldr r3, [r7, #12]
|
||
8001c4c: 681b ldr r3, [r3, #0]
|
||
8001c4e: 689b ldr r3, [r3, #8]
|
||
8001c50: f003 0302 and.w r3, r3, #2
|
||
8001c54: 2b02 cmp r3, #2
|
||
8001c56: d11b bne.n 8001c90 <HAL_SPI_TransmitReceive+0x176>
|
||
8001c58: 68fb ldr r3, [r7, #12]
|
||
8001c5a: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001c5c: b29b uxth r3, r3
|
||
8001c5e: 2b00 cmp r3, #0
|
||
8001c60: d016 beq.n 8001c90 <HAL_SPI_TransmitReceive+0x176>
|
||
8001c62: 6afb ldr r3, [r7, #44] ; 0x2c
|
||
8001c64: 2b01 cmp r3, #1
|
||
8001c66: d113 bne.n 8001c90 <HAL_SPI_TransmitReceive+0x176>
|
||
{
|
||
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
|
||
8001c68: 68fb ldr r3, [r7, #12]
|
||
8001c6a: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001c6c: 881a ldrh r2, [r3, #0]
|
||
8001c6e: 68fb ldr r3, [r7, #12]
|
||
8001c70: 681b ldr r3, [r3, #0]
|
||
8001c72: 60da str r2, [r3, #12]
|
||
hspi->pTxBuffPtr += sizeof(uint16_t);
|
||
8001c74: 68fb ldr r3, [r7, #12]
|
||
8001c76: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001c78: 1c9a adds r2, r3, #2
|
||
8001c7a: 68fb ldr r3, [r7, #12]
|
||
8001c7c: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001c7e: 68fb ldr r3, [r7, #12]
|
||
8001c80: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001c82: b29b uxth r3, r3
|
||
8001c84: 3b01 subs r3, #1
|
||
8001c86: b29a uxth r2, r3
|
||
8001c88: 68fb ldr r3, [r7, #12]
|
||
8001c8a: 86da strh r2, [r3, #54] ; 0x36
|
||
/* Next Data is a reception (Rx). Tx not allowed */
|
||
txallowed = 0U;
|
||
8001c8c: 2300 movs r3, #0
|
||
8001c8e: 62fb str r3, [r7, #44] ; 0x2c
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
}
|
||
|
||
/* Check RXNE flag */
|
||
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
|
||
8001c90: 68fb ldr r3, [r7, #12]
|
||
8001c92: 681b ldr r3, [r3, #0]
|
||
8001c94: 689b ldr r3, [r3, #8]
|
||
8001c96: f003 0301 and.w r3, r3, #1
|
||
8001c9a: 2b01 cmp r3, #1
|
||
8001c9c: d119 bne.n 8001cd2 <HAL_SPI_TransmitReceive+0x1b8>
|
||
8001c9e: 68fb ldr r3, [r7, #12]
|
||
8001ca0: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001ca2: b29b uxth r3, r3
|
||
8001ca4: 2b00 cmp r3, #0
|
||
8001ca6: d014 beq.n 8001cd2 <HAL_SPI_TransmitReceive+0x1b8>
|
||
{
|
||
*((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
|
||
8001ca8: 68fb ldr r3, [r7, #12]
|
||
8001caa: 681b ldr r3, [r3, #0]
|
||
8001cac: 68da ldr r2, [r3, #12]
|
||
8001cae: 68fb ldr r3, [r7, #12]
|
||
8001cb0: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001cb2: b292 uxth r2, r2
|
||
8001cb4: 801a strh r2, [r3, #0]
|
||
hspi->pRxBuffPtr += sizeof(uint16_t);
|
||
8001cb6: 68fb ldr r3, [r7, #12]
|
||
8001cb8: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001cba: 1c9a adds r2, r3, #2
|
||
8001cbc: 68fb ldr r3, [r7, #12]
|
||
8001cbe: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferCount--;
|
||
8001cc0: 68fb ldr r3, [r7, #12]
|
||
8001cc2: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001cc4: b29b uxth r3, r3
|
||
8001cc6: 3b01 subs r3, #1
|
||
8001cc8: b29a uxth r2, r3
|
||
8001cca: 68fb ldr r3, [r7, #12]
|
||
8001ccc: 87da strh r2, [r3, #62] ; 0x3e
|
||
/* Next Data is a Transmission (Tx). Tx is allowed */
|
||
txallowed = 1U;
|
||
8001cce: 2301 movs r3, #1
|
||
8001cd0: 62fb str r3, [r7, #44] ; 0x2c
|
||
}
|
||
if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY))
|
||
8001cd2: f7fe fdab bl 800082c <HAL_GetTick>
|
||
8001cd6: 4602 mov r2, r0
|
||
8001cd8: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001cda: 1ad3 subs r3, r2, r3
|
||
8001cdc: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8001cde: 429a cmp r2, r3
|
||
8001ce0: d807 bhi.n 8001cf2 <HAL_SPI_TransmitReceive+0x1d8>
|
||
8001ce2: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8001ce4: f1b3 3fff cmp.w r3, #4294967295
|
||
8001ce8: d003 beq.n 8001cf2 <HAL_SPI_TransmitReceive+0x1d8>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
8001cea: 2303 movs r3, #3
|
||
8001cec: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
goto error;
|
||
8001cf0: e0a7 b.n 8001e42 <HAL_SPI_TransmitReceive+0x328>
|
||
while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
|
||
8001cf2: 68fb ldr r3, [r7, #12]
|
||
8001cf4: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001cf6: b29b uxth r3, r3
|
||
8001cf8: 2b00 cmp r3, #0
|
||
8001cfa: d1a6 bne.n 8001c4a <HAL_SPI_TransmitReceive+0x130>
|
||
8001cfc: 68fb ldr r3, [r7, #12]
|
||
8001cfe: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001d00: b29b uxth r3, r3
|
||
8001d02: 2b00 cmp r3, #0
|
||
8001d04: d1a1 bne.n 8001c4a <HAL_SPI_TransmitReceive+0x130>
|
||
8001d06: e07c b.n 8001e02 <HAL_SPI_TransmitReceive+0x2e8>
|
||
}
|
||
}
|
||
/* Transmit and Receive data in 8 Bit mode */
|
||
else
|
||
{
|
||
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
|
||
8001d08: 68fb ldr r3, [r7, #12]
|
||
8001d0a: 685b ldr r3, [r3, #4]
|
||
8001d0c: 2b00 cmp r3, #0
|
||
8001d0e: d002 beq.n 8001d16 <HAL_SPI_TransmitReceive+0x1fc>
|
||
8001d10: 8b7b ldrh r3, [r7, #26]
|
||
8001d12: 2b01 cmp r3, #1
|
||
8001d14: d16b bne.n 8001dee <HAL_SPI_TransmitReceive+0x2d4>
|
||
{
|
||
*((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
|
||
8001d16: 68fb ldr r3, [r7, #12]
|
||
8001d18: 6b1a ldr r2, [r3, #48] ; 0x30
|
||
8001d1a: 68fb ldr r3, [r7, #12]
|
||
8001d1c: 681b ldr r3, [r3, #0]
|
||
8001d1e: 330c adds r3, #12
|
||
8001d20: 7812 ldrb r2, [r2, #0]
|
||
8001d22: 701a strb r2, [r3, #0]
|
||
hspi->pTxBuffPtr += sizeof(uint8_t);
|
||
8001d24: 68fb ldr r3, [r7, #12]
|
||
8001d26: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001d28: 1c5a adds r2, r3, #1
|
||
8001d2a: 68fb ldr r3, [r7, #12]
|
||
8001d2c: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001d2e: 68fb ldr r3, [r7, #12]
|
||
8001d30: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001d32: b29b uxth r3, r3
|
||
8001d34: 3b01 subs r3, #1
|
||
8001d36: b29a uxth r2, r3
|
||
8001d38: 68fb ldr r3, [r7, #12]
|
||
8001d3a: 86da strh r2, [r3, #54] ; 0x36
|
||
}
|
||
while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
|
||
8001d3c: e057 b.n 8001dee <HAL_SPI_TransmitReceive+0x2d4>
|
||
{
|
||
/* Check TXE flag */
|
||
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
|
||
8001d3e: 68fb ldr r3, [r7, #12]
|
||
8001d40: 681b ldr r3, [r3, #0]
|
||
8001d42: 689b ldr r3, [r3, #8]
|
||
8001d44: f003 0302 and.w r3, r3, #2
|
||
8001d48: 2b02 cmp r3, #2
|
||
8001d4a: d11c bne.n 8001d86 <HAL_SPI_TransmitReceive+0x26c>
|
||
8001d4c: 68fb ldr r3, [r7, #12]
|
||
8001d4e: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001d50: b29b uxth r3, r3
|
||
8001d52: 2b00 cmp r3, #0
|
||
8001d54: d017 beq.n 8001d86 <HAL_SPI_TransmitReceive+0x26c>
|
||
8001d56: 6afb ldr r3, [r7, #44] ; 0x2c
|
||
8001d58: 2b01 cmp r3, #1
|
||
8001d5a: d114 bne.n 8001d86 <HAL_SPI_TransmitReceive+0x26c>
|
||
{
|
||
*(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
|
||
8001d5c: 68fb ldr r3, [r7, #12]
|
||
8001d5e: 6b1a ldr r2, [r3, #48] ; 0x30
|
||
8001d60: 68fb ldr r3, [r7, #12]
|
||
8001d62: 681b ldr r3, [r3, #0]
|
||
8001d64: 330c adds r3, #12
|
||
8001d66: 7812 ldrb r2, [r2, #0]
|
||
8001d68: 701a strb r2, [r3, #0]
|
||
hspi->pTxBuffPtr++;
|
||
8001d6a: 68fb ldr r3, [r7, #12]
|
||
8001d6c: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001d6e: 1c5a adds r2, r3, #1
|
||
8001d70: 68fb ldr r3, [r7, #12]
|
||
8001d72: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001d74: 68fb ldr r3, [r7, #12]
|
||
8001d76: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001d78: b29b uxth r3, r3
|
||
8001d7a: 3b01 subs r3, #1
|
||
8001d7c: b29a uxth r2, r3
|
||
8001d7e: 68fb ldr r3, [r7, #12]
|
||
8001d80: 86da strh r2, [r3, #54] ; 0x36
|
||
/* Next Data is a reception (Rx). Tx not allowed */
|
||
txallowed = 0U;
|
||
8001d82: 2300 movs r3, #0
|
||
8001d84: 62fb str r3, [r7, #44] ; 0x2c
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
}
|
||
|
||
/* Wait until RXNE flag is reset */
|
||
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
|
||
8001d86: 68fb ldr r3, [r7, #12]
|
||
8001d88: 681b ldr r3, [r3, #0]
|
||
8001d8a: 689b ldr r3, [r3, #8]
|
||
8001d8c: f003 0301 and.w r3, r3, #1
|
||
8001d90: 2b01 cmp r3, #1
|
||
8001d92: d119 bne.n 8001dc8 <HAL_SPI_TransmitReceive+0x2ae>
|
||
8001d94: 68fb ldr r3, [r7, #12]
|
||
8001d96: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001d98: b29b uxth r3, r3
|
||
8001d9a: 2b00 cmp r3, #0
|
||
8001d9c: d014 beq.n 8001dc8 <HAL_SPI_TransmitReceive+0x2ae>
|
||
{
|
||
(*(uint8_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
|
||
8001d9e: 68fb ldr r3, [r7, #12]
|
||
8001da0: 681b ldr r3, [r3, #0]
|
||
8001da2: 68da ldr r2, [r3, #12]
|
||
8001da4: 68fb ldr r3, [r7, #12]
|
||
8001da6: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001da8: b2d2 uxtb r2, r2
|
||
8001daa: 701a strb r2, [r3, #0]
|
||
hspi->pRxBuffPtr++;
|
||
8001dac: 68fb ldr r3, [r7, #12]
|
||
8001dae: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001db0: 1c5a adds r2, r3, #1
|
||
8001db2: 68fb ldr r3, [r7, #12]
|
||
8001db4: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferCount--;
|
||
8001db6: 68fb ldr r3, [r7, #12]
|
||
8001db8: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001dba: b29b uxth r3, r3
|
||
8001dbc: 3b01 subs r3, #1
|
||
8001dbe: b29a uxth r2, r3
|
||
8001dc0: 68fb ldr r3, [r7, #12]
|
||
8001dc2: 87da strh r2, [r3, #62] ; 0x3e
|
||
/* Next Data is a Transmission (Tx). Tx is allowed */
|
||
txallowed = 1U;
|
||
8001dc4: 2301 movs r3, #1
|
||
8001dc6: 62fb str r3, [r7, #44] ; 0x2c
|
||
}
|
||
if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U))
|
||
8001dc8: f7fe fd30 bl 800082c <HAL_GetTick>
|
||
8001dcc: 4602 mov r2, r0
|
||
8001dce: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001dd0: 1ad3 subs r3, r2, r3
|
||
8001dd2: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8001dd4: 429a cmp r2, r3
|
||
8001dd6: d803 bhi.n 8001de0 <HAL_SPI_TransmitReceive+0x2c6>
|
||
8001dd8: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8001dda: f1b3 3fff cmp.w r3, #4294967295
|
||
8001dde: d102 bne.n 8001de6 <HAL_SPI_TransmitReceive+0x2cc>
|
||
8001de0: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8001de2: 2b00 cmp r3, #0
|
||
8001de4: d103 bne.n 8001dee <HAL_SPI_TransmitReceive+0x2d4>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
8001de6: 2303 movs r3, #3
|
||
8001de8: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
goto error;
|
||
8001dec: e029 b.n 8001e42 <HAL_SPI_TransmitReceive+0x328>
|
||
while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
|
||
8001dee: 68fb ldr r3, [r7, #12]
|
||
8001df0: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001df2: b29b uxth r3, r3
|
||
8001df4: 2b00 cmp r3, #0
|
||
8001df6: d1a2 bne.n 8001d3e <HAL_SPI_TransmitReceive+0x224>
|
||
8001df8: 68fb ldr r3, [r7, #12]
|
||
8001dfa: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001dfc: b29b uxth r3, r3
|
||
8001dfe: 2b00 cmp r3, #0
|
||
8001e00: d19d bne.n 8001d3e <HAL_SPI_TransmitReceive+0x224>
|
||
}
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Check the end of the transaction */
|
||
if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
|
||
8001e02: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8001e04: 6bb9 ldr r1, [r7, #56] ; 0x38
|
||
8001e06: 68f8 ldr r0, [r7, #12]
|
||
8001e08: f000 f910 bl 800202c <SPI_EndRxTxTransaction>
|
||
8001e0c: 4603 mov r3, r0
|
||
8001e0e: 2b00 cmp r3, #0
|
||
8001e10: d006 beq.n 8001e20 <HAL_SPI_TransmitReceive+0x306>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
8001e12: 2301 movs r3, #1
|
||
8001e14: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
|
||
8001e18: 68fb ldr r3, [r7, #12]
|
||
8001e1a: 2220 movs r2, #32
|
||
8001e1c: 655a str r2, [r3, #84] ; 0x54
|
||
goto error;
|
||
8001e1e: e010 b.n 8001e42 <HAL_SPI_TransmitReceive+0x328>
|
||
}
|
||
|
||
/* Clear overrun flag in 2 Lines communication mode because received is not read */
|
||
if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
|
||
8001e20: 68fb ldr r3, [r7, #12]
|
||
8001e22: 689b ldr r3, [r3, #8]
|
||
8001e24: 2b00 cmp r3, #0
|
||
8001e26: d10b bne.n 8001e40 <HAL_SPI_TransmitReceive+0x326>
|
||
{
|
||
__HAL_SPI_CLEAR_OVRFLAG(hspi);
|
||
8001e28: 2300 movs r3, #0
|
||
8001e2a: 617b str r3, [r7, #20]
|
||
8001e2c: 68fb ldr r3, [r7, #12]
|
||
8001e2e: 681b ldr r3, [r3, #0]
|
||
8001e30: 68db ldr r3, [r3, #12]
|
||
8001e32: 617b str r3, [r7, #20]
|
||
8001e34: 68fb ldr r3, [r7, #12]
|
||
8001e36: 681b ldr r3, [r3, #0]
|
||
8001e38: 689b ldr r3, [r3, #8]
|
||
8001e3a: 617b str r3, [r7, #20]
|
||
8001e3c: 697b ldr r3, [r7, #20]
|
||
8001e3e: e000 b.n 8001e42 <HAL_SPI_TransmitReceive+0x328>
|
||
}
|
||
|
||
error :
|
||
8001e40: bf00 nop
|
||
hspi->State = HAL_SPI_STATE_READY;
|
||
8001e42: 68fb ldr r3, [r7, #12]
|
||
8001e44: 2201 movs r2, #1
|
||
8001e46: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
__HAL_UNLOCK(hspi);
|
||
8001e4a: 68fb ldr r3, [r7, #12]
|
||
8001e4c: 2200 movs r2, #0
|
||
8001e4e: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
return errorcode;
|
||
8001e52: f897 302b ldrb.w r3, [r7, #43] ; 0x2b
|
||
}
|
||
8001e56: 4618 mov r0, r3
|
||
8001e58: 3730 adds r7, #48 ; 0x30
|
||
8001e5a: 46bd mov sp, r7
|
||
8001e5c: bd80 pop {r7, pc}
|
||
|
||
08001e5e <HAL_SPI_GetState>:
|
||
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
|
||
* the configuration information for SPI module.
|
||
* @retval SPI state
|
||
*/
|
||
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
|
||
{
|
||
8001e5e: b480 push {r7}
|
||
8001e60: b083 sub sp, #12
|
||
8001e62: af00 add r7, sp, #0
|
||
8001e64: 6078 str r0, [r7, #4]
|
||
/* Return SPI handle state */
|
||
return hspi->State;
|
||
8001e66: 687b ldr r3, [r7, #4]
|
||
8001e68: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
8001e6c: b2db uxtb r3, r3
|
||
}
|
||
8001e6e: 4618 mov r0, r3
|
||
8001e70: 370c adds r7, #12
|
||
8001e72: 46bd mov sp, r7
|
||
8001e74: bc80 pop {r7}
|
||
8001e76: 4770 bx lr
|
||
|
||
08001e78 <SPI_WaitFlagStateUntilTimeout>:
|
||
* @param Tickstart tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
|
||
uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8001e78: b580 push {r7, lr}
|
||
8001e7a: b088 sub sp, #32
|
||
8001e7c: af00 add r7, sp, #0
|
||
8001e7e: 60f8 str r0, [r7, #12]
|
||
8001e80: 60b9 str r1, [r7, #8]
|
||
8001e82: 603b str r3, [r7, #0]
|
||
8001e84: 4613 mov r3, r2
|
||
8001e86: 71fb strb r3, [r7, #7]
|
||
__IO uint32_t count;
|
||
uint32_t tmp_timeout;
|
||
uint32_t tmp_tickstart;
|
||
|
||
/* Adjust Timeout value in case of end of transfer */
|
||
tmp_timeout = Timeout - (HAL_GetTick() - Tickstart);
|
||
8001e88: f7fe fcd0 bl 800082c <HAL_GetTick>
|
||
8001e8c: 4602 mov r2, r0
|
||
8001e8e: 6abb ldr r3, [r7, #40] ; 0x28
|
||
8001e90: 1a9b subs r3, r3, r2
|
||
8001e92: 683a ldr r2, [r7, #0]
|
||
8001e94: 4413 add r3, r2
|
||
8001e96: 61fb str r3, [r7, #28]
|
||
tmp_tickstart = HAL_GetTick();
|
||
8001e98: f7fe fcc8 bl 800082c <HAL_GetTick>
|
||
8001e9c: 61b8 str r0, [r7, #24]
|
||
|
||
/* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */
|
||
count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U);
|
||
8001e9e: 4b39 ldr r3, [pc, #228] ; (8001f84 <SPI_WaitFlagStateUntilTimeout+0x10c>)
|
||
8001ea0: 681b ldr r3, [r3, #0]
|
||
8001ea2: 015b lsls r3, r3, #5
|
||
8001ea4: 0d1b lsrs r3, r3, #20
|
||
8001ea6: 69fa ldr r2, [r7, #28]
|
||
8001ea8: fb02 f303 mul.w r3, r2, r3
|
||
8001eac: 617b str r3, [r7, #20]
|
||
|
||
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
|
||
8001eae: e054 b.n 8001f5a <SPI_WaitFlagStateUntilTimeout+0xe2>
|
||
{
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8001eb0: 683b ldr r3, [r7, #0]
|
||
8001eb2: f1b3 3fff cmp.w r3, #4294967295
|
||
8001eb6: d050 beq.n 8001f5a <SPI_WaitFlagStateUntilTimeout+0xe2>
|
||
{
|
||
if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U))
|
||
8001eb8: f7fe fcb8 bl 800082c <HAL_GetTick>
|
||
8001ebc: 4602 mov r2, r0
|
||
8001ebe: 69bb ldr r3, [r7, #24]
|
||
8001ec0: 1ad3 subs r3, r2, r3
|
||
8001ec2: 69fa ldr r2, [r7, #28]
|
||
8001ec4: 429a cmp r2, r3
|
||
8001ec6: d902 bls.n 8001ece <SPI_WaitFlagStateUntilTimeout+0x56>
|
||
8001ec8: 69fb ldr r3, [r7, #28]
|
||
8001eca: 2b00 cmp r3, #0
|
||
8001ecc: d13d bne.n 8001f4a <SPI_WaitFlagStateUntilTimeout+0xd2>
|
||
/* Disable the SPI and reset the CRC: the CRC value should be cleared
|
||
on both master and slave sides in order to resynchronize the master
|
||
and slave for their respective CRC calculation */
|
||
|
||
/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
|
||
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
|
||
8001ece: 68fb ldr r3, [r7, #12]
|
||
8001ed0: 681b ldr r3, [r3, #0]
|
||
8001ed2: 685a ldr r2, [r3, #4]
|
||
8001ed4: 68fb ldr r3, [r7, #12]
|
||
8001ed6: 681b ldr r3, [r3, #0]
|
||
8001ed8: f022 02e0 bic.w r2, r2, #224 ; 0xe0
|
||
8001edc: 605a str r2, [r3, #4]
|
||
|
||
if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
|
||
8001ede: 68fb ldr r3, [r7, #12]
|
||
8001ee0: 685b ldr r3, [r3, #4]
|
||
8001ee2: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
8001ee6: d111 bne.n 8001f0c <SPI_WaitFlagStateUntilTimeout+0x94>
|
||
8001ee8: 68fb ldr r3, [r7, #12]
|
||
8001eea: 689b ldr r3, [r3, #8]
|
||
8001eec: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
||
8001ef0: d004 beq.n 8001efc <SPI_WaitFlagStateUntilTimeout+0x84>
|
||
|| (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
|
||
8001ef2: 68fb ldr r3, [r7, #12]
|
||
8001ef4: 689b ldr r3, [r3, #8]
|
||
8001ef6: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
8001efa: d107 bne.n 8001f0c <SPI_WaitFlagStateUntilTimeout+0x94>
|
||
{
|
||
/* Disable SPI peripheral */
|
||
__HAL_SPI_DISABLE(hspi);
|
||
8001efc: 68fb ldr r3, [r7, #12]
|
||
8001efe: 681b ldr r3, [r3, #0]
|
||
8001f00: 681a ldr r2, [r3, #0]
|
||
8001f02: 68fb ldr r3, [r7, #12]
|
||
8001f04: 681b ldr r3, [r3, #0]
|
||
8001f06: f022 0240 bic.w r2, r2, #64 ; 0x40
|
||
8001f0a: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Reset CRC Calculation */
|
||
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
|
||
8001f0c: 68fb ldr r3, [r7, #12]
|
||
8001f0e: 6a9b ldr r3, [r3, #40] ; 0x28
|
||
8001f10: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
|
||
8001f14: d10f bne.n 8001f36 <SPI_WaitFlagStateUntilTimeout+0xbe>
|
||
{
|
||
SPI_RESET_CRC(hspi);
|
||
8001f16: 68fb ldr r3, [r7, #12]
|
||
8001f18: 681b ldr r3, [r3, #0]
|
||
8001f1a: 681a ldr r2, [r3, #0]
|
||
8001f1c: 68fb ldr r3, [r7, #12]
|
||
8001f1e: 681b ldr r3, [r3, #0]
|
||
8001f20: f422 5200 bic.w r2, r2, #8192 ; 0x2000
|
||
8001f24: 601a str r2, [r3, #0]
|
||
8001f26: 68fb ldr r3, [r7, #12]
|
||
8001f28: 681b ldr r3, [r3, #0]
|
||
8001f2a: 681a ldr r2, [r3, #0]
|
||
8001f2c: 68fb ldr r3, [r7, #12]
|
||
8001f2e: 681b ldr r3, [r3, #0]
|
||
8001f30: f442 5200 orr.w r2, r2, #8192 ; 0x2000
|
||
8001f34: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
hspi->State = HAL_SPI_STATE_READY;
|
||
8001f36: 68fb ldr r3, [r7, #12]
|
||
8001f38: 2201 movs r2, #1
|
||
8001f3a: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hspi);
|
||
8001f3e: 68fb ldr r3, [r7, #12]
|
||
8001f40: 2200 movs r2, #0
|
||
8001f42: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
|
||
return HAL_TIMEOUT;
|
||
8001f46: 2303 movs r3, #3
|
||
8001f48: e017 b.n 8001f7a <SPI_WaitFlagStateUntilTimeout+0x102>
|
||
}
|
||
/* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
|
||
if(count == 0U)
|
||
8001f4a: 697b ldr r3, [r7, #20]
|
||
8001f4c: 2b00 cmp r3, #0
|
||
8001f4e: d101 bne.n 8001f54 <SPI_WaitFlagStateUntilTimeout+0xdc>
|
||
{
|
||
tmp_timeout = 0U;
|
||
8001f50: 2300 movs r3, #0
|
||
8001f52: 61fb str r3, [r7, #28]
|
||
}
|
||
count--;
|
||
8001f54: 697b ldr r3, [r7, #20]
|
||
8001f56: 3b01 subs r3, #1
|
||
8001f58: 617b str r3, [r7, #20]
|
||
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
|
||
8001f5a: 68fb ldr r3, [r7, #12]
|
||
8001f5c: 681b ldr r3, [r3, #0]
|
||
8001f5e: 689a ldr r2, [r3, #8]
|
||
8001f60: 68bb ldr r3, [r7, #8]
|
||
8001f62: 4013 ands r3, r2
|
||
8001f64: 68ba ldr r2, [r7, #8]
|
||
8001f66: 429a cmp r2, r3
|
||
8001f68: bf0c ite eq
|
||
8001f6a: 2301 moveq r3, #1
|
||
8001f6c: 2300 movne r3, #0
|
||
8001f6e: b2db uxtb r3, r3
|
||
8001f70: 461a mov r2, r3
|
||
8001f72: 79fb ldrb r3, [r7, #7]
|
||
8001f74: 429a cmp r2, r3
|
||
8001f76: d19b bne.n 8001eb0 <SPI_WaitFlagStateUntilTimeout+0x38>
|
||
}
|
||
}
|
||
|
||
return HAL_OK;
|
||
8001f78: 2300 movs r3, #0
|
||
}
|
||
8001f7a: 4618 mov r0, r3
|
||
8001f7c: 3720 adds r7, #32
|
||
8001f7e: 46bd mov sp, r7
|
||
8001f80: bd80 pop {r7, pc}
|
||
8001f82: bf00 nop
|
||
8001f84: 20000000 .word 0x20000000
|
||
|
||
08001f88 <SPI_EndRxTransaction>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8001f88: b580 push {r7, lr}
|
||
8001f8a: b086 sub sp, #24
|
||
8001f8c: af02 add r7, sp, #8
|
||
8001f8e: 60f8 str r0, [r7, #12]
|
||
8001f90: 60b9 str r1, [r7, #8]
|
||
8001f92: 607a str r2, [r7, #4]
|
||
if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
|
||
8001f94: 68fb ldr r3, [r7, #12]
|
||
8001f96: 685b ldr r3, [r3, #4]
|
||
8001f98: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
8001f9c: d111 bne.n 8001fc2 <SPI_EndRxTransaction+0x3a>
|
||
8001f9e: 68fb ldr r3, [r7, #12]
|
||
8001fa0: 689b ldr r3, [r3, #8]
|
||
8001fa2: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
||
8001fa6: d004 beq.n 8001fb2 <SPI_EndRxTransaction+0x2a>
|
||
|| (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
|
||
8001fa8: 68fb ldr r3, [r7, #12]
|
||
8001faa: 689b ldr r3, [r3, #8]
|
||
8001fac: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
8001fb0: d107 bne.n 8001fc2 <SPI_EndRxTransaction+0x3a>
|
||
{
|
||
/* Disable SPI peripheral */
|
||
__HAL_SPI_DISABLE(hspi);
|
||
8001fb2: 68fb ldr r3, [r7, #12]
|
||
8001fb4: 681b ldr r3, [r3, #0]
|
||
8001fb6: 681a ldr r2, [r3, #0]
|
||
8001fb8: 68fb ldr r3, [r7, #12]
|
||
8001fba: 681b ldr r3, [r3, #0]
|
||
8001fbc: f022 0240 bic.w r2, r2, #64 ; 0x40
|
||
8001fc0: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))
|
||
8001fc2: 68fb ldr r3, [r7, #12]
|
||
8001fc4: 685b ldr r3, [r3, #4]
|
||
8001fc6: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
8001fca: d117 bne.n 8001ffc <SPI_EndRxTransaction+0x74>
|
||
8001fcc: 68fb ldr r3, [r7, #12]
|
||
8001fce: 689b ldr r3, [r3, #8]
|
||
8001fd0: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
8001fd4: d112 bne.n 8001ffc <SPI_EndRxTransaction+0x74>
|
||
{
|
||
/* Wait the RXNE reset */
|
||
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK)
|
||
8001fd6: 687b ldr r3, [r7, #4]
|
||
8001fd8: 9300 str r3, [sp, #0]
|
||
8001fda: 68bb ldr r3, [r7, #8]
|
||
8001fdc: 2200 movs r2, #0
|
||
8001fde: 2101 movs r1, #1
|
||
8001fe0: 68f8 ldr r0, [r7, #12]
|
||
8001fe2: f7ff ff49 bl 8001e78 <SPI_WaitFlagStateUntilTimeout>
|
||
8001fe6: 4603 mov r3, r0
|
||
8001fe8: 2b00 cmp r3, #0
|
||
8001fea: d01a beq.n 8002022 <SPI_EndRxTransaction+0x9a>
|
||
{
|
||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
|
||
8001fec: 68fb ldr r3, [r7, #12]
|
||
8001fee: 6d5b ldr r3, [r3, #84] ; 0x54
|
||
8001ff0: f043 0220 orr.w r2, r3, #32
|
||
8001ff4: 68fb ldr r3, [r7, #12]
|
||
8001ff6: 655a str r2, [r3, #84] ; 0x54
|
||
return HAL_TIMEOUT;
|
||
8001ff8: 2303 movs r3, #3
|
||
8001ffa: e013 b.n 8002024 <SPI_EndRxTransaction+0x9c>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Control the BSY flag */
|
||
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
|
||
8001ffc: 687b ldr r3, [r7, #4]
|
||
8001ffe: 9300 str r3, [sp, #0]
|
||
8002000: 68bb ldr r3, [r7, #8]
|
||
8002002: 2200 movs r2, #0
|
||
8002004: 2180 movs r1, #128 ; 0x80
|
||
8002006: 68f8 ldr r0, [r7, #12]
|
||
8002008: f7ff ff36 bl 8001e78 <SPI_WaitFlagStateUntilTimeout>
|
||
800200c: 4603 mov r3, r0
|
||
800200e: 2b00 cmp r3, #0
|
||
8002010: d007 beq.n 8002022 <SPI_EndRxTransaction+0x9a>
|
||
{
|
||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
|
||
8002012: 68fb ldr r3, [r7, #12]
|
||
8002014: 6d5b ldr r3, [r3, #84] ; 0x54
|
||
8002016: f043 0220 orr.w r2, r3, #32
|
||
800201a: 68fb ldr r3, [r7, #12]
|
||
800201c: 655a str r2, [r3, #84] ; 0x54
|
||
return HAL_TIMEOUT;
|
||
800201e: 2303 movs r3, #3
|
||
8002020: e000 b.n 8002024 <SPI_EndRxTransaction+0x9c>
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002022: 2300 movs r3, #0
|
||
}
|
||
8002024: 4618 mov r0, r3
|
||
8002026: 3710 adds r7, #16
|
||
8002028: 46bd mov sp, r7
|
||
800202a: bd80 pop {r7, pc}
|
||
|
||
0800202c <SPI_EndRxTxTransaction>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
800202c: b580 push {r7, lr}
|
||
800202e: b086 sub sp, #24
|
||
8002030: af02 add r7, sp, #8
|
||
8002032: 60f8 str r0, [r7, #12]
|
||
8002034: 60b9 str r1, [r7, #8]
|
||
8002036: 607a str r2, [r7, #4]
|
||
/* Control the BSY flag */
|
||
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
|
||
8002038: 687b ldr r3, [r7, #4]
|
||
800203a: 9300 str r3, [sp, #0]
|
||
800203c: 68bb ldr r3, [r7, #8]
|
||
800203e: 2200 movs r2, #0
|
||
8002040: 2180 movs r1, #128 ; 0x80
|
||
8002042: 68f8 ldr r0, [r7, #12]
|
||
8002044: f7ff ff18 bl 8001e78 <SPI_WaitFlagStateUntilTimeout>
|
||
8002048: 4603 mov r3, r0
|
||
800204a: 2b00 cmp r3, #0
|
||
800204c: d007 beq.n 800205e <SPI_EndRxTxTransaction+0x32>
|
||
{
|
||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
|
||
800204e: 68fb ldr r3, [r7, #12]
|
||
8002050: 6d5b ldr r3, [r3, #84] ; 0x54
|
||
8002052: f043 0220 orr.w r2, r3, #32
|
||
8002056: 68fb ldr r3, [r7, #12]
|
||
8002058: 655a str r2, [r3, #84] ; 0x54
|
||
return HAL_TIMEOUT;
|
||
800205a: 2303 movs r3, #3
|
||
800205c: e000 b.n 8002060 <SPI_EndRxTxTransaction+0x34>
|
||
}
|
||
return HAL_OK;
|
||
800205e: 2300 movs r3, #0
|
||
}
|
||
8002060: 4618 mov r0, r3
|
||
8002062: 3710 adds r7, #16
|
||
8002064: 46bd mov sp, r7
|
||
8002066: bd80 pop {r7, pc}
|
||
|
||
08002068 <HAL_SRAM_Init>:
|
||
* @param ExtTiming Pointer to SRAM extended mode timing structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing,
|
||
FSMC_NORSRAM_TimingTypeDef *ExtTiming)
|
||
{
|
||
8002068: b580 push {r7, lr}
|
||
800206a: b084 sub sp, #16
|
||
800206c: af00 add r7, sp, #0
|
||
800206e: 60f8 str r0, [r7, #12]
|
||
8002070: 60b9 str r1, [r7, #8]
|
||
8002072: 607a str r2, [r7, #4]
|
||
/* Check the SRAM handle parameter */
|
||
if ((hsram == NULL) || (hsram->Init.BurstAccessMode == FSMC_BURST_ACCESS_MODE_ENABLE))
|
||
8002074: 68fb ldr r3, [r7, #12]
|
||
8002076: 2b00 cmp r3, #0
|
||
8002078: d004 beq.n 8002084 <HAL_SRAM_Init+0x1c>
|
||
800207a: 68fb ldr r3, [r7, #12]
|
||
800207c: 699b ldr r3, [r3, #24]
|
||
800207e: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
8002082: d101 bne.n 8002088 <HAL_SRAM_Init+0x20>
|
||
{
|
||
return HAL_ERROR;
|
||
8002084: 2301 movs r3, #1
|
||
8002086: e038 b.n 80020fa <HAL_SRAM_Init+0x92>
|
||
}
|
||
|
||
if (hsram->State == HAL_SRAM_STATE_RESET)
|
||
8002088: 68fb ldr r3, [r7, #12]
|
||
800208a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
|
||
800208e: b2db uxtb r3, r3
|
||
8002090: 2b00 cmp r3, #0
|
||
8002092: d106 bne.n 80020a2 <HAL_SRAM_Init+0x3a>
|
||
{
|
||
/* Allocate lock resource and initialize it */
|
||
hsram->Lock = HAL_UNLOCKED;
|
||
8002094: 68fb ldr r3, [r7, #12]
|
||
8002096: 2200 movs r2, #0
|
||
8002098: f883 2040 strb.w r2, [r3, #64] ; 0x40
|
||
|
||
/* Init the low level hardware */
|
||
hsram->MspInitCallback(hsram);
|
||
#else
|
||
/* Initialize the low level hardware (MSP) */
|
||
HAL_SRAM_MspInit(hsram);
|
||
800209c: 68f8 ldr r0, [r7, #12]
|
||
800209e: f7fe fb0f bl 80006c0 <HAL_SRAM_MspInit>
|
||
#endif
|
||
}
|
||
|
||
/* Initialize SRAM control Interface */
|
||
(void)FSMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
|
||
80020a2: 68fb ldr r3, [r7, #12]
|
||
80020a4: 681a ldr r2, [r3, #0]
|
||
80020a6: 68fb ldr r3, [r7, #12]
|
||
80020a8: 3308 adds r3, #8
|
||
80020aa: 4619 mov r1, r3
|
||
80020ac: 4610 mov r0, r2
|
||
80020ae: f000 f829 bl 8002104 <FSMC_NORSRAM_Init>
|
||
|
||
/* Initialize SRAM timing Interface */
|
||
(void)FSMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
|
||
80020b2: 68fb ldr r3, [r7, #12]
|
||
80020b4: 6818 ldr r0, [r3, #0]
|
||
80020b6: 68fb ldr r3, [r7, #12]
|
||
80020b8: 689b ldr r3, [r3, #8]
|
||
80020ba: 461a mov r2, r3
|
||
80020bc: 68b9 ldr r1, [r7, #8]
|
||
80020be: f000 f88b bl 80021d8 <FSMC_NORSRAM_Timing_Init>
|
||
|
||
/* Initialize SRAM extended mode timing Interface */
|
||
(void)FSMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank,
|
||
80020c2: 68fb ldr r3, [r7, #12]
|
||
80020c4: 6858 ldr r0, [r3, #4]
|
||
80020c6: 68fb ldr r3, [r7, #12]
|
||
80020c8: 689a ldr r2, [r3, #8]
|
||
80020ca: 68fb ldr r3, [r7, #12]
|
||
80020cc: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
80020ce: 6879 ldr r1, [r7, #4]
|
||
80020d0: f000 f8b6 bl 8002240 <FSMC_NORSRAM_Extended_Timing_Init>
|
||
hsram->Init.ExtendedMode);
|
||
|
||
/* Enable the NORSRAM device */
|
||
__FSMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
|
||
80020d4: 68fb ldr r3, [r7, #12]
|
||
80020d6: 681b ldr r3, [r3, #0]
|
||
80020d8: 68fa ldr r2, [r7, #12]
|
||
80020da: 6892 ldr r2, [r2, #8]
|
||
80020dc: f853 1022 ldr.w r1, [r3, r2, lsl #2]
|
||
80020e0: 68fb ldr r3, [r7, #12]
|
||
80020e2: 681b ldr r3, [r3, #0]
|
||
80020e4: 68fa ldr r2, [r7, #12]
|
||
80020e6: 6892 ldr r2, [r2, #8]
|
||
80020e8: f041 0101 orr.w r1, r1, #1
|
||
80020ec: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Initialize the SRAM controller state */
|
||
hsram->State = HAL_SRAM_STATE_READY;
|
||
80020f0: 68fb ldr r3, [r7, #12]
|
||
80020f2: 2201 movs r2, #1
|
||
80020f4: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
||
|
||
return HAL_OK;
|
||
80020f8: 2300 movs r3, #0
|
||
}
|
||
80020fa: 4618 mov r0, r3
|
||
80020fc: 3710 adds r7, #16
|
||
80020fe: 46bd mov sp, r7
|
||
8002100: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08002104 <FSMC_NORSRAM_Init>:
|
||
* @param Init Pointer to NORSRAM Initialization structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_InitTypeDef *Init)
|
||
{
|
||
8002104: b480 push {r7}
|
||
8002106: b087 sub sp, #28
|
||
8002108: af00 add r7, sp, #0
|
||
800210a: 6078 str r0, [r7, #4]
|
||
800210c: 6039 str r1, [r7, #0]
|
||
assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait));
|
||
assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst));
|
||
assert_param(IS_FSMC_PAGESIZE(Init->PageSize));
|
||
|
||
/* Disable NORSRAM Device */
|
||
__FSMC_NORSRAM_DISABLE(Device, Init->NSBank);
|
||
800210e: 683b ldr r3, [r7, #0]
|
||
8002110: 681a ldr r2, [r3, #0]
|
||
8002112: 687b ldr r3, [r7, #4]
|
||
8002114: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
8002118: 683a ldr r2, [r7, #0]
|
||
800211a: 6812 ldr r2, [r2, #0]
|
||
800211c: f023 0101 bic.w r1, r3, #1
|
||
8002120: 687b ldr r3, [r7, #4]
|
||
8002122: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Set NORSRAM device control parameters */
|
||
if (Init->MemoryType == FSMC_MEMORY_TYPE_NOR)
|
||
8002126: 683b ldr r3, [r7, #0]
|
||
8002128: 689b ldr r3, [r3, #8]
|
||
800212a: 2b08 cmp r3, #8
|
||
800212c: d102 bne.n 8002134 <FSMC_NORSRAM_Init+0x30>
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_ENABLE;
|
||
800212e: 2340 movs r3, #64 ; 0x40
|
||
8002130: 617b str r3, [r7, #20]
|
||
8002132: e001 b.n 8002138 <FSMC_NORSRAM_Init+0x34>
|
||
}
|
||
else
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_DISABLE;
|
||
8002134: 2300 movs r3, #0
|
||
8002136: 617b str r3, [r7, #20]
|
||
}
|
||
|
||
btcr_reg = (flashaccess | \
|
||
Init->DataAddressMux | \
|
||
8002138: 683b ldr r3, [r7, #0]
|
||
800213a: 685a ldr r2, [r3, #4]
|
||
btcr_reg = (flashaccess | \
|
||
800213c: 697b ldr r3, [r7, #20]
|
||
800213e: 431a orrs r2, r3
|
||
Init->MemoryType | \
|
||
8002140: 683b ldr r3, [r7, #0]
|
||
8002142: 689b ldr r3, [r3, #8]
|
||
Init->DataAddressMux | \
|
||
8002144: 431a orrs r2, r3
|
||
Init->MemoryDataWidth | \
|
||
8002146: 683b ldr r3, [r7, #0]
|
||
8002148: 68db ldr r3, [r3, #12]
|
||
Init->MemoryType | \
|
||
800214a: 431a orrs r2, r3
|
||
Init->BurstAccessMode | \
|
||
800214c: 683b ldr r3, [r7, #0]
|
||
800214e: 691b ldr r3, [r3, #16]
|
||
Init->MemoryDataWidth | \
|
||
8002150: 431a orrs r2, r3
|
||
Init->WaitSignalPolarity | \
|
||
8002152: 683b ldr r3, [r7, #0]
|
||
8002154: 695b ldr r3, [r3, #20]
|
||
Init->BurstAccessMode | \
|
||
8002156: 431a orrs r2, r3
|
||
Init->WaitSignalActive | \
|
||
8002158: 683b ldr r3, [r7, #0]
|
||
800215a: 69db ldr r3, [r3, #28]
|
||
Init->WaitSignalPolarity | \
|
||
800215c: 431a orrs r2, r3
|
||
Init->WriteOperation | \
|
||
800215e: 683b ldr r3, [r7, #0]
|
||
8002160: 6a1b ldr r3, [r3, #32]
|
||
Init->WaitSignalActive | \
|
||
8002162: 431a orrs r2, r3
|
||
Init->WaitSignal | \
|
||
8002164: 683b ldr r3, [r7, #0]
|
||
8002166: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
Init->WriteOperation | \
|
||
8002168: 431a orrs r2, r3
|
||
Init->ExtendedMode | \
|
||
800216a: 683b ldr r3, [r7, #0]
|
||
800216c: 6a9b ldr r3, [r3, #40] ; 0x28
|
||
Init->WaitSignal | \
|
||
800216e: 431a orrs r2, r3
|
||
Init->AsynchronousWait | \
|
||
8002170: 683b ldr r3, [r7, #0]
|
||
8002172: 6adb ldr r3, [r3, #44] ; 0x2c
|
||
Init->ExtendedMode | \
|
||
8002174: 431a orrs r2, r3
|
||
Init->WriteBurst);
|
||
8002176: 683b ldr r3, [r7, #0]
|
||
8002178: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
btcr_reg = (flashaccess | \
|
||
800217a: 4313 orrs r3, r2
|
||
800217c: 613b str r3, [r7, #16]
|
||
|
||
btcr_reg |= Init->WrapMode;
|
||
800217e: 683b ldr r3, [r7, #0]
|
||
8002180: 699b ldr r3, [r3, #24]
|
||
8002182: 693a ldr r2, [r7, #16]
|
||
8002184: 4313 orrs r3, r2
|
||
8002186: 613b str r3, [r7, #16]
|
||
btcr_reg |= Init->PageSize;
|
||
8002188: 683b ldr r3, [r7, #0]
|
||
800218a: 6b5b ldr r3, [r3, #52] ; 0x34
|
||
800218c: 693a ldr r2, [r7, #16]
|
||
800218e: 4313 orrs r3, r2
|
||
8002190: 613b str r3, [r7, #16]
|
||
|
||
mask = (FSMC_BCRx_MBKEN |
|
||
8002192: 4b10 ldr r3, [pc, #64] ; (80021d4 <FSMC_NORSRAM_Init+0xd0>)
|
||
8002194: 60fb str r3, [r7, #12]
|
||
FSMC_BCRx_WAITEN |
|
||
FSMC_BCRx_EXTMOD |
|
||
FSMC_BCRx_ASYNCWAIT |
|
||
FSMC_BCRx_CBURSTRW);
|
||
|
||
mask |= FSMC_BCRx_WRAPMOD;
|
||
8002196: 68fb ldr r3, [r7, #12]
|
||
8002198: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
800219c: 60fb str r3, [r7, #12]
|
||
mask |= 0x00070000U; /* CPSIZE to be defined in CMSIS file */
|
||
800219e: 68fb ldr r3, [r7, #12]
|
||
80021a0: f443 23e0 orr.w r3, r3, #458752 ; 0x70000
|
||
80021a4: 60fb str r3, [r7, #12]
|
||
|
||
MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg);
|
||
80021a6: 683b ldr r3, [r7, #0]
|
||
80021a8: 681a ldr r2, [r3, #0]
|
||
80021aa: 687b ldr r3, [r7, #4]
|
||
80021ac: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
80021b0: 68fb ldr r3, [r7, #12]
|
||
80021b2: 43db mvns r3, r3
|
||
80021b4: ea02 0103 and.w r1, r2, r3
|
||
80021b8: 683b ldr r3, [r7, #0]
|
||
80021ba: 681a ldr r2, [r3, #0]
|
||
80021bc: 693b ldr r3, [r7, #16]
|
||
80021be: 4319 orrs r1, r3
|
||
80021c0: 687b ldr r3, [r7, #4]
|
||
80021c2: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
|
||
return HAL_OK;
|
||
80021c6: 2300 movs r3, #0
|
||
}
|
||
80021c8: 4618 mov r0, r3
|
||
80021ca: 371c adds r7, #28
|
||
80021cc: 46bd mov sp, r7
|
||
80021ce: bc80 pop {r7}
|
||
80021d0: 4770 bx lr
|
||
80021d2: bf00 nop
|
||
80021d4: 0008fb7f .word 0x0008fb7f
|
||
|
||
080021d8 <FSMC_NORSRAM_Timing_Init>:
|
||
* @param Bank NORSRAM bank number
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
|
||
{
|
||
80021d8: b480 push {r7}
|
||
80021da: b085 sub sp, #20
|
||
80021dc: af00 add r7, sp, #0
|
||
80021de: 60f8 str r0, [r7, #12]
|
||
80021e0: 60b9 str r1, [r7, #8]
|
||
80021e2: 607a str r2, [r7, #4]
|
||
assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency));
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set FSMC_NORSRAM device timing parameters */
|
||
MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
80021e4: 687b ldr r3, [r7, #4]
|
||
80021e6: 1c5a adds r2, r3, #1
|
||
80021e8: 68fb ldr r3, [r7, #12]
|
||
80021ea: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
80021ee: f003 4140 and.w r1, r3, #3221225472 ; 0xc0000000
|
||
80021f2: 68bb ldr r3, [r7, #8]
|
||
80021f4: 681a ldr r2, [r3, #0]
|
||
80021f6: 68bb ldr r3, [r7, #8]
|
||
80021f8: 685b ldr r3, [r3, #4]
|
||
80021fa: 011b lsls r3, r3, #4
|
||
80021fc: 431a orrs r2, r3
|
||
80021fe: 68bb ldr r3, [r7, #8]
|
||
8002200: 689b ldr r3, [r3, #8]
|
||
8002202: 021b lsls r3, r3, #8
|
||
8002204: 431a orrs r2, r3
|
||
8002206: 68bb ldr r3, [r7, #8]
|
||
8002208: 68db ldr r3, [r3, #12]
|
||
800220a: 041b lsls r3, r3, #16
|
||
800220c: 431a orrs r2, r3
|
||
800220e: 68bb ldr r3, [r7, #8]
|
||
8002210: 691b ldr r3, [r3, #16]
|
||
8002212: 3b01 subs r3, #1
|
||
8002214: 051b lsls r3, r3, #20
|
||
8002216: 431a orrs r2, r3
|
||
8002218: 68bb ldr r3, [r7, #8]
|
||
800221a: 695b ldr r3, [r3, #20]
|
||
800221c: 3b02 subs r3, #2
|
||
800221e: 061b lsls r3, r3, #24
|
||
8002220: 431a orrs r2, r3
|
||
8002222: 68bb ldr r3, [r7, #8]
|
||
8002224: 699b ldr r3, [r3, #24]
|
||
8002226: 4313 orrs r3, r2
|
||
8002228: 687a ldr r2, [r7, #4]
|
||
800222a: 3201 adds r2, #1
|
||
800222c: 4319 orrs r1, r3
|
||
800222e: 68fb ldr r3, [r7, #12]
|
||
8002230: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
((Timing->BusTurnAroundDuration) << FSMC_BTRx_BUSTURN_Pos) |
|
||
(((Timing->CLKDivision) - 1U) << FSMC_BTRx_CLKDIV_Pos) |
|
||
(((Timing->DataLatency) - 2U) << FSMC_BTRx_DATLAT_Pos) |
|
||
(Timing->AccessMode)));
|
||
|
||
return HAL_OK;
|
||
8002234: 2300 movs r3, #0
|
||
}
|
||
8002236: 4618 mov r0, r3
|
||
8002238: 3714 adds r7, #20
|
||
800223a: 46bd mov sp, r7
|
||
800223c: bc80 pop {r7}
|
||
800223e: 4770 bx lr
|
||
|
||
08002240 <FSMC_NORSRAM_Extended_Timing_Init>:
|
||
* @arg FSMC_EXTENDED_MODE_ENABLE
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode)
|
||
{
|
||
8002240: b480 push {r7}
|
||
8002242: b085 sub sp, #20
|
||
8002244: af00 add r7, sp, #0
|
||
8002246: 60f8 str r0, [r7, #12]
|
||
8002248: 60b9 str r1, [r7, #8]
|
||
800224a: 607a str r2, [r7, #4]
|
||
800224c: 603b str r3, [r7, #0]
|
||
/* Check the parameters */
|
||
assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
if (ExtendedMode == FSMC_EXTENDED_MODE_ENABLE)
|
||
800224e: 683b ldr r3, [r7, #0]
|
||
8002250: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
|
||
8002254: d11d bne.n 8002292 <FSMC_NORSRAM_Extended_Timing_Init+0x52>
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
#if defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG)
|
||
MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
8002256: 68fb ldr r3, [r7, #12]
|
||
8002258: 687a ldr r2, [r7, #4]
|
||
800225a: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
800225e: 4b13 ldr r3, [pc, #76] ; (80022ac <FSMC_NORSRAM_Extended_Timing_Init+0x6c>)
|
||
8002260: 4013 ands r3, r2
|
||
8002262: 68ba ldr r2, [r7, #8]
|
||
8002264: 6811 ldr r1, [r2, #0]
|
||
8002266: 68ba ldr r2, [r7, #8]
|
||
8002268: 6852 ldr r2, [r2, #4]
|
||
800226a: 0112 lsls r2, r2, #4
|
||
800226c: 4311 orrs r1, r2
|
||
800226e: 68ba ldr r2, [r7, #8]
|
||
8002270: 6892 ldr r2, [r2, #8]
|
||
8002272: 0212 lsls r2, r2, #8
|
||
8002274: 4311 orrs r1, r2
|
||
8002276: 68ba ldr r2, [r7, #8]
|
||
8002278: 6992 ldr r2, [r2, #24]
|
||
800227a: 4311 orrs r1, r2
|
||
800227c: 68ba ldr r2, [r7, #8]
|
||
800227e: 68d2 ldr r2, [r2, #12]
|
||
8002280: 0412 lsls r2, r2, #16
|
||
8002282: 430a orrs r2, r1
|
||
8002284: ea43 0102 orr.w r1, r3, r2
|
||
8002288: 68fb ldr r3, [r7, #12]
|
||
800228a: 687a ldr r2, [r7, #4]
|
||
800228c: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
8002290: e005 b.n 800229e <FSMC_NORSRAM_Extended_Timing_Init+0x5e>
|
||
(((Timing->DataLatency) - 2U) << FSMC_BWTRx_DATLAT_Pos)));
|
||
#endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG */
|
||
}
|
||
else
|
||
{
|
||
Device->BWTR[Bank] = 0x0FFFFFFFU;
|
||
8002292: 68fb ldr r3, [r7, #12]
|
||
8002294: 687a ldr r2, [r7, #4]
|
||
8002296: f06f 4170 mvn.w r1, #4026531840 ; 0xf0000000
|
||
800229a: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
}
|
||
|
||
return HAL_OK;
|
||
800229e: 2300 movs r3, #0
|
||
}
|
||
80022a0: 4618 mov r0, r3
|
||
80022a2: 3714 adds r7, #20
|
||
80022a4: 46bd mov sp, r7
|
||
80022a6: bc80 pop {r7}
|
||
80022a8: 4770 bx lr
|
||
80022aa: bf00 nop
|
||
80022ac: cff00000 .word 0xcff00000
|
||
|
||
080022b0 <MX_FATFS_Init>:
|
||
/* USER CODE BEGIN Variables */
|
||
|
||
/* USER CODE END Variables */
|
||
|
||
void MX_FATFS_Init(void)
|
||
{
|
||
80022b0: b580 push {r7, lr}
|
||
80022b2: af00 add r7, sp, #0
|
||
/*## FatFS: Link the USER driver ###########################*/
|
||
retUSER = FATFS_LinkDriver(&USER_Driver, USERPath);
|
||
80022b4: 4904 ldr r1, [pc, #16] ; (80022c8 <MX_FATFS_Init+0x18>)
|
||
80022b6: 4805 ldr r0, [pc, #20] ; (80022cc <MX_FATFS_Init+0x1c>)
|
||
80022b8: f002 fa02 bl 80046c0 <FATFS_LinkDriver>
|
||
80022bc: 4603 mov r3, r0
|
||
80022be: 461a mov r2, r3
|
||
80022c0: 4b03 ldr r3, [pc, #12] ; (80022d0 <MX_FATFS_Init+0x20>)
|
||
80022c2: 701a strb r2, [r3, #0]
|
||
|
||
/* USER CODE BEGIN Init */
|
||
/* additional user code for init */
|
||
/* USER CODE END Init */
|
||
}
|
||
80022c4: bf00 nop
|
||
80022c6: bd80 pop {r7, pc}
|
||
80022c8: 20000118 .word 0x20000118
|
||
80022cc: 2000000c .word 0x2000000c
|
||
80022d0: 2000011c .word 0x2000011c
|
||
|
||
080022d4 <get_fattime>:
|
||
* @brief Gets Time from RTC
|
||
* @param None
|
||
* @retval Time in DWORD
|
||
*/
|
||
DWORD get_fattime(void)
|
||
{
|
||
80022d4: b480 push {r7}
|
||
80022d6: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN get_fattime */
|
||
return 0;
|
||
80022d8: 2300 movs r3, #0
|
||
/* USER CODE END get_fattime */
|
||
}
|
||
80022da: 4618 mov r0, r3
|
||
80022dc: 46bd mov sp, r7
|
||
80022de: bc80 pop {r7}
|
||
80022e0: 4770 bx lr
|
||
...
|
||
|
||
080022e4 <USER_initialize>:
|
||
* @retval DSTATUS: Operation status
|
||
*/
|
||
DSTATUS USER_initialize (
|
||
BYTE pdrv /* Physical drive nmuber to identify the drive */
|
||
)
|
||
{
|
||
80022e4: b580 push {r7, lr}
|
||
80022e6: b082 sub sp, #8
|
||
80022e8: af00 add r7, sp, #0
|
||
80022ea: 4603 mov r3, r0
|
||
80022ec: 71fb strb r3, [r7, #7]
|
||
/* USER CODE BEGIN INIT */
|
||
Stat = SD_disk_initialize(pdrv);
|
||
80022ee: 79fb ldrb r3, [r7, #7]
|
||
80022f0: 4618 mov r0, r3
|
||
80022f2: f002 fc3d bl 8004b70 <SD_disk_initialize>
|
||
80022f6: 4603 mov r3, r0
|
||
80022f8: 461a mov r2, r3
|
||
80022fa: 4b04 ldr r3, [pc, #16] ; (800230c <USER_initialize+0x28>)
|
||
80022fc: 701a strb r2, [r3, #0]
|
||
return Stat;
|
||
80022fe: 4b03 ldr r3, [pc, #12] ; (800230c <USER_initialize+0x28>)
|
||
8002300: 781b ldrb r3, [r3, #0]
|
||
8002302: b2db uxtb r3, r3
|
||
/* USER CODE END INIT */
|
||
}
|
||
8002304: 4618 mov r0, r3
|
||
8002306: 3708 adds r7, #8
|
||
8002308: 46bd mov sp, r7
|
||
800230a: bd80 pop {r7, pc}
|
||
800230c: 20000009 .word 0x20000009
|
||
|
||
08002310 <USER_status>:
|
||
* @retval DSTATUS: Operation status
|
||
*/
|
||
DSTATUS USER_status (
|
||
BYTE pdrv /* Physical drive number to identify the drive */
|
||
)
|
||
{
|
||
8002310: b580 push {r7, lr}
|
||
8002312: b082 sub sp, #8
|
||
8002314: af00 add r7, sp, #0
|
||
8002316: 4603 mov r3, r0
|
||
8002318: 71fb strb r3, [r7, #7]
|
||
/* USER CODE BEGIN STATUS */
|
||
Stat = SD_disk_status (pdrv);
|
||
800231a: 79fb ldrb r3, [r7, #7]
|
||
800231c: 4618 mov r0, r3
|
||
800231e: f002 fd11 bl 8004d44 <SD_disk_status>
|
||
8002322: 4603 mov r3, r0
|
||
8002324: 461a mov r2, r3
|
||
8002326: 4b04 ldr r3, [pc, #16] ; (8002338 <USER_status+0x28>)
|
||
8002328: 701a strb r2, [r3, #0]
|
||
return Stat;
|
||
800232a: 4b03 ldr r3, [pc, #12] ; (8002338 <USER_status+0x28>)
|
||
800232c: 781b ldrb r3, [r3, #0]
|
||
800232e: b2db uxtb r3, r3
|
||
/* USER CODE END STATUS */
|
||
}
|
||
8002330: 4618 mov r0, r3
|
||
8002332: 3708 adds r7, #8
|
||
8002334: 46bd mov sp, r7
|
||
8002336: bd80 pop {r7, pc}
|
||
8002338: 20000009 .word 0x20000009
|
||
|
||
0800233c <USER_read>:
|
||
BYTE pdrv, /* Physical drive nmuber to identify the drive */
|
||
BYTE *buff, /* Data buffer to store read data */
|
||
DWORD sector, /* Sector address in LBA */
|
||
UINT count /* Number of sectors to read */
|
||
)
|
||
{
|
||
800233c: b580 push {r7, lr}
|
||
800233e: b084 sub sp, #16
|
||
8002340: af00 add r7, sp, #0
|
||
8002342: 60b9 str r1, [r7, #8]
|
||
8002344: 607a str r2, [r7, #4]
|
||
8002346: 603b str r3, [r7, #0]
|
||
8002348: 4603 mov r3, r0
|
||
800234a: 73fb strb r3, [r7, #15]
|
||
/* USER CODE BEGIN READ */
|
||
return SD_disk_read (pdrv, buff, sector, count);
|
||
800234c: 7bf8 ldrb r0, [r7, #15]
|
||
800234e: 683b ldr r3, [r7, #0]
|
||
8002350: 687a ldr r2, [r7, #4]
|
||
8002352: 68b9 ldr r1, [r7, #8]
|
||
8002354: f002 fd0a bl 8004d6c <SD_disk_read>
|
||
8002358: 4603 mov r3, r0
|
||
/* USER CODE END READ */
|
||
}
|
||
800235a: 4618 mov r0, r3
|
||
800235c: 3710 adds r7, #16
|
||
800235e: 46bd mov sp, r7
|
||
8002360: bd80 pop {r7, pc}
|
||
|
||
08002362 <USER_write>:
|
||
BYTE pdrv, /* Physical drive nmuber to identify the drive */
|
||
const BYTE *buff, /* Data to be written */
|
||
DWORD sector, /* Sector address in LBA */
|
||
UINT count /* Number of sectors to write */
|
||
)
|
||
{
|
||
8002362: b580 push {r7, lr}
|
||
8002364: b084 sub sp, #16
|
||
8002366: af00 add r7, sp, #0
|
||
8002368: 60b9 str r1, [r7, #8]
|
||
800236a: 607a str r2, [r7, #4]
|
||
800236c: 603b str r3, [r7, #0]
|
||
800236e: 4603 mov r3, r0
|
||
8002370: 73fb strb r3, [r7, #15]
|
||
/* USER CODE BEGIN WRITE */
|
||
/* USER CODE HERE */
|
||
return SD_disk_write (pdrv, buff, sector, count);
|
||
8002372: 7bf8 ldrb r0, [r7, #15]
|
||
8002374: 683b ldr r3, [r7, #0]
|
||
8002376: 687a ldr r2, [r7, #4]
|
||
8002378: 68b9 ldr r1, [r7, #8]
|
||
800237a: f002 fd61 bl 8004e40 <SD_disk_write>
|
||
800237e: 4603 mov r3, r0
|
||
/* USER CODE END WRITE */
|
||
}
|
||
8002380: 4618 mov r0, r3
|
||
8002382: 3710 adds r7, #16
|
||
8002384: 46bd mov sp, r7
|
||
8002386: bd80 pop {r7, pc}
|
||
|
||
08002388 <USER_ioctl>:
|
||
DRESULT USER_ioctl (
|
||
BYTE pdrv, /* Physical drive nmuber (0..) */
|
||
BYTE cmd, /* Control code */
|
||
void *buff /* Buffer to send/receive control data */
|
||
)
|
||
{
|
||
8002388: b580 push {r7, lr}
|
||
800238a: b084 sub sp, #16
|
||
800238c: af00 add r7, sp, #0
|
||
800238e: 4603 mov r3, r0
|
||
8002390: 603a str r2, [r7, #0]
|
||
8002392: 71fb strb r3, [r7, #7]
|
||
8002394: 460b mov r3, r1
|
||
8002396: 71bb strb r3, [r7, #6]
|
||
/* USER CODE BEGIN IOCTL */
|
||
DRESULT res = SD_disk_ioctl (pdrv, cmd, buff);
|
||
8002398: 79b9 ldrb r1, [r7, #6]
|
||
800239a: 79fb ldrb r3, [r7, #7]
|
||
800239c: 683a ldr r2, [r7, #0]
|
||
800239e: 4618 mov r0, r3
|
||
80023a0: f002 fdd2 bl 8004f48 <SD_disk_ioctl>
|
||
80023a4: 4603 mov r3, r0
|
||
80023a6: 73fb strb r3, [r7, #15]
|
||
return res;
|
||
80023a8: 7bfb ldrb r3, [r7, #15]
|
||
/* USER CODE END IOCTL */
|
||
}
|
||
80023aa: 4618 mov r0, r3
|
||
80023ac: 3710 adds r7, #16
|
||
80023ae: 46bd mov sp, r7
|
||
80023b0: bd80 pop {r7, pc}
|
||
...
|
||
|
||
080023b4 <disk_status>:
|
||
* @retval DSTATUS: Operation status
|
||
*/
|
||
DSTATUS disk_status (
|
||
BYTE pdrv /* Physical drive nmuber to identify the drive */
|
||
)
|
||
{
|
||
80023b4: b580 push {r7, lr}
|
||
80023b6: b084 sub sp, #16
|
||
80023b8: af00 add r7, sp, #0
|
||
80023ba: 4603 mov r3, r0
|
||
80023bc: 71fb strb r3, [r7, #7]
|
||
DSTATUS stat;
|
||
|
||
stat = disk.drv[pdrv]->disk_status(disk.lun[pdrv]);
|
||
80023be: 79fb ldrb r3, [r7, #7]
|
||
80023c0: 4a08 ldr r2, [pc, #32] ; (80023e4 <disk_status+0x30>)
|
||
80023c2: 009b lsls r3, r3, #2
|
||
80023c4: 4413 add r3, r2
|
||
80023c6: 685b ldr r3, [r3, #4]
|
||
80023c8: 685b ldr r3, [r3, #4]
|
||
80023ca: 79fa ldrb r2, [r7, #7]
|
||
80023cc: 4905 ldr r1, [pc, #20] ; (80023e4 <disk_status+0x30>)
|
||
80023ce: 440a add r2, r1
|
||
80023d0: 7a12 ldrb r2, [r2, #8]
|
||
80023d2: 4610 mov r0, r2
|
||
80023d4: 4798 blx r3
|
||
80023d6: 4603 mov r3, r0
|
||
80023d8: 73fb strb r3, [r7, #15]
|
||
return stat;
|
||
80023da: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
80023dc: 4618 mov r0, r3
|
||
80023de: 3710 adds r7, #16
|
||
80023e0: 46bd mov sp, r7
|
||
80023e2: bd80 pop {r7, pc}
|
||
80023e4: 20000064 .word 0x20000064
|
||
|
||
080023e8 <disk_initialize>:
|
||
* @retval DSTATUS: Operation status
|
||
*/
|
||
DSTATUS disk_initialize (
|
||
BYTE pdrv /* Physical drive nmuber to identify the drive */
|
||
)
|
||
{
|
||
80023e8: b580 push {r7, lr}
|
||
80023ea: b084 sub sp, #16
|
||
80023ec: af00 add r7, sp, #0
|
||
80023ee: 4603 mov r3, r0
|
||
80023f0: 71fb strb r3, [r7, #7]
|
||
DSTATUS stat = RES_OK;
|
||
80023f2: 2300 movs r3, #0
|
||
80023f4: 73fb strb r3, [r7, #15]
|
||
|
||
if(disk.is_initialized[pdrv] == 0)
|
||
80023f6: 79fb ldrb r3, [r7, #7]
|
||
80023f8: 4a0d ldr r2, [pc, #52] ; (8002430 <disk_initialize+0x48>)
|
||
80023fa: 5cd3 ldrb r3, [r2, r3]
|
||
80023fc: 2b00 cmp r3, #0
|
||
80023fe: d111 bne.n 8002424 <disk_initialize+0x3c>
|
||
{
|
||
disk.is_initialized[pdrv] = 1;
|
||
8002400: 79fb ldrb r3, [r7, #7]
|
||
8002402: 4a0b ldr r2, [pc, #44] ; (8002430 <disk_initialize+0x48>)
|
||
8002404: 2101 movs r1, #1
|
||
8002406: 54d1 strb r1, [r2, r3]
|
||
stat = disk.drv[pdrv]->disk_initialize(disk.lun[pdrv]);
|
||
8002408: 79fb ldrb r3, [r7, #7]
|
||
800240a: 4a09 ldr r2, [pc, #36] ; (8002430 <disk_initialize+0x48>)
|
||
800240c: 009b lsls r3, r3, #2
|
||
800240e: 4413 add r3, r2
|
||
8002410: 685b ldr r3, [r3, #4]
|
||
8002412: 681b ldr r3, [r3, #0]
|
||
8002414: 79fa ldrb r2, [r7, #7]
|
||
8002416: 4906 ldr r1, [pc, #24] ; (8002430 <disk_initialize+0x48>)
|
||
8002418: 440a add r2, r1
|
||
800241a: 7a12 ldrb r2, [r2, #8]
|
||
800241c: 4610 mov r0, r2
|
||
800241e: 4798 blx r3
|
||
8002420: 4603 mov r3, r0
|
||
8002422: 73fb strb r3, [r7, #15]
|
||
}
|
||
return stat;
|
||
8002424: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8002426: 4618 mov r0, r3
|
||
8002428: 3710 adds r7, #16
|
||
800242a: 46bd mov sp, r7
|
||
800242c: bd80 pop {r7, pc}
|
||
800242e: bf00 nop
|
||
8002430: 20000064 .word 0x20000064
|
||
|
||
08002434 <disk_read>:
|
||
BYTE pdrv, /* Physical drive nmuber to identify the drive */
|
||
BYTE *buff, /* Data buffer to store read data */
|
||
DWORD sector, /* Sector address in LBA */
|
||
UINT count /* Number of sectors to read */
|
||
)
|
||
{
|
||
8002434: b590 push {r4, r7, lr}
|
||
8002436: b087 sub sp, #28
|
||
8002438: af00 add r7, sp, #0
|
||
800243a: 60b9 str r1, [r7, #8]
|
||
800243c: 607a str r2, [r7, #4]
|
||
800243e: 603b str r3, [r7, #0]
|
||
8002440: 4603 mov r3, r0
|
||
8002442: 73fb strb r3, [r7, #15]
|
||
DRESULT res;
|
||
|
||
res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count);
|
||
8002444: 7bfb ldrb r3, [r7, #15]
|
||
8002446: 4a0a ldr r2, [pc, #40] ; (8002470 <disk_read+0x3c>)
|
||
8002448: 009b lsls r3, r3, #2
|
||
800244a: 4413 add r3, r2
|
||
800244c: 685b ldr r3, [r3, #4]
|
||
800244e: 689c ldr r4, [r3, #8]
|
||
8002450: 7bfb ldrb r3, [r7, #15]
|
||
8002452: 4a07 ldr r2, [pc, #28] ; (8002470 <disk_read+0x3c>)
|
||
8002454: 4413 add r3, r2
|
||
8002456: 7a18 ldrb r0, [r3, #8]
|
||
8002458: 683b ldr r3, [r7, #0]
|
||
800245a: 687a ldr r2, [r7, #4]
|
||
800245c: 68b9 ldr r1, [r7, #8]
|
||
800245e: 47a0 blx r4
|
||
8002460: 4603 mov r3, r0
|
||
8002462: 75fb strb r3, [r7, #23]
|
||
return res;
|
||
8002464: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
8002466: 4618 mov r0, r3
|
||
8002468: 371c adds r7, #28
|
||
800246a: 46bd mov sp, r7
|
||
800246c: bd90 pop {r4, r7, pc}
|
||
800246e: bf00 nop
|
||
8002470: 20000064 .word 0x20000064
|
||
|
||
08002474 <disk_write>:
|
||
BYTE pdrv, /* Physical drive nmuber to identify the drive */
|
||
const BYTE *buff, /* Data to be written */
|
||
DWORD sector, /* Sector address in LBA */
|
||
UINT count /* Number of sectors to write */
|
||
)
|
||
{
|
||
8002474: b590 push {r4, r7, lr}
|
||
8002476: b087 sub sp, #28
|
||
8002478: af00 add r7, sp, #0
|
||
800247a: 60b9 str r1, [r7, #8]
|
||
800247c: 607a str r2, [r7, #4]
|
||
800247e: 603b str r3, [r7, #0]
|
||
8002480: 4603 mov r3, r0
|
||
8002482: 73fb strb r3, [r7, #15]
|
||
DRESULT res;
|
||
|
||
res = disk.drv[pdrv]->disk_write(disk.lun[pdrv], buff, sector, count);
|
||
8002484: 7bfb ldrb r3, [r7, #15]
|
||
8002486: 4a0a ldr r2, [pc, #40] ; (80024b0 <disk_write+0x3c>)
|
||
8002488: 009b lsls r3, r3, #2
|
||
800248a: 4413 add r3, r2
|
||
800248c: 685b ldr r3, [r3, #4]
|
||
800248e: 68dc ldr r4, [r3, #12]
|
||
8002490: 7bfb ldrb r3, [r7, #15]
|
||
8002492: 4a07 ldr r2, [pc, #28] ; (80024b0 <disk_write+0x3c>)
|
||
8002494: 4413 add r3, r2
|
||
8002496: 7a18 ldrb r0, [r3, #8]
|
||
8002498: 683b ldr r3, [r7, #0]
|
||
800249a: 687a ldr r2, [r7, #4]
|
||
800249c: 68b9 ldr r1, [r7, #8]
|
||
800249e: 47a0 blx r4
|
||
80024a0: 4603 mov r3, r0
|
||
80024a2: 75fb strb r3, [r7, #23]
|
||
return res;
|
||
80024a4: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
80024a6: 4618 mov r0, r3
|
||
80024a8: 371c adds r7, #28
|
||
80024aa: 46bd mov sp, r7
|
||
80024ac: bd90 pop {r4, r7, pc}
|
||
80024ae: bf00 nop
|
||
80024b0: 20000064 .word 0x20000064
|
||
|
||
080024b4 <mem_cpy>:
|
||
/* String functions */
|
||
/*-----------------------------------------------------------------------*/
|
||
|
||
/* Copy memory to memory */
|
||
static
|
||
void mem_cpy (void* dst, const void* src, UINT cnt) {
|
||
80024b4: b480 push {r7}
|
||
80024b6: b087 sub sp, #28
|
||
80024b8: af00 add r7, sp, #0
|
||
80024ba: 60f8 str r0, [r7, #12]
|
||
80024bc: 60b9 str r1, [r7, #8]
|
||
80024be: 607a str r2, [r7, #4]
|
||
BYTE *d = (BYTE*)dst;
|
||
80024c0: 68fb ldr r3, [r7, #12]
|
||
80024c2: 617b str r3, [r7, #20]
|
||
const BYTE *s = (const BYTE*)src;
|
||
80024c4: 68bb ldr r3, [r7, #8]
|
||
80024c6: 613b str r3, [r7, #16]
|
||
*(int*)d = *(int*)s;
|
||
d += sizeof (int); s += sizeof (int);
|
||
cnt -= sizeof (int);
|
||
}
|
||
#endif
|
||
while (cnt--)
|
||
80024c8: e007 b.n 80024da <mem_cpy+0x26>
|
||
*d++ = *s++;
|
||
80024ca: 693a ldr r2, [r7, #16]
|
||
80024cc: 1c53 adds r3, r2, #1
|
||
80024ce: 613b str r3, [r7, #16]
|
||
80024d0: 697b ldr r3, [r7, #20]
|
||
80024d2: 1c59 adds r1, r3, #1
|
||
80024d4: 6179 str r1, [r7, #20]
|
||
80024d6: 7812 ldrb r2, [r2, #0]
|
||
80024d8: 701a strb r2, [r3, #0]
|
||
while (cnt--)
|
||
80024da: 687b ldr r3, [r7, #4]
|
||
80024dc: 1e5a subs r2, r3, #1
|
||
80024de: 607a str r2, [r7, #4]
|
||
80024e0: 2b00 cmp r3, #0
|
||
80024e2: d1f2 bne.n 80024ca <mem_cpy+0x16>
|
||
}
|
||
80024e4: bf00 nop
|
||
80024e6: bf00 nop
|
||
80024e8: 371c adds r7, #28
|
||
80024ea: 46bd mov sp, r7
|
||
80024ec: bc80 pop {r7}
|
||
80024ee: 4770 bx lr
|
||
|
||
080024f0 <mem_set>:
|
||
|
||
/* Fill memory */
|
||
static
|
||
void mem_set (void* dst, int val, UINT cnt) {
|
||
80024f0: b480 push {r7}
|
||
80024f2: b087 sub sp, #28
|
||
80024f4: af00 add r7, sp, #0
|
||
80024f6: 60f8 str r0, [r7, #12]
|
||
80024f8: 60b9 str r1, [r7, #8]
|
||
80024fa: 607a str r2, [r7, #4]
|
||
BYTE *d = (BYTE*)dst;
|
||
80024fc: 68fb ldr r3, [r7, #12]
|
||
80024fe: 617b str r3, [r7, #20]
|
||
|
||
while (cnt--)
|
||
8002500: e005 b.n 800250e <mem_set+0x1e>
|
||
*d++ = (BYTE)val;
|
||
8002502: 697b ldr r3, [r7, #20]
|
||
8002504: 1c5a adds r2, r3, #1
|
||
8002506: 617a str r2, [r7, #20]
|
||
8002508: 68ba ldr r2, [r7, #8]
|
||
800250a: b2d2 uxtb r2, r2
|
||
800250c: 701a strb r2, [r3, #0]
|
||
while (cnt--)
|
||
800250e: 687b ldr r3, [r7, #4]
|
||
8002510: 1e5a subs r2, r3, #1
|
||
8002512: 607a str r2, [r7, #4]
|
||
8002514: 2b00 cmp r3, #0
|
||
8002516: d1f4 bne.n 8002502 <mem_set+0x12>
|
||
}
|
||
8002518: bf00 nop
|
||
800251a: bf00 nop
|
||
800251c: 371c adds r7, #28
|
||
800251e: 46bd mov sp, r7
|
||
8002520: bc80 pop {r7}
|
||
8002522: 4770 bx lr
|
||
|
||
08002524 <mem_cmp>:
|
||
|
||
/* Compare memory to memory */
|
||
static
|
||
int mem_cmp (const void* dst, const void* src, UINT cnt) {
|
||
8002524: b480 push {r7}
|
||
8002526: b089 sub sp, #36 ; 0x24
|
||
8002528: af00 add r7, sp, #0
|
||
800252a: 60f8 str r0, [r7, #12]
|
||
800252c: 60b9 str r1, [r7, #8]
|
||
800252e: 607a str r2, [r7, #4]
|
||
const BYTE *d = (const BYTE *)dst, *s = (const BYTE *)src;
|
||
8002530: 68fb ldr r3, [r7, #12]
|
||
8002532: 61fb str r3, [r7, #28]
|
||
8002534: 68bb ldr r3, [r7, #8]
|
||
8002536: 61bb str r3, [r7, #24]
|
||
int r = 0;
|
||
8002538: 2300 movs r3, #0
|
||
800253a: 617b str r3, [r7, #20]
|
||
|
||
while (cnt-- && (r = *d++ - *s++) == 0) ;
|
||
800253c: bf00 nop
|
||
800253e: 687b ldr r3, [r7, #4]
|
||
8002540: 1e5a subs r2, r3, #1
|
||
8002542: 607a str r2, [r7, #4]
|
||
8002544: 2b00 cmp r3, #0
|
||
8002546: d00d beq.n 8002564 <mem_cmp+0x40>
|
||
8002548: 69fb ldr r3, [r7, #28]
|
||
800254a: 1c5a adds r2, r3, #1
|
||
800254c: 61fa str r2, [r7, #28]
|
||
800254e: 781b ldrb r3, [r3, #0]
|
||
8002550: 4619 mov r1, r3
|
||
8002552: 69bb ldr r3, [r7, #24]
|
||
8002554: 1c5a adds r2, r3, #1
|
||
8002556: 61ba str r2, [r7, #24]
|
||
8002558: 781b ldrb r3, [r3, #0]
|
||
800255a: 1acb subs r3, r1, r3
|
||
800255c: 617b str r3, [r7, #20]
|
||
800255e: 697b ldr r3, [r7, #20]
|
||
8002560: 2b00 cmp r3, #0
|
||
8002562: d0ec beq.n 800253e <mem_cmp+0x1a>
|
||
return r;
|
||
8002564: 697b ldr r3, [r7, #20]
|
||
}
|
||
8002566: 4618 mov r0, r3
|
||
8002568: 3724 adds r7, #36 ; 0x24
|
||
800256a: 46bd mov sp, r7
|
||
800256c: bc80 pop {r7}
|
||
800256e: 4770 bx lr
|
||
|
||
08002570 <chk_chr>:
|
||
|
||
/* Check if chr is contained in the string */
|
||
static
|
||
int chk_chr (const char* str, int chr) {
|
||
8002570: b480 push {r7}
|
||
8002572: b083 sub sp, #12
|
||
8002574: af00 add r7, sp, #0
|
||
8002576: 6078 str r0, [r7, #4]
|
||
8002578: 6039 str r1, [r7, #0]
|
||
while (*str && *str != chr) str++;
|
||
800257a: e002 b.n 8002582 <chk_chr+0x12>
|
||
800257c: 687b ldr r3, [r7, #4]
|
||
800257e: 3301 adds r3, #1
|
||
8002580: 607b str r3, [r7, #4]
|
||
8002582: 687b ldr r3, [r7, #4]
|
||
8002584: 781b ldrb r3, [r3, #0]
|
||
8002586: 2b00 cmp r3, #0
|
||
8002588: d005 beq.n 8002596 <chk_chr+0x26>
|
||
800258a: 687b ldr r3, [r7, #4]
|
||
800258c: 781b ldrb r3, [r3, #0]
|
||
800258e: 461a mov r2, r3
|
||
8002590: 683b ldr r3, [r7, #0]
|
||
8002592: 4293 cmp r3, r2
|
||
8002594: d1f2 bne.n 800257c <chk_chr+0xc>
|
||
return *str;
|
||
8002596: 687b ldr r3, [r7, #4]
|
||
8002598: 781b ldrb r3, [r3, #0]
|
||
}
|
||
800259a: 4618 mov r0, r3
|
||
800259c: 370c adds r7, #12
|
||
800259e: 46bd mov sp, r7
|
||
80025a0: bc80 pop {r7}
|
||
80025a2: 4770 bx lr
|
||
|
||
080025a4 <chk_lock>:
|
||
static
|
||
FRESULT chk_lock ( /* Check if the file can be accessed */
|
||
DIR* dp, /* Directory object pointing the file to be checked */
|
||
int acc /* Desired access type (0:Read, 1:Write, 2:Delete/Rename) */
|
||
)
|
||
{
|
||
80025a4: b480 push {r7}
|
||
80025a6: b085 sub sp, #20
|
||
80025a8: af00 add r7, sp, #0
|
||
80025aa: 6078 str r0, [r7, #4]
|
||
80025ac: 6039 str r1, [r7, #0]
|
||
UINT i, be;
|
||
|
||
/* Search file semaphore table */
|
||
for (i = be = 0; i < _FS_LOCK; i++) {
|
||
80025ae: 2300 movs r3, #0
|
||
80025b0: 60bb str r3, [r7, #8]
|
||
80025b2: 68bb ldr r3, [r7, #8]
|
||
80025b4: 60fb str r3, [r7, #12]
|
||
80025b6: e038 b.n 800262a <chk_lock+0x86>
|
||
if (Files[i].fs) { /* Existing entry */
|
||
80025b8: 492f ldr r1, [pc, #188] ; (8002678 <chk_lock+0xd4>)
|
||
80025ba: 68fa ldr r2, [r7, #12]
|
||
80025bc: 4613 mov r3, r2
|
||
80025be: 005b lsls r3, r3, #1
|
||
80025c0: 4413 add r3, r2
|
||
80025c2: 009b lsls r3, r3, #2
|
||
80025c4: 440b add r3, r1
|
||
80025c6: 681b ldr r3, [r3, #0]
|
||
80025c8: 2b00 cmp r3, #0
|
||
80025ca: d029 beq.n 8002620 <chk_lock+0x7c>
|
||
if (Files[i].fs == dp->fs && /* Check if the object matched with an open object */
|
||
80025cc: 492a ldr r1, [pc, #168] ; (8002678 <chk_lock+0xd4>)
|
||
80025ce: 68fa ldr r2, [r7, #12]
|
||
80025d0: 4613 mov r3, r2
|
||
80025d2: 005b lsls r3, r3, #1
|
||
80025d4: 4413 add r3, r2
|
||
80025d6: 009b lsls r3, r3, #2
|
||
80025d8: 440b add r3, r1
|
||
80025da: 681a ldr r2, [r3, #0]
|
||
80025dc: 687b ldr r3, [r7, #4]
|
||
80025de: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80025e2: 429a cmp r2, r3
|
||
80025e4: d11e bne.n 8002624 <chk_lock+0x80>
|
||
Files[i].clu == dp->sclust &&
|
||
80025e6: 4924 ldr r1, [pc, #144] ; (8002678 <chk_lock+0xd4>)
|
||
80025e8: 68fa ldr r2, [r7, #12]
|
||
80025ea: 4613 mov r3, r2
|
||
80025ec: 005b lsls r3, r3, #1
|
||
80025ee: 4413 add r3, r2
|
||
80025f0: 009b lsls r3, r3, #2
|
||
80025f2: 440b add r3, r1
|
||
80025f4: 3304 adds r3, #4
|
||
80025f6: 681a ldr r2, [r3, #0]
|
||
80025f8: 687b ldr r3, [r7, #4]
|
||
80025fa: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
if (Files[i].fs == dp->fs && /* Check if the object matched with an open object */
|
||
80025fe: 429a cmp r2, r3
|
||
8002600: d110 bne.n 8002624 <chk_lock+0x80>
|
||
Files[i].idx == dp->index) break;
|
||
8002602: 491d ldr r1, [pc, #116] ; (8002678 <chk_lock+0xd4>)
|
||
8002604: 68fa ldr r2, [r7, #12]
|
||
8002606: 4613 mov r3, r2
|
||
8002608: 005b lsls r3, r3, #1
|
||
800260a: 4413 add r3, r2
|
||
800260c: 009b lsls r3, r3, #2
|
||
800260e: 440b add r3, r1
|
||
8002610: 3308 adds r3, #8
|
||
8002612: 881a ldrh r2, [r3, #0]
|
||
8002614: 687b ldr r3, [r7, #4]
|
||
8002616: f8b3 3206 ldrh.w r3, [r3, #518] ; 0x206
|
||
Files[i].clu == dp->sclust &&
|
||
800261a: 429a cmp r2, r3
|
||
800261c: d102 bne.n 8002624 <chk_lock+0x80>
|
||
Files[i].idx == dp->index) break;
|
||
800261e: e007 b.n 8002630 <chk_lock+0x8c>
|
||
} else { /* Blank entry */
|
||
be = 1;
|
||
8002620: 2301 movs r3, #1
|
||
8002622: 60bb str r3, [r7, #8]
|
||
for (i = be = 0; i < _FS_LOCK; i++) {
|
||
8002624: 68fb ldr r3, [r7, #12]
|
||
8002626: 3301 adds r3, #1
|
||
8002628: 60fb str r3, [r7, #12]
|
||
800262a: 68fb ldr r3, [r7, #12]
|
||
800262c: 2b01 cmp r3, #1
|
||
800262e: d9c3 bls.n 80025b8 <chk_lock+0x14>
|
||
}
|
||
}
|
||
if (i == _FS_LOCK) /* The object is not opened */
|
||
8002630: 68fb ldr r3, [r7, #12]
|
||
8002632: 2b02 cmp r3, #2
|
||
8002634: d109 bne.n 800264a <chk_lock+0xa6>
|
||
return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new object? */
|
||
8002636: 68bb ldr r3, [r7, #8]
|
||
8002638: 2b00 cmp r3, #0
|
||
800263a: d102 bne.n 8002642 <chk_lock+0x9e>
|
||
800263c: 683b ldr r3, [r7, #0]
|
||
800263e: 2b02 cmp r3, #2
|
||
8002640: d101 bne.n 8002646 <chk_lock+0xa2>
|
||
8002642: 2300 movs r3, #0
|
||
8002644: e013 b.n 800266e <chk_lock+0xca>
|
||
8002646: 2312 movs r3, #18
|
||
8002648: e011 b.n 800266e <chk_lock+0xca>
|
||
|
||
/* The object has been opened. Reject any open against writing file and all write mode open */
|
||
return (acc || Files[i].ctr == 0x100) ? FR_LOCKED : FR_OK;
|
||
800264a: 683b ldr r3, [r7, #0]
|
||
800264c: 2b00 cmp r3, #0
|
||
800264e: d10b bne.n 8002668 <chk_lock+0xc4>
|
||
8002650: 4909 ldr r1, [pc, #36] ; (8002678 <chk_lock+0xd4>)
|
||
8002652: 68fa ldr r2, [r7, #12]
|
||
8002654: 4613 mov r3, r2
|
||
8002656: 005b lsls r3, r3, #1
|
||
8002658: 4413 add r3, r2
|
||
800265a: 009b lsls r3, r3, #2
|
||
800265c: 440b add r3, r1
|
||
800265e: 330a adds r3, #10
|
||
8002660: 881b ldrh r3, [r3, #0]
|
||
8002662: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
8002666: d101 bne.n 800266c <chk_lock+0xc8>
|
||
8002668: 2310 movs r3, #16
|
||
800266a: e000 b.n 800266e <chk_lock+0xca>
|
||
800266c: 2300 movs r3, #0
|
||
}
|
||
800266e: 4618 mov r0, r3
|
||
8002670: 3714 adds r7, #20
|
||
8002672: 46bd mov sp, r7
|
||
8002674: bc80 pop {r7}
|
||
8002676: 4770 bx lr
|
||
8002678: 2000004c .word 0x2000004c
|
||
|
||
0800267c <enq_lock>:
|
||
|
||
|
||
static
|
||
int enq_lock (void) /* Check if an entry is available for a new object */
|
||
{
|
||
800267c: b480 push {r7}
|
||
800267e: b083 sub sp, #12
|
||
8002680: af00 add r7, sp, #0
|
||
UINT i;
|
||
|
||
for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
|
||
8002682: 2300 movs r3, #0
|
||
8002684: 607b str r3, [r7, #4]
|
||
8002686: e002 b.n 800268e <enq_lock+0x12>
|
||
8002688: 687b ldr r3, [r7, #4]
|
||
800268a: 3301 adds r3, #1
|
||
800268c: 607b str r3, [r7, #4]
|
||
800268e: 687b ldr r3, [r7, #4]
|
||
8002690: 2b01 cmp r3, #1
|
||
8002692: d809 bhi.n 80026a8 <enq_lock+0x2c>
|
||
8002694: 490a ldr r1, [pc, #40] ; (80026c0 <enq_lock+0x44>)
|
||
8002696: 687a ldr r2, [r7, #4]
|
||
8002698: 4613 mov r3, r2
|
||
800269a: 005b lsls r3, r3, #1
|
||
800269c: 4413 add r3, r2
|
||
800269e: 009b lsls r3, r3, #2
|
||
80026a0: 440b add r3, r1
|
||
80026a2: 681b ldr r3, [r3, #0]
|
||
80026a4: 2b00 cmp r3, #0
|
||
80026a6: d1ef bne.n 8002688 <enq_lock+0xc>
|
||
return (i == _FS_LOCK) ? 0 : 1;
|
||
80026a8: 687b ldr r3, [r7, #4]
|
||
80026aa: 2b02 cmp r3, #2
|
||
80026ac: bf14 ite ne
|
||
80026ae: 2301 movne r3, #1
|
||
80026b0: 2300 moveq r3, #0
|
||
80026b2: b2db uxtb r3, r3
|
||
}
|
||
80026b4: 4618 mov r0, r3
|
||
80026b6: 370c adds r7, #12
|
||
80026b8: 46bd mov sp, r7
|
||
80026ba: bc80 pop {r7}
|
||
80026bc: 4770 bx lr
|
||
80026be: bf00 nop
|
||
80026c0: 2000004c .word 0x2000004c
|
||
|
||
080026c4 <inc_lock>:
|
||
static
|
||
UINT inc_lock ( /* Increment object open counter and returns its index (0:Internal error) */
|
||
DIR* dp, /* Directory object pointing the file to register or increment */
|
||
int acc /* Desired access (0:Read, 1:Write, 2:Delete/Rename) */
|
||
)
|
||
{
|
||
80026c4: b480 push {r7}
|
||
80026c6: b085 sub sp, #20
|
||
80026c8: af00 add r7, sp, #0
|
||
80026ca: 6078 str r0, [r7, #4]
|
||
80026cc: 6039 str r1, [r7, #0]
|
||
UINT i;
|
||
|
||
|
||
for (i = 0; i < _FS_LOCK; i++) { /* Find the object */
|
||
80026ce: 2300 movs r3, #0
|
||
80026d0: 60fb str r3, [r7, #12]
|
||
80026d2: e02b b.n 800272c <inc_lock+0x68>
|
||
if (Files[i].fs == dp->fs &&
|
||
80026d4: 4955 ldr r1, [pc, #340] ; (800282c <inc_lock+0x168>)
|
||
80026d6: 68fa ldr r2, [r7, #12]
|
||
80026d8: 4613 mov r3, r2
|
||
80026da: 005b lsls r3, r3, #1
|
||
80026dc: 4413 add r3, r2
|
||
80026de: 009b lsls r3, r3, #2
|
||
80026e0: 440b add r3, r1
|
||
80026e2: 681a ldr r2, [r3, #0]
|
||
80026e4: 687b ldr r3, [r7, #4]
|
||
80026e6: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80026ea: 429a cmp r2, r3
|
||
80026ec: d11b bne.n 8002726 <inc_lock+0x62>
|
||
Files[i].clu == dp->sclust &&
|
||
80026ee: 494f ldr r1, [pc, #316] ; (800282c <inc_lock+0x168>)
|
||
80026f0: 68fa ldr r2, [r7, #12]
|
||
80026f2: 4613 mov r3, r2
|
||
80026f4: 005b lsls r3, r3, #1
|
||
80026f6: 4413 add r3, r2
|
||
80026f8: 009b lsls r3, r3, #2
|
||
80026fa: 440b add r3, r1
|
||
80026fc: 3304 adds r3, #4
|
||
80026fe: 681a ldr r2, [r3, #0]
|
||
8002700: 687b ldr r3, [r7, #4]
|
||
8002702: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
if (Files[i].fs == dp->fs &&
|
||
8002706: 429a cmp r2, r3
|
||
8002708: d10d bne.n 8002726 <inc_lock+0x62>
|
||
Files[i].idx == dp->index) break;
|
||
800270a: 4948 ldr r1, [pc, #288] ; (800282c <inc_lock+0x168>)
|
||
800270c: 68fa ldr r2, [r7, #12]
|
||
800270e: 4613 mov r3, r2
|
||
8002710: 005b lsls r3, r3, #1
|
||
8002712: 4413 add r3, r2
|
||
8002714: 009b lsls r3, r3, #2
|
||
8002716: 440b add r3, r1
|
||
8002718: 3308 adds r3, #8
|
||
800271a: 881a ldrh r2, [r3, #0]
|
||
800271c: 687b ldr r3, [r7, #4]
|
||
800271e: f8b3 3206 ldrh.w r3, [r3, #518] ; 0x206
|
||
Files[i].clu == dp->sclust &&
|
||
8002722: 429a cmp r2, r3
|
||
8002724: d006 beq.n 8002734 <inc_lock+0x70>
|
||
for (i = 0; i < _FS_LOCK; i++) { /* Find the object */
|
||
8002726: 68fb ldr r3, [r7, #12]
|
||
8002728: 3301 adds r3, #1
|
||
800272a: 60fb str r3, [r7, #12]
|
||
800272c: 68fb ldr r3, [r7, #12]
|
||
800272e: 2b01 cmp r3, #1
|
||
8002730: d9d0 bls.n 80026d4 <inc_lock+0x10>
|
||
8002732: e000 b.n 8002736 <inc_lock+0x72>
|
||
Files[i].idx == dp->index) break;
|
||
8002734: bf00 nop
|
||
}
|
||
|
||
if (i == _FS_LOCK) { /* Not opened. Register it as new. */
|
||
8002736: 68fb ldr r3, [r7, #12]
|
||
8002738: 2b02 cmp r3, #2
|
||
800273a: d145 bne.n 80027c8 <inc_lock+0x104>
|
||
for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
|
||
800273c: 2300 movs r3, #0
|
||
800273e: 60fb str r3, [r7, #12]
|
||
8002740: e002 b.n 8002748 <inc_lock+0x84>
|
||
8002742: 68fb ldr r3, [r7, #12]
|
||
8002744: 3301 adds r3, #1
|
||
8002746: 60fb str r3, [r7, #12]
|
||
8002748: 68fb ldr r3, [r7, #12]
|
||
800274a: 2b01 cmp r3, #1
|
||
800274c: d809 bhi.n 8002762 <inc_lock+0x9e>
|
||
800274e: 4937 ldr r1, [pc, #220] ; (800282c <inc_lock+0x168>)
|
||
8002750: 68fa ldr r2, [r7, #12]
|
||
8002752: 4613 mov r3, r2
|
||
8002754: 005b lsls r3, r3, #1
|
||
8002756: 4413 add r3, r2
|
||
8002758: 009b lsls r3, r3, #2
|
||
800275a: 440b add r3, r1
|
||
800275c: 681b ldr r3, [r3, #0]
|
||
800275e: 2b00 cmp r3, #0
|
||
8002760: d1ef bne.n 8002742 <inc_lock+0x7e>
|
||
if (i == _FS_LOCK) return 0; /* No free entry to register (int err) */
|
||
8002762: 68fb ldr r3, [r7, #12]
|
||
8002764: 2b02 cmp r3, #2
|
||
8002766: d101 bne.n 800276c <inc_lock+0xa8>
|
||
8002768: 2300 movs r3, #0
|
||
800276a: e05a b.n 8002822 <inc_lock+0x15e>
|
||
Files[i].fs = dp->fs;
|
||
800276c: 687b ldr r3, [r7, #4]
|
||
800276e: f8d3 1200 ldr.w r1, [r3, #512] ; 0x200
|
||
8002772: 482e ldr r0, [pc, #184] ; (800282c <inc_lock+0x168>)
|
||
8002774: 68fa ldr r2, [r7, #12]
|
||
8002776: 4613 mov r3, r2
|
||
8002778: 005b lsls r3, r3, #1
|
||
800277a: 4413 add r3, r2
|
||
800277c: 009b lsls r3, r3, #2
|
||
800277e: 4403 add r3, r0
|
||
8002780: 6019 str r1, [r3, #0]
|
||
Files[i].clu = dp->sclust;
|
||
8002782: 687b ldr r3, [r7, #4]
|
||
8002784: f8d3 1208 ldr.w r1, [r3, #520] ; 0x208
|
||
8002788: 4828 ldr r0, [pc, #160] ; (800282c <inc_lock+0x168>)
|
||
800278a: 68fa ldr r2, [r7, #12]
|
||
800278c: 4613 mov r3, r2
|
||
800278e: 005b lsls r3, r3, #1
|
||
8002790: 4413 add r3, r2
|
||
8002792: 009b lsls r3, r3, #2
|
||
8002794: 4403 add r3, r0
|
||
8002796: 3304 adds r3, #4
|
||
8002798: 6019 str r1, [r3, #0]
|
||
Files[i].idx = dp->index;
|
||
800279a: 687b ldr r3, [r7, #4]
|
||
800279c: f8b3 0206 ldrh.w r0, [r3, #518] ; 0x206
|
||
80027a0: 4922 ldr r1, [pc, #136] ; (800282c <inc_lock+0x168>)
|
||
80027a2: 68fa ldr r2, [r7, #12]
|
||
80027a4: 4613 mov r3, r2
|
||
80027a6: 005b lsls r3, r3, #1
|
||
80027a8: 4413 add r3, r2
|
||
80027aa: 009b lsls r3, r3, #2
|
||
80027ac: 440b add r3, r1
|
||
80027ae: 3308 adds r3, #8
|
||
80027b0: 4602 mov r2, r0
|
||
80027b2: 801a strh r2, [r3, #0]
|
||
Files[i].ctr = 0;
|
||
80027b4: 491d ldr r1, [pc, #116] ; (800282c <inc_lock+0x168>)
|
||
80027b6: 68fa ldr r2, [r7, #12]
|
||
80027b8: 4613 mov r3, r2
|
||
80027ba: 005b lsls r3, r3, #1
|
||
80027bc: 4413 add r3, r2
|
||
80027be: 009b lsls r3, r3, #2
|
||
80027c0: 440b add r3, r1
|
||
80027c2: 330a adds r3, #10
|
||
80027c4: 2200 movs r2, #0
|
||
80027c6: 801a strh r2, [r3, #0]
|
||
}
|
||
|
||
if (acc && Files[i].ctr) return 0; /* Access violation (int err) */
|
||
80027c8: 683b ldr r3, [r7, #0]
|
||
80027ca: 2b00 cmp r3, #0
|
||
80027cc: d00c beq.n 80027e8 <inc_lock+0x124>
|
||
80027ce: 4917 ldr r1, [pc, #92] ; (800282c <inc_lock+0x168>)
|
||
80027d0: 68fa ldr r2, [r7, #12]
|
||
80027d2: 4613 mov r3, r2
|
||
80027d4: 005b lsls r3, r3, #1
|
||
80027d6: 4413 add r3, r2
|
||
80027d8: 009b lsls r3, r3, #2
|
||
80027da: 440b add r3, r1
|
||
80027dc: 330a adds r3, #10
|
||
80027de: 881b ldrh r3, [r3, #0]
|
||
80027e0: 2b00 cmp r3, #0
|
||
80027e2: d001 beq.n 80027e8 <inc_lock+0x124>
|
||
80027e4: 2300 movs r3, #0
|
||
80027e6: e01c b.n 8002822 <inc_lock+0x15e>
|
||
|
||
Files[i].ctr = acc ? 0x100 : Files[i].ctr + 1; /* Set semaphore value */
|
||
80027e8: 683b ldr r3, [r7, #0]
|
||
80027ea: 2b00 cmp r3, #0
|
||
80027ec: d10b bne.n 8002806 <inc_lock+0x142>
|
||
80027ee: 490f ldr r1, [pc, #60] ; (800282c <inc_lock+0x168>)
|
||
80027f0: 68fa ldr r2, [r7, #12]
|
||
80027f2: 4613 mov r3, r2
|
||
80027f4: 005b lsls r3, r3, #1
|
||
80027f6: 4413 add r3, r2
|
||
80027f8: 009b lsls r3, r3, #2
|
||
80027fa: 440b add r3, r1
|
||
80027fc: 330a adds r3, #10
|
||
80027fe: 881b ldrh r3, [r3, #0]
|
||
8002800: 3301 adds r3, #1
|
||
8002802: b299 uxth r1, r3
|
||
8002804: e001 b.n 800280a <inc_lock+0x146>
|
||
8002806: f44f 7180 mov.w r1, #256 ; 0x100
|
||
800280a: 4808 ldr r0, [pc, #32] ; (800282c <inc_lock+0x168>)
|
||
800280c: 68fa ldr r2, [r7, #12]
|
||
800280e: 4613 mov r3, r2
|
||
8002810: 005b lsls r3, r3, #1
|
||
8002812: 4413 add r3, r2
|
||
8002814: 009b lsls r3, r3, #2
|
||
8002816: 4403 add r3, r0
|
||
8002818: 330a adds r3, #10
|
||
800281a: 460a mov r2, r1
|
||
800281c: 801a strh r2, [r3, #0]
|
||
|
||
return i + 1;
|
||
800281e: 68fb ldr r3, [r7, #12]
|
||
8002820: 3301 adds r3, #1
|
||
}
|
||
8002822: 4618 mov r0, r3
|
||
8002824: 3714 adds r7, #20
|
||
8002826: 46bd mov sp, r7
|
||
8002828: bc80 pop {r7}
|
||
800282a: 4770 bx lr
|
||
800282c: 2000004c .word 0x2000004c
|
||
|
||
08002830 <clear_lock>:
|
||
|
||
static
|
||
void clear_lock ( /* Clear lock entries of the volume */
|
||
FATFS *fs
|
||
)
|
||
{
|
||
8002830: b480 push {r7}
|
||
8002832: b085 sub sp, #20
|
||
8002834: af00 add r7, sp, #0
|
||
8002836: 6078 str r0, [r7, #4]
|
||
UINT i;
|
||
|
||
for (i = 0; i < _FS_LOCK; i++) {
|
||
8002838: 2300 movs r3, #0
|
||
800283a: 60fb str r3, [r7, #12]
|
||
800283c: e016 b.n 800286c <clear_lock+0x3c>
|
||
if (Files[i].fs == fs) Files[i].fs = 0;
|
||
800283e: 4910 ldr r1, [pc, #64] ; (8002880 <clear_lock+0x50>)
|
||
8002840: 68fa ldr r2, [r7, #12]
|
||
8002842: 4613 mov r3, r2
|
||
8002844: 005b lsls r3, r3, #1
|
||
8002846: 4413 add r3, r2
|
||
8002848: 009b lsls r3, r3, #2
|
||
800284a: 440b add r3, r1
|
||
800284c: 681b ldr r3, [r3, #0]
|
||
800284e: 687a ldr r2, [r7, #4]
|
||
8002850: 429a cmp r2, r3
|
||
8002852: d108 bne.n 8002866 <clear_lock+0x36>
|
||
8002854: 490a ldr r1, [pc, #40] ; (8002880 <clear_lock+0x50>)
|
||
8002856: 68fa ldr r2, [r7, #12]
|
||
8002858: 4613 mov r3, r2
|
||
800285a: 005b lsls r3, r3, #1
|
||
800285c: 4413 add r3, r2
|
||
800285e: 009b lsls r3, r3, #2
|
||
8002860: 440b add r3, r1
|
||
8002862: 2200 movs r2, #0
|
||
8002864: 601a str r2, [r3, #0]
|
||
for (i = 0; i < _FS_LOCK; i++) {
|
||
8002866: 68fb ldr r3, [r7, #12]
|
||
8002868: 3301 adds r3, #1
|
||
800286a: 60fb str r3, [r7, #12]
|
||
800286c: 68fb ldr r3, [r7, #12]
|
||
800286e: 2b01 cmp r3, #1
|
||
8002870: d9e5 bls.n 800283e <clear_lock+0xe>
|
||
}
|
||
}
|
||
8002872: bf00 nop
|
||
8002874: bf00 nop
|
||
8002876: 3714 adds r7, #20
|
||
8002878: 46bd mov sp, r7
|
||
800287a: bc80 pop {r7}
|
||
800287c: 4770 bx lr
|
||
800287e: bf00 nop
|
||
8002880: 2000004c .word 0x2000004c
|
||
|
||
08002884 <sync_window>:
|
||
#if !_FS_READONLY
|
||
static
|
||
FRESULT sync_window (
|
||
FATFS* fs /* File system object */
|
||
)
|
||
{
|
||
8002884: b580 push {r7, lr}
|
||
8002886: b086 sub sp, #24
|
||
8002888: af00 add r7, sp, #0
|
||
800288a: 6078 str r0, [r7, #4]
|
||
DWORD wsect;
|
||
UINT nf;
|
||
FRESULT res = FR_OK;
|
||
800288c: 2300 movs r3, #0
|
||
800288e: 73fb strb r3, [r7, #15]
|
||
|
||
|
||
if (fs->wflag) { /* Write back the sector if it is dirty */
|
||
8002890: 687b ldr r3, [r7, #4]
|
||
8002892: f893 3204 ldrb.w r3, [r3, #516] ; 0x204
|
||
8002896: 2b00 cmp r3, #0
|
||
8002898: d038 beq.n 800290c <sync_window+0x88>
|
||
wsect = fs->winsect; /* Current sector number */
|
||
800289a: 687b ldr r3, [r7, #4]
|
||
800289c: f8d3 322c ldr.w r3, [r3, #556] ; 0x22c
|
||
80028a0: 617b str r3, [r7, #20]
|
||
if (disk_write(fs->drv, fs->win.d8, wsect, 1) != RES_OK) {
|
||
80028a2: 687b ldr r3, [r7, #4]
|
||
80028a4: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
80028a8: 6879 ldr r1, [r7, #4]
|
||
80028aa: 2301 movs r3, #1
|
||
80028ac: 697a ldr r2, [r7, #20]
|
||
80028ae: f7ff fde1 bl 8002474 <disk_write>
|
||
80028b2: 4603 mov r3, r0
|
||
80028b4: 2b00 cmp r3, #0
|
||
80028b6: d002 beq.n 80028be <sync_window+0x3a>
|
||
res = FR_DISK_ERR;
|
||
80028b8: 2301 movs r3, #1
|
||
80028ba: 73fb strb r3, [r7, #15]
|
||
80028bc: e026 b.n 800290c <sync_window+0x88>
|
||
} else {
|
||
fs->wflag = 0;
|
||
80028be: 687b ldr r3, [r7, #4]
|
||
80028c0: 2200 movs r2, #0
|
||
80028c2: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
if (wsect - fs->fatbase < fs->fsize) { /* Is it in the FAT area? */
|
||
80028c6: 687b ldr r3, [r7, #4]
|
||
80028c8: f8d3 3220 ldr.w r3, [r3, #544] ; 0x220
|
||
80028cc: 697a ldr r2, [r7, #20]
|
||
80028ce: 1ad2 subs r2, r2, r3
|
||
80028d0: 687b ldr r3, [r7, #4]
|
||
80028d2: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
80028d6: 429a cmp r2, r3
|
||
80028d8: d218 bcs.n 800290c <sync_window+0x88>
|
||
for (nf = fs->n_fats; nf >= 2; nf--) { /* Reflect the change to all FAT copies */
|
||
80028da: 687b ldr r3, [r7, #4]
|
||
80028dc: f893 3203 ldrb.w r3, [r3, #515] ; 0x203
|
||
80028e0: 613b str r3, [r7, #16]
|
||
80028e2: e010 b.n 8002906 <sync_window+0x82>
|
||
wsect += fs->fsize;
|
||
80028e4: 687b ldr r3, [r7, #4]
|
||
80028e6: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
80028ea: 697a ldr r2, [r7, #20]
|
||
80028ec: 4413 add r3, r2
|
||
80028ee: 617b str r3, [r7, #20]
|
||
disk_write(fs->drv, fs->win.d8, wsect, 1);
|
||
80028f0: 687b ldr r3, [r7, #4]
|
||
80028f2: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
80028f6: 6879 ldr r1, [r7, #4]
|
||
80028f8: 2301 movs r3, #1
|
||
80028fa: 697a ldr r2, [r7, #20]
|
||
80028fc: f7ff fdba bl 8002474 <disk_write>
|
||
for (nf = fs->n_fats; nf >= 2; nf--) { /* Reflect the change to all FAT copies */
|
||
8002900: 693b ldr r3, [r7, #16]
|
||
8002902: 3b01 subs r3, #1
|
||
8002904: 613b str r3, [r7, #16]
|
||
8002906: 693b ldr r3, [r7, #16]
|
||
8002908: 2b01 cmp r3, #1
|
||
800290a: d8eb bhi.n 80028e4 <sync_window+0x60>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
return res;
|
||
800290c: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
800290e: 4618 mov r0, r3
|
||
8002910: 3718 adds r7, #24
|
||
8002912: 46bd mov sp, r7
|
||
8002914: bd80 pop {r7, pc}
|
||
|
||
08002916 <move_window>:
|
||
static
|
||
FRESULT move_window (
|
||
FATFS* fs, /* File system object */
|
||
DWORD sector /* Sector number to make appearance in the fs->win[].d8 */
|
||
)
|
||
{
|
||
8002916: b580 push {r7, lr}
|
||
8002918: b084 sub sp, #16
|
||
800291a: af00 add r7, sp, #0
|
||
800291c: 6078 str r0, [r7, #4]
|
||
800291e: 6039 str r1, [r7, #0]
|
||
FRESULT res = FR_OK;
|
||
8002920: 2300 movs r3, #0
|
||
8002922: 73fb strb r3, [r7, #15]
|
||
|
||
|
||
if (sector != fs->winsect) { /* Window offset changed? */
|
||
8002924: 687b ldr r3, [r7, #4]
|
||
8002926: f8d3 322c ldr.w r3, [r3, #556] ; 0x22c
|
||
800292a: 683a ldr r2, [r7, #0]
|
||
800292c: 429a cmp r2, r3
|
||
800292e: d01b beq.n 8002968 <move_window+0x52>
|
||
#if !_FS_READONLY
|
||
res = sync_window(fs); /* Write-back changes */
|
||
8002930: 6878 ldr r0, [r7, #4]
|
||
8002932: f7ff ffa7 bl 8002884 <sync_window>
|
||
8002936: 4603 mov r3, r0
|
||
8002938: 73fb strb r3, [r7, #15]
|
||
#endif
|
||
if (res == FR_OK) { /* Fill sector window with new data */
|
||
800293a: 7bfb ldrb r3, [r7, #15]
|
||
800293c: 2b00 cmp r3, #0
|
||
800293e: d113 bne.n 8002968 <move_window+0x52>
|
||
if (disk_read(fs->drv, fs->win.d8, sector, 1) != RES_OK) {
|
||
8002940: 687b ldr r3, [r7, #4]
|
||
8002942: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
8002946: 6879 ldr r1, [r7, #4]
|
||
8002948: 2301 movs r3, #1
|
||
800294a: 683a ldr r2, [r7, #0]
|
||
800294c: f7ff fd72 bl 8002434 <disk_read>
|
||
8002950: 4603 mov r3, r0
|
||
8002952: 2b00 cmp r3, #0
|
||
8002954: d004 beq.n 8002960 <move_window+0x4a>
|
||
sector = 0xFFFFFFFF; /* Invalidate window if data is not reliable */
|
||
8002956: f04f 33ff mov.w r3, #4294967295
|
||
800295a: 603b str r3, [r7, #0]
|
||
res = FR_DISK_ERR;
|
||
800295c: 2301 movs r3, #1
|
||
800295e: 73fb strb r3, [r7, #15]
|
||
}
|
||
fs->winsect = sector;
|
||
8002960: 687b ldr r3, [r7, #4]
|
||
8002962: 683a ldr r2, [r7, #0]
|
||
8002964: f8c3 222c str.w r2, [r3, #556] ; 0x22c
|
||
}
|
||
}
|
||
return res;
|
||
8002968: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
800296a: 4618 mov r0, r3
|
||
800296c: 3710 adds r7, #16
|
||
800296e: 46bd mov sp, r7
|
||
8002970: bd80 pop {r7, pc}
|
||
|
||
08002972 <clust2sect>:
|
||
|
||
DWORD clust2sect ( /* !=0: Sector number, 0: Failed - invalid cluster# */
|
||
FATFS* fs, /* File system object */
|
||
DWORD clst /* Cluster# to be converted */
|
||
)
|
||
{
|
||
8002972: b480 push {r7}
|
||
8002974: b083 sub sp, #12
|
||
8002976: af00 add r7, sp, #0
|
||
8002978: 6078 str r0, [r7, #4]
|
||
800297a: 6039 str r1, [r7, #0]
|
||
clst -= 2;
|
||
800297c: 683b ldr r3, [r7, #0]
|
||
800297e: 3b02 subs r3, #2
|
||
8002980: 603b str r3, [r7, #0]
|
||
if (clst >= fs->n_fatent - 2) return 0; /* Invalid cluster# */
|
||
8002982: 687b ldr r3, [r7, #4]
|
||
8002984: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002988: 3b02 subs r3, #2
|
||
800298a: 683a ldr r2, [r7, #0]
|
||
800298c: 429a cmp r2, r3
|
||
800298e: d301 bcc.n 8002994 <clust2sect+0x22>
|
||
8002990: 2300 movs r3, #0
|
||
8002992: e00a b.n 80029aa <clust2sect+0x38>
|
||
return clst * fs->csize + fs->database;
|
||
8002994: 687b ldr r3, [r7, #4]
|
||
8002996: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
800299a: 461a mov r2, r3
|
||
800299c: 683b ldr r3, [r7, #0]
|
||
800299e: fb03 f202 mul.w r2, r3, r2
|
||
80029a2: 687b ldr r3, [r7, #4]
|
||
80029a4: f8d3 3228 ldr.w r3, [r3, #552] ; 0x228
|
||
80029a8: 4413 add r3, r2
|
||
}
|
||
80029aa: 4618 mov r0, r3
|
||
80029ac: 370c adds r7, #12
|
||
80029ae: 46bd mov sp, r7
|
||
80029b0: bc80 pop {r7}
|
||
80029b2: 4770 bx lr
|
||
|
||
080029b4 <get_fat>:
|
||
|
||
DWORD get_fat ( /* 0xFFFFFFFF:Disk error, 1:Internal error, 2..0x0FFFFFFF:Cluster status */
|
||
FATFS* fs, /* File system object */
|
||
DWORD clst /* FAT index number (cluster number) to get the value */
|
||
)
|
||
{
|
||
80029b4: b580 push {r7, lr}
|
||
80029b6: b086 sub sp, #24
|
||
80029b8: af00 add r7, sp, #0
|
||
80029ba: 6078 str r0, [r7, #4]
|
||
80029bc: 6039 str r1, [r7, #0]
|
||
UINT wc, bc;
|
||
BYTE *p;
|
||
DWORD val;
|
||
|
||
|
||
if (clst < 2 || clst >= fs->n_fatent) { /* Check range */
|
||
80029be: 683b ldr r3, [r7, #0]
|
||
80029c0: 2b01 cmp r3, #1
|
||
80029c2: d905 bls.n 80029d0 <get_fat+0x1c>
|
||
80029c4: 687b ldr r3, [r7, #4]
|
||
80029c6: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
80029ca: 683a ldr r2, [r7, #0]
|
||
80029cc: 429a cmp r2, r3
|
||
80029ce: d302 bcc.n 80029d6 <get_fat+0x22>
|
||
val = 1; /* Internal error */
|
||
80029d0: 2301 movs r3, #1
|
||
80029d2: 617b str r3, [r7, #20]
|
||
80029d4: e0a3 b.n 8002b1e <get_fat+0x16a>
|
||
|
||
} else {
|
||
val = 0xFFFFFFFF; /* Default value falls on disk error */
|
||
80029d6: f04f 33ff mov.w r3, #4294967295
|
||
80029da: 617b str r3, [r7, #20]
|
||
|
||
switch (fs->fs_type) {
|
||
80029dc: 687b ldr r3, [r7, #4]
|
||
80029de: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
80029e2: 2b03 cmp r3, #3
|
||
80029e4: d068 beq.n 8002ab8 <get_fat+0x104>
|
||
80029e6: 2b03 cmp r3, #3
|
||
80029e8: f300 808f bgt.w 8002b0a <get_fat+0x156>
|
||
80029ec: 2b01 cmp r3, #1
|
||
80029ee: d002 beq.n 80029f6 <get_fat+0x42>
|
||
80029f0: 2b02 cmp r3, #2
|
||
80029f2: d040 beq.n 8002a76 <get_fat+0xc2>
|
||
80029f4: e089 b.n 8002b0a <get_fat+0x156>
|
||
case FS_FAT12 :
|
||
bc = (UINT)clst; bc += bc / 2;
|
||
80029f6: 683b ldr r3, [r7, #0]
|
||
80029f8: 60fb str r3, [r7, #12]
|
||
80029fa: 68fb ldr r3, [r7, #12]
|
||
80029fc: 085b lsrs r3, r3, #1
|
||
80029fe: 68fa ldr r2, [r7, #12]
|
||
8002a00: 4413 add r3, r2
|
||
8002a02: 60fb str r3, [r7, #12]
|
||
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
|
||
8002a04: 687b ldr r3, [r7, #4]
|
||
8002a06: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002a0a: 68fb ldr r3, [r7, #12]
|
||
8002a0c: 0a5b lsrs r3, r3, #9
|
||
8002a0e: 4413 add r3, r2
|
||
8002a10: 4619 mov r1, r3
|
||
8002a12: 6878 ldr r0, [r7, #4]
|
||
8002a14: f7ff ff7f bl 8002916 <move_window>
|
||
8002a18: 4603 mov r3, r0
|
||
8002a1a: 2b00 cmp r3, #0
|
||
8002a1c: d178 bne.n 8002b10 <get_fat+0x15c>
|
||
wc = fs->win.d8[bc++ % SS(fs)];
|
||
8002a1e: 68fb ldr r3, [r7, #12]
|
||
8002a20: 1c5a adds r2, r3, #1
|
||
8002a22: 60fa str r2, [r7, #12]
|
||
8002a24: f3c3 0308 ubfx r3, r3, #0, #9
|
||
8002a28: 687a ldr r2, [r7, #4]
|
||
8002a2a: 5cd3 ldrb r3, [r2, r3]
|
||
8002a2c: 60bb str r3, [r7, #8]
|
||
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
|
||
8002a2e: 687b ldr r3, [r7, #4]
|
||
8002a30: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002a34: 68fb ldr r3, [r7, #12]
|
||
8002a36: 0a5b lsrs r3, r3, #9
|
||
8002a38: 4413 add r3, r2
|
||
8002a3a: 4619 mov r1, r3
|
||
8002a3c: 6878 ldr r0, [r7, #4]
|
||
8002a3e: f7ff ff6a bl 8002916 <move_window>
|
||
8002a42: 4603 mov r3, r0
|
||
8002a44: 2b00 cmp r3, #0
|
||
8002a46: d165 bne.n 8002b14 <get_fat+0x160>
|
||
wc |= fs->win.d8[bc % SS(fs)] << 8;
|
||
8002a48: 68fb ldr r3, [r7, #12]
|
||
8002a4a: f3c3 0308 ubfx r3, r3, #0, #9
|
||
8002a4e: 687a ldr r2, [r7, #4]
|
||
8002a50: 5cd3 ldrb r3, [r2, r3]
|
||
8002a52: 021b lsls r3, r3, #8
|
||
8002a54: 461a mov r2, r3
|
||
8002a56: 68bb ldr r3, [r7, #8]
|
||
8002a58: 4313 orrs r3, r2
|
||
8002a5a: 60bb str r3, [r7, #8]
|
||
val = clst & 1 ? wc >> 4 : (wc & 0xFFF);
|
||
8002a5c: 683b ldr r3, [r7, #0]
|
||
8002a5e: f003 0301 and.w r3, r3, #1
|
||
8002a62: 2b00 cmp r3, #0
|
||
8002a64: d002 beq.n 8002a6c <get_fat+0xb8>
|
||
8002a66: 68bb ldr r3, [r7, #8]
|
||
8002a68: 091b lsrs r3, r3, #4
|
||
8002a6a: e002 b.n 8002a72 <get_fat+0xbe>
|
||
8002a6c: 68bb ldr r3, [r7, #8]
|
||
8002a6e: f3c3 030b ubfx r3, r3, #0, #12
|
||
8002a72: 617b str r3, [r7, #20]
|
||
break;
|
||
8002a74: e053 b.n 8002b1e <get_fat+0x16a>
|
||
|
||
case FS_FAT16 :
|
||
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;
|
||
8002a76: 687b ldr r3, [r7, #4]
|
||
8002a78: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002a7c: 683b ldr r3, [r7, #0]
|
||
8002a7e: 0a1b lsrs r3, r3, #8
|
||
8002a80: 4413 add r3, r2
|
||
8002a82: 4619 mov r1, r3
|
||
8002a84: 6878 ldr r0, [r7, #4]
|
||
8002a86: f7ff ff46 bl 8002916 <move_window>
|
||
8002a8a: 4603 mov r3, r0
|
||
8002a8c: 2b00 cmp r3, #0
|
||
8002a8e: d143 bne.n 8002b18 <get_fat+0x164>
|
||
p = &fs->win.d8[clst * 2 % SS(fs)];
|
||
8002a90: 683b ldr r3, [r7, #0]
|
||
8002a92: 005b lsls r3, r3, #1
|
||
8002a94: f403 73ff and.w r3, r3, #510 ; 0x1fe
|
||
8002a98: 687a ldr r2, [r7, #4]
|
||
8002a9a: 4413 add r3, r2
|
||
8002a9c: 613b str r3, [r7, #16]
|
||
val = LD_WORD(p);
|
||
8002a9e: 693b ldr r3, [r7, #16]
|
||
8002aa0: 3301 adds r3, #1
|
||
8002aa2: 781b ldrb r3, [r3, #0]
|
||
8002aa4: 021b lsls r3, r3, #8
|
||
8002aa6: b21a sxth r2, r3
|
||
8002aa8: 693b ldr r3, [r7, #16]
|
||
8002aaa: 781b ldrb r3, [r3, #0]
|
||
8002aac: b21b sxth r3, r3
|
||
8002aae: 4313 orrs r3, r2
|
||
8002ab0: b21b sxth r3, r3
|
||
8002ab2: b29b uxth r3, r3
|
||
8002ab4: 617b str r3, [r7, #20]
|
||
break;
|
||
8002ab6: e032 b.n 8002b1e <get_fat+0x16a>
|
||
|
||
case FS_FAT32 :
|
||
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
|
||
8002ab8: 687b ldr r3, [r7, #4]
|
||
8002aba: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002abe: 683b ldr r3, [r7, #0]
|
||
8002ac0: 09db lsrs r3, r3, #7
|
||
8002ac2: 4413 add r3, r2
|
||
8002ac4: 4619 mov r1, r3
|
||
8002ac6: 6878 ldr r0, [r7, #4]
|
||
8002ac8: f7ff ff25 bl 8002916 <move_window>
|
||
8002acc: 4603 mov r3, r0
|
||
8002ace: 2b00 cmp r3, #0
|
||
8002ad0: d124 bne.n 8002b1c <get_fat+0x168>
|
||
p = &fs->win.d8[clst * 4 % SS(fs)];
|
||
8002ad2: 683b ldr r3, [r7, #0]
|
||
8002ad4: 009b lsls r3, r3, #2
|
||
8002ad6: f403 73fe and.w r3, r3, #508 ; 0x1fc
|
||
8002ada: 687a ldr r2, [r7, #4]
|
||
8002adc: 4413 add r3, r2
|
||
8002ade: 613b str r3, [r7, #16]
|
||
val = LD_DWORD(p) & 0x0FFFFFFF;
|
||
8002ae0: 693b ldr r3, [r7, #16]
|
||
8002ae2: 3303 adds r3, #3
|
||
8002ae4: 781b ldrb r3, [r3, #0]
|
||
8002ae6: 061a lsls r2, r3, #24
|
||
8002ae8: 693b ldr r3, [r7, #16]
|
||
8002aea: 3302 adds r3, #2
|
||
8002aec: 781b ldrb r3, [r3, #0]
|
||
8002aee: 041b lsls r3, r3, #16
|
||
8002af0: 4313 orrs r3, r2
|
||
8002af2: 693a ldr r2, [r7, #16]
|
||
8002af4: 3201 adds r2, #1
|
||
8002af6: 7812 ldrb r2, [r2, #0]
|
||
8002af8: 0212 lsls r2, r2, #8
|
||
8002afa: 4313 orrs r3, r2
|
||
8002afc: 693a ldr r2, [r7, #16]
|
||
8002afe: 7812 ldrb r2, [r2, #0]
|
||
8002b00: 4313 orrs r3, r2
|
||
8002b02: f023 4370 bic.w r3, r3, #4026531840 ; 0xf0000000
|
||
8002b06: 617b str r3, [r7, #20]
|
||
break;
|
||
8002b08: e009 b.n 8002b1e <get_fat+0x16a>
|
||
|
||
default:
|
||
val = 1; /* Internal error */
|
||
8002b0a: 2301 movs r3, #1
|
||
8002b0c: 617b str r3, [r7, #20]
|
||
8002b0e: e006 b.n 8002b1e <get_fat+0x16a>
|
||
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
|
||
8002b10: bf00 nop
|
||
8002b12: e004 b.n 8002b1e <get_fat+0x16a>
|
||
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
|
||
8002b14: bf00 nop
|
||
8002b16: e002 b.n 8002b1e <get_fat+0x16a>
|
||
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;
|
||
8002b18: bf00 nop
|
||
8002b1a: e000 b.n 8002b1e <get_fat+0x16a>
|
||
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
|
||
8002b1c: bf00 nop
|
||
}
|
||
}
|
||
|
||
return val;
|
||
8002b1e: 697b ldr r3, [r7, #20]
|
||
}
|
||
8002b20: 4618 mov r0, r3
|
||
8002b22: 3718 adds r7, #24
|
||
8002b24: 46bd mov sp, r7
|
||
8002b26: bd80 pop {r7, pc}
|
||
|
||
08002b28 <put_fat>:
|
||
FRESULT put_fat (
|
||
FATFS* fs, /* File system object */
|
||
DWORD clst, /* FAT index number (cluster number) to be changed */
|
||
DWORD val /* New value to be set to the entry */
|
||
)
|
||
{
|
||
8002b28: b580 push {r7, lr}
|
||
8002b2a: b088 sub sp, #32
|
||
8002b2c: af00 add r7, sp, #0
|
||
8002b2e: 60f8 str r0, [r7, #12]
|
||
8002b30: 60b9 str r1, [r7, #8]
|
||
8002b32: 607a str r2, [r7, #4]
|
||
UINT bc;
|
||
BYTE *p;
|
||
FRESULT res;
|
||
|
||
|
||
if (clst < 2 || clst >= fs->n_fatent) { /* Check range */
|
||
8002b34: 68bb ldr r3, [r7, #8]
|
||
8002b36: 2b01 cmp r3, #1
|
||
8002b38: d905 bls.n 8002b46 <put_fat+0x1e>
|
||
8002b3a: 68fb ldr r3, [r7, #12]
|
||
8002b3c: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002b40: 68ba ldr r2, [r7, #8]
|
||
8002b42: 429a cmp r2, r3
|
||
8002b44: d302 bcc.n 8002b4c <put_fat+0x24>
|
||
res = FR_INT_ERR;
|
||
8002b46: 2302 movs r3, #2
|
||
8002b48: 77fb strb r3, [r7, #31]
|
||
8002b4a: e0f6 b.n 8002d3a <put_fat+0x212>
|
||
|
||
} else {
|
||
switch (fs->fs_type) {
|
||
8002b4c: 68fb ldr r3, [r7, #12]
|
||
8002b4e: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
8002b52: 2b03 cmp r3, #3
|
||
8002b54: f000 809e beq.w 8002c94 <put_fat+0x16c>
|
||
8002b58: 2b03 cmp r3, #3
|
||
8002b5a: f300 80e4 bgt.w 8002d26 <put_fat+0x1fe>
|
||
8002b5e: 2b01 cmp r3, #1
|
||
8002b60: d002 beq.n 8002b68 <put_fat+0x40>
|
||
8002b62: 2b02 cmp r3, #2
|
||
8002b64: d06f beq.n 8002c46 <put_fat+0x11e>
|
||
8002b66: e0de b.n 8002d26 <put_fat+0x1fe>
|
||
case FS_FAT12 :
|
||
bc = (UINT)clst; bc += bc / 2;
|
||
8002b68: 68bb ldr r3, [r7, #8]
|
||
8002b6a: 617b str r3, [r7, #20]
|
||
8002b6c: 697b ldr r3, [r7, #20]
|
||
8002b6e: 085b lsrs r3, r3, #1
|
||
8002b70: 697a ldr r2, [r7, #20]
|
||
8002b72: 4413 add r3, r2
|
||
8002b74: 617b str r3, [r7, #20]
|
||
res = move_window(fs, fs->fatbase + (bc / SS(fs)));
|
||
8002b76: 68fb ldr r3, [r7, #12]
|
||
8002b78: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002b7c: 697b ldr r3, [r7, #20]
|
||
8002b7e: 0a5b lsrs r3, r3, #9
|
||
8002b80: 4413 add r3, r2
|
||
8002b82: 4619 mov r1, r3
|
||
8002b84: 68f8 ldr r0, [r7, #12]
|
||
8002b86: f7ff fec6 bl 8002916 <move_window>
|
||
8002b8a: 4603 mov r3, r0
|
||
8002b8c: 77fb strb r3, [r7, #31]
|
||
if (res != FR_OK) break;
|
||
8002b8e: 7ffb ldrb r3, [r7, #31]
|
||
8002b90: 2b00 cmp r3, #0
|
||
8002b92: f040 80cb bne.w 8002d2c <put_fat+0x204>
|
||
p = &fs->win.d8[bc++ % SS(fs)];
|
||
8002b96: 697b ldr r3, [r7, #20]
|
||
8002b98: 1c5a adds r2, r3, #1
|
||
8002b9a: 617a str r2, [r7, #20]
|
||
8002b9c: f3c3 0308 ubfx r3, r3, #0, #9
|
||
8002ba0: 68fa ldr r2, [r7, #12]
|
||
8002ba2: 4413 add r3, r2
|
||
8002ba4: 61bb str r3, [r7, #24]
|
||
*p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val;
|
||
8002ba6: 68bb ldr r3, [r7, #8]
|
||
8002ba8: f003 0301 and.w r3, r3, #1
|
||
8002bac: 2b00 cmp r3, #0
|
||
8002bae: d00d beq.n 8002bcc <put_fat+0xa4>
|
||
8002bb0: 69bb ldr r3, [r7, #24]
|
||
8002bb2: 781b ldrb r3, [r3, #0]
|
||
8002bb4: b25b sxtb r3, r3
|
||
8002bb6: f003 030f and.w r3, r3, #15
|
||
8002bba: b25a sxtb r2, r3
|
||
8002bbc: 687b ldr r3, [r7, #4]
|
||
8002bbe: b2db uxtb r3, r3
|
||
8002bc0: 011b lsls r3, r3, #4
|
||
8002bc2: b25b sxtb r3, r3
|
||
8002bc4: 4313 orrs r3, r2
|
||
8002bc6: b25b sxtb r3, r3
|
||
8002bc8: b2db uxtb r3, r3
|
||
8002bca: e001 b.n 8002bd0 <put_fat+0xa8>
|
||
8002bcc: 687b ldr r3, [r7, #4]
|
||
8002bce: b2db uxtb r3, r3
|
||
8002bd0: 69ba ldr r2, [r7, #24]
|
||
8002bd2: 7013 strb r3, [r2, #0]
|
||
fs->wflag = 1;
|
||
8002bd4: 68fb ldr r3, [r7, #12]
|
||
8002bd6: 2201 movs r2, #1
|
||
8002bd8: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
res = move_window(fs, fs->fatbase + (bc / SS(fs)));
|
||
8002bdc: 68fb ldr r3, [r7, #12]
|
||
8002bde: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002be2: 697b ldr r3, [r7, #20]
|
||
8002be4: 0a5b lsrs r3, r3, #9
|
||
8002be6: 4413 add r3, r2
|
||
8002be8: 4619 mov r1, r3
|
||
8002bea: 68f8 ldr r0, [r7, #12]
|
||
8002bec: f7ff fe93 bl 8002916 <move_window>
|
||
8002bf0: 4603 mov r3, r0
|
||
8002bf2: 77fb strb r3, [r7, #31]
|
||
if (res != FR_OK) break;
|
||
8002bf4: 7ffb ldrb r3, [r7, #31]
|
||
8002bf6: 2b00 cmp r3, #0
|
||
8002bf8: f040 809a bne.w 8002d30 <put_fat+0x208>
|
||
p = &fs->win.d8[bc % SS(fs)];
|
||
8002bfc: 697b ldr r3, [r7, #20]
|
||
8002bfe: f3c3 0308 ubfx r3, r3, #0, #9
|
||
8002c02: 68fa ldr r2, [r7, #12]
|
||
8002c04: 4413 add r3, r2
|
||
8002c06: 61bb str r3, [r7, #24]
|
||
*p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
|
||
8002c08: 68bb ldr r3, [r7, #8]
|
||
8002c0a: f003 0301 and.w r3, r3, #1
|
||
8002c0e: 2b00 cmp r3, #0
|
||
8002c10: d003 beq.n 8002c1a <put_fat+0xf2>
|
||
8002c12: 687b ldr r3, [r7, #4]
|
||
8002c14: 091b lsrs r3, r3, #4
|
||
8002c16: b2db uxtb r3, r3
|
||
8002c18: e00e b.n 8002c38 <put_fat+0x110>
|
||
8002c1a: 69bb ldr r3, [r7, #24]
|
||
8002c1c: 781b ldrb r3, [r3, #0]
|
||
8002c1e: b25b sxtb r3, r3
|
||
8002c20: f023 030f bic.w r3, r3, #15
|
||
8002c24: b25a sxtb r2, r3
|
||
8002c26: 687b ldr r3, [r7, #4]
|
||
8002c28: 0a1b lsrs r3, r3, #8
|
||
8002c2a: b25b sxtb r3, r3
|
||
8002c2c: f003 030f and.w r3, r3, #15
|
||
8002c30: b25b sxtb r3, r3
|
||
8002c32: 4313 orrs r3, r2
|
||
8002c34: b25b sxtb r3, r3
|
||
8002c36: b2db uxtb r3, r3
|
||
8002c38: 69ba ldr r2, [r7, #24]
|
||
8002c3a: 7013 strb r3, [r2, #0]
|
||
fs->wflag = 1;
|
||
8002c3c: 68fb ldr r3, [r7, #12]
|
||
8002c3e: 2201 movs r2, #1
|
||
8002c40: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
break;
|
||
8002c44: e079 b.n 8002d3a <put_fat+0x212>
|
||
|
||
case FS_FAT16 :
|
||
res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 2)));
|
||
8002c46: 68fb ldr r3, [r7, #12]
|
||
8002c48: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002c4c: 68bb ldr r3, [r7, #8]
|
||
8002c4e: 0a1b lsrs r3, r3, #8
|
||
8002c50: 4413 add r3, r2
|
||
8002c52: 4619 mov r1, r3
|
||
8002c54: 68f8 ldr r0, [r7, #12]
|
||
8002c56: f7ff fe5e bl 8002916 <move_window>
|
||
8002c5a: 4603 mov r3, r0
|
||
8002c5c: 77fb strb r3, [r7, #31]
|
||
if (res != FR_OK) break;
|
||
8002c5e: 7ffb ldrb r3, [r7, #31]
|
||
8002c60: 2b00 cmp r3, #0
|
||
8002c62: d167 bne.n 8002d34 <put_fat+0x20c>
|
||
p = &fs->win.d8[clst * 2 % SS(fs)];
|
||
8002c64: 68bb ldr r3, [r7, #8]
|
||
8002c66: 005b lsls r3, r3, #1
|
||
8002c68: f403 73ff and.w r3, r3, #510 ; 0x1fe
|
||
8002c6c: 68fa ldr r2, [r7, #12]
|
||
8002c6e: 4413 add r3, r2
|
||
8002c70: 61bb str r3, [r7, #24]
|
||
ST_WORD(p, (WORD)val);
|
||
8002c72: 687b ldr r3, [r7, #4]
|
||
8002c74: b2da uxtb r2, r3
|
||
8002c76: 69bb ldr r3, [r7, #24]
|
||
8002c78: 701a strb r2, [r3, #0]
|
||
8002c7a: 687b ldr r3, [r7, #4]
|
||
8002c7c: b29b uxth r3, r3
|
||
8002c7e: 0a1b lsrs r3, r3, #8
|
||
8002c80: b29a uxth r2, r3
|
||
8002c82: 69bb ldr r3, [r7, #24]
|
||
8002c84: 3301 adds r3, #1
|
||
8002c86: b2d2 uxtb r2, r2
|
||
8002c88: 701a strb r2, [r3, #0]
|
||
fs->wflag = 1;
|
||
8002c8a: 68fb ldr r3, [r7, #12]
|
||
8002c8c: 2201 movs r2, #1
|
||
8002c8e: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
break;
|
||
8002c92: e052 b.n 8002d3a <put_fat+0x212>
|
||
|
||
case FS_FAT32 :
|
||
res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 4)));
|
||
8002c94: 68fb ldr r3, [r7, #12]
|
||
8002c96: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002c9a: 68bb ldr r3, [r7, #8]
|
||
8002c9c: 09db lsrs r3, r3, #7
|
||
8002c9e: 4413 add r3, r2
|
||
8002ca0: 4619 mov r1, r3
|
||
8002ca2: 68f8 ldr r0, [r7, #12]
|
||
8002ca4: f7ff fe37 bl 8002916 <move_window>
|
||
8002ca8: 4603 mov r3, r0
|
||
8002caa: 77fb strb r3, [r7, #31]
|
||
if (res != FR_OK) break;
|
||
8002cac: 7ffb ldrb r3, [r7, #31]
|
||
8002cae: 2b00 cmp r3, #0
|
||
8002cb0: d142 bne.n 8002d38 <put_fat+0x210>
|
||
p = &fs->win.d8[clst * 4 % SS(fs)];
|
||
8002cb2: 68bb ldr r3, [r7, #8]
|
||
8002cb4: 009b lsls r3, r3, #2
|
||
8002cb6: f403 73fe and.w r3, r3, #508 ; 0x1fc
|
||
8002cba: 68fa ldr r2, [r7, #12]
|
||
8002cbc: 4413 add r3, r2
|
||
8002cbe: 61bb str r3, [r7, #24]
|
||
val |= LD_DWORD(p) & 0xF0000000;
|
||
8002cc0: 69bb ldr r3, [r7, #24]
|
||
8002cc2: 3303 adds r3, #3
|
||
8002cc4: 781b ldrb r3, [r3, #0]
|
||
8002cc6: 061a lsls r2, r3, #24
|
||
8002cc8: 69bb ldr r3, [r7, #24]
|
||
8002cca: 3302 adds r3, #2
|
||
8002ccc: 781b ldrb r3, [r3, #0]
|
||
8002cce: 041b lsls r3, r3, #16
|
||
8002cd0: 4313 orrs r3, r2
|
||
8002cd2: 69ba ldr r2, [r7, #24]
|
||
8002cd4: 3201 adds r2, #1
|
||
8002cd6: 7812 ldrb r2, [r2, #0]
|
||
8002cd8: 0212 lsls r2, r2, #8
|
||
8002cda: 4313 orrs r3, r2
|
||
8002cdc: 69ba ldr r2, [r7, #24]
|
||
8002cde: 7812 ldrb r2, [r2, #0]
|
||
8002ce0: 4313 orrs r3, r2
|
||
8002ce2: f003 4370 and.w r3, r3, #4026531840 ; 0xf0000000
|
||
8002ce6: 687a ldr r2, [r7, #4]
|
||
8002ce8: 4313 orrs r3, r2
|
||
8002cea: 607b str r3, [r7, #4]
|
||
ST_DWORD(p, val);
|
||
8002cec: 687b ldr r3, [r7, #4]
|
||
8002cee: b2da uxtb r2, r3
|
||
8002cf0: 69bb ldr r3, [r7, #24]
|
||
8002cf2: 701a strb r2, [r3, #0]
|
||
8002cf4: 687b ldr r3, [r7, #4]
|
||
8002cf6: b29b uxth r3, r3
|
||
8002cf8: 0a1b lsrs r3, r3, #8
|
||
8002cfa: b29a uxth r2, r3
|
||
8002cfc: 69bb ldr r3, [r7, #24]
|
||
8002cfe: 3301 adds r3, #1
|
||
8002d00: b2d2 uxtb r2, r2
|
||
8002d02: 701a strb r2, [r3, #0]
|
||
8002d04: 687b ldr r3, [r7, #4]
|
||
8002d06: 0c1a lsrs r2, r3, #16
|
||
8002d08: 69bb ldr r3, [r7, #24]
|
||
8002d0a: 3302 adds r3, #2
|
||
8002d0c: b2d2 uxtb r2, r2
|
||
8002d0e: 701a strb r2, [r3, #0]
|
||
8002d10: 687b ldr r3, [r7, #4]
|
||
8002d12: 0e1a lsrs r2, r3, #24
|
||
8002d14: 69bb ldr r3, [r7, #24]
|
||
8002d16: 3303 adds r3, #3
|
||
8002d18: b2d2 uxtb r2, r2
|
||
8002d1a: 701a strb r2, [r3, #0]
|
||
fs->wflag = 1;
|
||
8002d1c: 68fb ldr r3, [r7, #12]
|
||
8002d1e: 2201 movs r2, #1
|
||
8002d20: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
break;
|
||
8002d24: e009 b.n 8002d3a <put_fat+0x212>
|
||
|
||
default :
|
||
res = FR_INT_ERR;
|
||
8002d26: 2302 movs r3, #2
|
||
8002d28: 77fb strb r3, [r7, #31]
|
||
8002d2a: e006 b.n 8002d3a <put_fat+0x212>
|
||
if (res != FR_OK) break;
|
||
8002d2c: bf00 nop
|
||
8002d2e: e004 b.n 8002d3a <put_fat+0x212>
|
||
if (res != FR_OK) break;
|
||
8002d30: bf00 nop
|
||
8002d32: e002 b.n 8002d3a <put_fat+0x212>
|
||
if (res != FR_OK) break;
|
||
8002d34: bf00 nop
|
||
8002d36: e000 b.n 8002d3a <put_fat+0x212>
|
||
if (res != FR_OK) break;
|
||
8002d38: bf00 nop
|
||
}
|
||
}
|
||
|
||
return res;
|
||
8002d3a: 7ffb ldrb r3, [r7, #31]
|
||
}
|
||
8002d3c: 4618 mov r0, r3
|
||
8002d3e: 3720 adds r7, #32
|
||
8002d40: 46bd mov sp, r7
|
||
8002d42: bd80 pop {r7, pc}
|
||
|
||
08002d44 <remove_chain>:
|
||
static
|
||
FRESULT remove_chain (
|
||
FATFS* fs, /* File system object */
|
||
DWORD clst /* Cluster# to remove a chain from */
|
||
)
|
||
{
|
||
8002d44: b580 push {r7, lr}
|
||
8002d46: b084 sub sp, #16
|
||
8002d48: af00 add r7, sp, #0
|
||
8002d4a: 6078 str r0, [r7, #4]
|
||
8002d4c: 6039 str r1, [r7, #0]
|
||
DWORD nxt;
|
||
#if _USE_TRIM
|
||
DWORD scl = clst, ecl = clst, rt[2];
|
||
#endif
|
||
|
||
if (clst < 2 || clst >= fs->n_fatent) { /* Check range */
|
||
8002d4e: 683b ldr r3, [r7, #0]
|
||
8002d50: 2b01 cmp r3, #1
|
||
8002d52: d905 bls.n 8002d60 <remove_chain+0x1c>
|
||
8002d54: 687b ldr r3, [r7, #4]
|
||
8002d56: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002d5a: 683a ldr r2, [r7, #0]
|
||
8002d5c: 429a cmp r2, r3
|
||
8002d5e: d302 bcc.n 8002d66 <remove_chain+0x22>
|
||
res = FR_INT_ERR;
|
||
8002d60: 2302 movs r3, #2
|
||
8002d62: 73fb strb r3, [r7, #15]
|
||
8002d64: e043 b.n 8002dee <remove_chain+0xaa>
|
||
|
||
} else {
|
||
res = FR_OK;
|
||
8002d66: 2300 movs r3, #0
|
||
8002d68: 73fb strb r3, [r7, #15]
|
||
while (clst < fs->n_fatent) { /* Not a last link? */
|
||
8002d6a: e036 b.n 8002dda <remove_chain+0x96>
|
||
nxt = get_fat(fs, clst); /* Get cluster status */
|
||
8002d6c: 6839 ldr r1, [r7, #0]
|
||
8002d6e: 6878 ldr r0, [r7, #4]
|
||
8002d70: f7ff fe20 bl 80029b4 <get_fat>
|
||
8002d74: 60b8 str r0, [r7, #8]
|
||
if (nxt == 0) break; /* Empty cluster? */
|
||
8002d76: 68bb ldr r3, [r7, #8]
|
||
8002d78: 2b00 cmp r3, #0
|
||
8002d7a: d035 beq.n 8002de8 <remove_chain+0xa4>
|
||
if (nxt == 1) { res = FR_INT_ERR; break; } /* Internal error? */
|
||
8002d7c: 68bb ldr r3, [r7, #8]
|
||
8002d7e: 2b01 cmp r3, #1
|
||
8002d80: d102 bne.n 8002d88 <remove_chain+0x44>
|
||
8002d82: 2302 movs r3, #2
|
||
8002d84: 73fb strb r3, [r7, #15]
|
||
8002d86: e032 b.n 8002dee <remove_chain+0xaa>
|
||
if (nxt == 0xFFFFFFFF) { res = FR_DISK_ERR; break; } /* Disk error? */
|
||
8002d88: 68bb ldr r3, [r7, #8]
|
||
8002d8a: f1b3 3fff cmp.w r3, #4294967295
|
||
8002d8e: d102 bne.n 8002d96 <remove_chain+0x52>
|
||
8002d90: 2301 movs r3, #1
|
||
8002d92: 73fb strb r3, [r7, #15]
|
||
8002d94: e02b b.n 8002dee <remove_chain+0xaa>
|
||
res = put_fat(fs, clst, 0); /* Mark the cluster "empty" */
|
||
8002d96: 2200 movs r2, #0
|
||
8002d98: 6839 ldr r1, [r7, #0]
|
||
8002d9a: 6878 ldr r0, [r7, #4]
|
||
8002d9c: f7ff fec4 bl 8002b28 <put_fat>
|
||
8002da0: 4603 mov r3, r0
|
||
8002da2: 73fb strb r3, [r7, #15]
|
||
if (res != FR_OK) break;
|
||
8002da4: 7bfb ldrb r3, [r7, #15]
|
||
8002da6: 2b00 cmp r3, #0
|
||
8002da8: d120 bne.n 8002dec <remove_chain+0xa8>
|
||
if (fs->free_clust != 0xFFFFFFFF) { /* Update FSINFO */
|
||
8002daa: 687b ldr r3, [r7, #4]
|
||
8002dac: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8002db0: f1b3 3fff cmp.w r3, #4294967295
|
||
8002db4: d00f beq.n 8002dd6 <remove_chain+0x92>
|
||
fs->free_clust++;
|
||
8002db6: 687b ldr r3, [r7, #4]
|
||
8002db8: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8002dbc: 1c5a adds r2, r3, #1
|
||
8002dbe: 687b ldr r3, [r7, #4]
|
||
8002dc0: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
fs->fsi_flag |= 1;
|
||
8002dc4: 687b ldr r3, [r7, #4]
|
||
8002dc6: f893 3205 ldrb.w r3, [r3, #517] ; 0x205
|
||
8002dca: f043 0301 orr.w r3, r3, #1
|
||
8002dce: b2da uxtb r2, r3
|
||
8002dd0: 687b ldr r3, [r7, #4]
|
||
8002dd2: f883 2205 strb.w r2, [r3, #517] ; 0x205
|
||
rt[1] = clust2sect(fs, ecl) + fs->csize - 1; /* End sector */
|
||
disk_ioctl(fs->drv, CTRL_TRIM, rt); /* Erase the block */
|
||
scl = ecl = nxt;
|
||
}
|
||
#endif
|
||
clst = nxt; /* Next cluster */
|
||
8002dd6: 68bb ldr r3, [r7, #8]
|
||
8002dd8: 603b str r3, [r7, #0]
|
||
while (clst < fs->n_fatent) { /* Not a last link? */
|
||
8002dda: 687b ldr r3, [r7, #4]
|
||
8002ddc: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002de0: 683a ldr r2, [r7, #0]
|
||
8002de2: 429a cmp r2, r3
|
||
8002de4: d3c2 bcc.n 8002d6c <remove_chain+0x28>
|
||
8002de6: e002 b.n 8002dee <remove_chain+0xaa>
|
||
if (nxt == 0) break; /* Empty cluster? */
|
||
8002de8: bf00 nop
|
||
8002dea: e000 b.n 8002dee <remove_chain+0xaa>
|
||
if (res != FR_OK) break;
|
||
8002dec: bf00 nop
|
||
}
|
||
}
|
||
|
||
return res;
|
||
8002dee: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8002df0: 4618 mov r0, r3
|
||
8002df2: 3710 adds r7, #16
|
||
8002df4: 46bd mov sp, r7
|
||
8002df6: bd80 pop {r7, pc}
|
||
|
||
08002df8 <create_chain>:
|
||
static
|
||
DWORD create_chain ( /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */
|
||
FATFS* fs, /* File system object */
|
||
DWORD clst /* Cluster# to stretch. 0 means create a new chain. */
|
||
)
|
||
{
|
||
8002df8: b580 push {r7, lr}
|
||
8002dfa: b086 sub sp, #24
|
||
8002dfc: af00 add r7, sp, #0
|
||
8002dfe: 6078 str r0, [r7, #4]
|
||
8002e00: 6039 str r1, [r7, #0]
|
||
DWORD cs, ncl, scl;
|
||
FRESULT res;
|
||
|
||
|
||
if (clst == 0) { /* Create a new chain */
|
||
8002e02: 683b ldr r3, [r7, #0]
|
||
8002e04: 2b00 cmp r3, #0
|
||
8002e06: d10f bne.n 8002e28 <create_chain+0x30>
|
||
scl = fs->last_clust; /* Get suggested start point */
|
||
8002e08: 687b ldr r3, [r7, #4]
|
||
8002e0a: f8d3 320c ldr.w r3, [r3, #524] ; 0x20c
|
||
8002e0e: 613b str r3, [r7, #16]
|
||
if (!scl || scl >= fs->n_fatent) scl = 1;
|
||
8002e10: 693b ldr r3, [r7, #16]
|
||
8002e12: 2b00 cmp r3, #0
|
||
8002e14: d005 beq.n 8002e22 <create_chain+0x2a>
|
||
8002e16: 687b ldr r3, [r7, #4]
|
||
8002e18: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002e1c: 693a ldr r2, [r7, #16]
|
||
8002e1e: 429a cmp r2, r3
|
||
8002e20: d31c bcc.n 8002e5c <create_chain+0x64>
|
||
8002e22: 2301 movs r3, #1
|
||
8002e24: 613b str r3, [r7, #16]
|
||
8002e26: e019 b.n 8002e5c <create_chain+0x64>
|
||
}
|
||
else { /* Stretch the current chain */
|
||
cs = get_fat(fs, clst); /* Check the cluster status */
|
||
8002e28: 6839 ldr r1, [r7, #0]
|
||
8002e2a: 6878 ldr r0, [r7, #4]
|
||
8002e2c: f7ff fdc2 bl 80029b4 <get_fat>
|
||
8002e30: 60b8 str r0, [r7, #8]
|
||
if (cs < 2) return 1; /* Invalid value */
|
||
8002e32: 68bb ldr r3, [r7, #8]
|
||
8002e34: 2b01 cmp r3, #1
|
||
8002e36: d801 bhi.n 8002e3c <create_chain+0x44>
|
||
8002e38: 2301 movs r3, #1
|
||
8002e3a: e076 b.n 8002f2a <create_chain+0x132>
|
||
if (cs == 0xFFFFFFFF) return cs; /* A disk error occurred */
|
||
8002e3c: 68bb ldr r3, [r7, #8]
|
||
8002e3e: f1b3 3fff cmp.w r3, #4294967295
|
||
8002e42: d101 bne.n 8002e48 <create_chain+0x50>
|
||
8002e44: 68bb ldr r3, [r7, #8]
|
||
8002e46: e070 b.n 8002f2a <create_chain+0x132>
|
||
if (cs < fs->n_fatent) return cs; /* It is already followed by next cluster */
|
||
8002e48: 687b ldr r3, [r7, #4]
|
||
8002e4a: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002e4e: 68ba ldr r2, [r7, #8]
|
||
8002e50: 429a cmp r2, r3
|
||
8002e52: d201 bcs.n 8002e58 <create_chain+0x60>
|
||
8002e54: 68bb ldr r3, [r7, #8]
|
||
8002e56: e068 b.n 8002f2a <create_chain+0x132>
|
||
scl = clst;
|
||
8002e58: 683b ldr r3, [r7, #0]
|
||
8002e5a: 613b str r3, [r7, #16]
|
||
}
|
||
|
||
ncl = scl; /* Start cluster */
|
||
8002e5c: 693b ldr r3, [r7, #16]
|
||
8002e5e: 617b str r3, [r7, #20]
|
||
for (;;) {
|
||
ncl++; /* Next cluster */
|
||
8002e60: 697b ldr r3, [r7, #20]
|
||
8002e62: 3301 adds r3, #1
|
||
8002e64: 617b str r3, [r7, #20]
|
||
if (ncl >= fs->n_fatent) { /* Check wrap around */
|
||
8002e66: 687b ldr r3, [r7, #4]
|
||
8002e68: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002e6c: 697a ldr r2, [r7, #20]
|
||
8002e6e: 429a cmp r2, r3
|
||
8002e70: d307 bcc.n 8002e82 <create_chain+0x8a>
|
||
ncl = 2;
|
||
8002e72: 2302 movs r3, #2
|
||
8002e74: 617b str r3, [r7, #20]
|
||
if (ncl > scl) return 0; /* No free cluster */
|
||
8002e76: 697a ldr r2, [r7, #20]
|
||
8002e78: 693b ldr r3, [r7, #16]
|
||
8002e7a: 429a cmp r2, r3
|
||
8002e7c: d901 bls.n 8002e82 <create_chain+0x8a>
|
||
8002e7e: 2300 movs r3, #0
|
||
8002e80: e053 b.n 8002f2a <create_chain+0x132>
|
||
}
|
||
cs = get_fat(fs, ncl); /* Get the cluster status */
|
||
8002e82: 6979 ldr r1, [r7, #20]
|
||
8002e84: 6878 ldr r0, [r7, #4]
|
||
8002e86: f7ff fd95 bl 80029b4 <get_fat>
|
||
8002e8a: 60b8 str r0, [r7, #8]
|
||
if (cs == 0) break; /* Found a free cluster */
|
||
8002e8c: 68bb ldr r3, [r7, #8]
|
||
8002e8e: 2b00 cmp r3, #0
|
||
8002e90: d00e beq.n 8002eb0 <create_chain+0xb8>
|
||
if (cs == 0xFFFFFFFF || cs == 1)/* An error occurred */
|
||
8002e92: 68bb ldr r3, [r7, #8]
|
||
8002e94: f1b3 3fff cmp.w r3, #4294967295
|
||
8002e98: d002 beq.n 8002ea0 <create_chain+0xa8>
|
||
8002e9a: 68bb ldr r3, [r7, #8]
|
||
8002e9c: 2b01 cmp r3, #1
|
||
8002e9e: d101 bne.n 8002ea4 <create_chain+0xac>
|
||
return cs;
|
||
8002ea0: 68bb ldr r3, [r7, #8]
|
||
8002ea2: e042 b.n 8002f2a <create_chain+0x132>
|
||
if (ncl == scl) return 0; /* No free cluster */
|
||
8002ea4: 697a ldr r2, [r7, #20]
|
||
8002ea6: 693b ldr r3, [r7, #16]
|
||
8002ea8: 429a cmp r2, r3
|
||
8002eaa: d1d9 bne.n 8002e60 <create_chain+0x68>
|
||
8002eac: 2300 movs r3, #0
|
||
8002eae: e03c b.n 8002f2a <create_chain+0x132>
|
||
if (cs == 0) break; /* Found a free cluster */
|
||
8002eb0: bf00 nop
|
||
}
|
||
|
||
res = put_fat(fs, ncl, 0x0FFFFFFF); /* Mark the new cluster "last link" */
|
||
8002eb2: f06f 4270 mvn.w r2, #4026531840 ; 0xf0000000
|
||
8002eb6: 6979 ldr r1, [r7, #20]
|
||
8002eb8: 6878 ldr r0, [r7, #4]
|
||
8002eba: f7ff fe35 bl 8002b28 <put_fat>
|
||
8002ebe: 4603 mov r3, r0
|
||
8002ec0: 73fb strb r3, [r7, #15]
|
||
if (res == FR_OK && clst != 0) {
|
||
8002ec2: 7bfb ldrb r3, [r7, #15]
|
||
8002ec4: 2b00 cmp r3, #0
|
||
8002ec6: d109 bne.n 8002edc <create_chain+0xe4>
|
||
8002ec8: 683b ldr r3, [r7, #0]
|
||
8002eca: 2b00 cmp r3, #0
|
||
8002ecc: d006 beq.n 8002edc <create_chain+0xe4>
|
||
res = put_fat(fs, clst, ncl); /* Link it to the previous one if needed */
|
||
8002ece: 697a ldr r2, [r7, #20]
|
||
8002ed0: 6839 ldr r1, [r7, #0]
|
||
8002ed2: 6878 ldr r0, [r7, #4]
|
||
8002ed4: f7ff fe28 bl 8002b28 <put_fat>
|
||
8002ed8: 4603 mov r3, r0
|
||
8002eda: 73fb strb r3, [r7, #15]
|
||
}
|
||
if (res == FR_OK) {
|
||
8002edc: 7bfb ldrb r3, [r7, #15]
|
||
8002ede: 2b00 cmp r3, #0
|
||
8002ee0: d11a bne.n 8002f18 <create_chain+0x120>
|
||
fs->last_clust = ncl; /* Update FSINFO */
|
||
8002ee2: 687b ldr r3, [r7, #4]
|
||
8002ee4: 697a ldr r2, [r7, #20]
|
||
8002ee6: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
if (fs->free_clust != 0xFFFFFFFF) {
|
||
8002eea: 687b ldr r3, [r7, #4]
|
||
8002eec: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8002ef0: f1b3 3fff cmp.w r3, #4294967295
|
||
8002ef4: d018 beq.n 8002f28 <create_chain+0x130>
|
||
fs->free_clust--;
|
||
8002ef6: 687b ldr r3, [r7, #4]
|
||
8002ef8: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8002efc: 1e5a subs r2, r3, #1
|
||
8002efe: 687b ldr r3, [r7, #4]
|
||
8002f00: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
fs->fsi_flag |= 1;
|
||
8002f04: 687b ldr r3, [r7, #4]
|
||
8002f06: f893 3205 ldrb.w r3, [r3, #517] ; 0x205
|
||
8002f0a: f043 0301 orr.w r3, r3, #1
|
||
8002f0e: b2da uxtb r2, r3
|
||
8002f10: 687b ldr r3, [r7, #4]
|
||
8002f12: f883 2205 strb.w r2, [r3, #517] ; 0x205
|
||
8002f16: e007 b.n 8002f28 <create_chain+0x130>
|
||
}
|
||
} else {
|
||
ncl = (res == FR_DISK_ERR) ? 0xFFFFFFFF : 1;
|
||
8002f18: 7bfb ldrb r3, [r7, #15]
|
||
8002f1a: 2b01 cmp r3, #1
|
||
8002f1c: d102 bne.n 8002f24 <create_chain+0x12c>
|
||
8002f1e: f04f 33ff mov.w r3, #4294967295
|
||
8002f22: e000 b.n 8002f26 <create_chain+0x12e>
|
||
8002f24: 2301 movs r3, #1
|
||
8002f26: 617b str r3, [r7, #20]
|
||
}
|
||
|
||
return ncl; /* Return new cluster number or error code */
|
||
8002f28: 697b ldr r3, [r7, #20]
|
||
}
|
||
8002f2a: 4618 mov r0, r3
|
||
8002f2c: 3718 adds r7, #24
|
||
8002f2e: 46bd mov sp, r7
|
||
8002f30: bd80 pop {r7, pc}
|
||
|
||
08002f32 <clmt_clust>:
|
||
static
|
||
DWORD clmt_clust ( /* <2:Error, >=2:Cluster number */
|
||
FIL* fp, /* Pointer to the file object */
|
||
DWORD ofs /* File offset to be converted to cluster# */
|
||
)
|
||
{
|
||
8002f32: b480 push {r7}
|
||
8002f34: b087 sub sp, #28
|
||
8002f36: af00 add r7, sp, #0
|
||
8002f38: 6078 str r0, [r7, #4]
|
||
8002f3a: 6039 str r1, [r7, #0]
|
||
DWORD cl, ncl, *tbl;
|
||
|
||
|
||
tbl = fp->cltbl + 1; /* Top of CLMT */
|
||
8002f3c: 687b ldr r3, [r7, #4]
|
||
8002f3e: f8d3 3224 ldr.w r3, [r3, #548] ; 0x224
|
||
8002f42: 3304 adds r3, #4
|
||
8002f44: 613b str r3, [r7, #16]
|
||
cl = ofs / SS(fp->fs) / fp->fs->csize; /* Cluster order from top of the file */
|
||
8002f46: 683b ldr r3, [r7, #0]
|
||
8002f48: 0a5b lsrs r3, r3, #9
|
||
8002f4a: 687a ldr r2, [r7, #4]
|
||
8002f4c: f8d2 2200 ldr.w r2, [r2, #512] ; 0x200
|
||
8002f50: f892 2202 ldrb.w r2, [r2, #514] ; 0x202
|
||
8002f54: fbb3 f3f2 udiv r3, r3, r2
|
||
8002f58: 617b str r3, [r7, #20]
|
||
for (;;) {
|
||
ncl = *tbl++; /* Number of cluters in the fragment */
|
||
8002f5a: 693b ldr r3, [r7, #16]
|
||
8002f5c: 1d1a adds r2, r3, #4
|
||
8002f5e: 613a str r2, [r7, #16]
|
||
8002f60: 681b ldr r3, [r3, #0]
|
||
8002f62: 60fb str r3, [r7, #12]
|
||
if (!ncl) return 0; /* End of table? (error) */
|
||
8002f64: 68fb ldr r3, [r7, #12]
|
||
8002f66: 2b00 cmp r3, #0
|
||
8002f68: d101 bne.n 8002f6e <clmt_clust+0x3c>
|
||
8002f6a: 2300 movs r3, #0
|
||
8002f6c: e010 b.n 8002f90 <clmt_clust+0x5e>
|
||
if (cl < ncl) break; /* In this fragment? */
|
||
8002f6e: 697a ldr r2, [r7, #20]
|
||
8002f70: 68fb ldr r3, [r7, #12]
|
||
8002f72: 429a cmp r2, r3
|
||
8002f74: d307 bcc.n 8002f86 <clmt_clust+0x54>
|
||
cl -= ncl; tbl++; /* Next fragment */
|
||
8002f76: 697a ldr r2, [r7, #20]
|
||
8002f78: 68fb ldr r3, [r7, #12]
|
||
8002f7a: 1ad3 subs r3, r2, r3
|
||
8002f7c: 617b str r3, [r7, #20]
|
||
8002f7e: 693b ldr r3, [r7, #16]
|
||
8002f80: 3304 adds r3, #4
|
||
8002f82: 613b str r3, [r7, #16]
|
||
ncl = *tbl++; /* Number of cluters in the fragment */
|
||
8002f84: e7e9 b.n 8002f5a <clmt_clust+0x28>
|
||
if (cl < ncl) break; /* In this fragment? */
|
||
8002f86: bf00 nop
|
||
}
|
||
return cl + *tbl; /* Return the cluster number */
|
||
8002f88: 693b ldr r3, [r7, #16]
|
||
8002f8a: 681a ldr r2, [r3, #0]
|
||
8002f8c: 697b ldr r3, [r7, #20]
|
||
8002f8e: 4413 add r3, r2
|
||
}
|
||
8002f90: 4618 mov r0, r3
|
||
8002f92: 371c adds r7, #28
|
||
8002f94: 46bd mov sp, r7
|
||
8002f96: bc80 pop {r7}
|
||
8002f98: 4770 bx lr
|
||
|
||
08002f9a <dir_sdi>:
|
||
static
|
||
FRESULT dir_sdi (
|
||
DIR* dp, /* Pointer to directory object */
|
||
UINT idx /* Index of directory table */
|
||
)
|
||
{
|
||
8002f9a: b580 push {r7, lr}
|
||
8002f9c: b086 sub sp, #24
|
||
8002f9e: af00 add r7, sp, #0
|
||
8002fa0: 6078 str r0, [r7, #4]
|
||
8002fa2: 6039 str r1, [r7, #0]
|
||
DWORD clst, sect;
|
||
UINT ic;
|
||
|
||
|
||
dp->index = (WORD)idx; /* Current index */
|
||
8002fa4: 683b ldr r3, [r7, #0]
|
||
8002fa6: b29a uxth r2, r3
|
||
8002fa8: 687b ldr r3, [r7, #4]
|
||
8002faa: f8a3 2206 strh.w r2, [r3, #518] ; 0x206
|
||
clst = dp->sclust; /* Table start cluster (0:root) */
|
||
8002fae: 687b ldr r3, [r7, #4]
|
||
8002fb0: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
8002fb4: 617b str r3, [r7, #20]
|
||
if (clst == 1 || clst >= dp->fs->n_fatent) /* Check start cluster range */
|
||
8002fb6: 697b ldr r3, [r7, #20]
|
||
8002fb8: 2b01 cmp r3, #1
|
||
8002fba: d007 beq.n 8002fcc <dir_sdi+0x32>
|
||
8002fbc: 687b ldr r3, [r7, #4]
|
||
8002fbe: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8002fc2: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002fc6: 697a ldr r2, [r7, #20]
|
||
8002fc8: 429a cmp r2, r3
|
||
8002fca: d301 bcc.n 8002fd0 <dir_sdi+0x36>
|
||
return FR_INT_ERR;
|
||
8002fcc: 2302 movs r3, #2
|
||
8002fce: e074 b.n 80030ba <dir_sdi+0x120>
|
||
if (!clst && dp->fs->fs_type == FS_FAT32) /* Replace cluster# 0 with root cluster# if in FAT32 */
|
||
8002fd0: 697b ldr r3, [r7, #20]
|
||
8002fd2: 2b00 cmp r3, #0
|
||
8002fd4: d10c bne.n 8002ff0 <dir_sdi+0x56>
|
||
8002fd6: 687b ldr r3, [r7, #4]
|
||
8002fd8: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8002fdc: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
8002fe0: 2b03 cmp r3, #3
|
||
8002fe2: d105 bne.n 8002ff0 <dir_sdi+0x56>
|
||
clst = dp->fs->dirbase;
|
||
8002fe4: 687b ldr r3, [r7, #4]
|
||
8002fe6: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8002fea: f8d3 3224 ldr.w r3, [r3, #548] ; 0x224
|
||
8002fee: 617b str r3, [r7, #20]
|
||
|
||
if (clst == 0) { /* Static table (root-directory in FAT12/16) */
|
||
8002ff0: 697b ldr r3, [r7, #20]
|
||
8002ff2: 2b00 cmp r3, #0
|
||
8002ff4: d111 bne.n 800301a <dir_sdi+0x80>
|
||
if (idx >= dp->fs->n_rootdir) /* Is index out of range? */
|
||
8002ff6: 687b ldr r3, [r7, #4]
|
||
8002ff8: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8002ffc: f8b3 3208 ldrh.w r3, [r3, #520] ; 0x208
|
||
8003000: 461a mov r2, r3
|
||
8003002: 683b ldr r3, [r7, #0]
|
||
8003004: 4293 cmp r3, r2
|
||
8003006: d301 bcc.n 800300c <dir_sdi+0x72>
|
||
return FR_INT_ERR;
|
||
8003008: 2302 movs r3, #2
|
||
800300a: e056 b.n 80030ba <dir_sdi+0x120>
|
||
sect = dp->fs->dirbase;
|
||
800300c: 687b ldr r3, [r7, #4]
|
||
800300e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003012: f8d3 3224 ldr.w r3, [r3, #548] ; 0x224
|
||
8003016: 613b str r3, [r7, #16]
|
||
8003018: e032 b.n 8003080 <dir_sdi+0xe6>
|
||
}
|
||
else { /* Dynamic table (root-directory in FAT32 or sub-directory) */
|
||
ic = SS(dp->fs) / SZ_DIRE * dp->fs->csize; /* Entries per cluster */
|
||
800301a: 687b ldr r3, [r7, #4]
|
||
800301c: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003020: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
8003024: 011b lsls r3, r3, #4
|
||
8003026: 60fb str r3, [r7, #12]
|
||
while (idx >= ic) { /* Follow cluster chain */
|
||
8003028: e01e b.n 8003068 <dir_sdi+0xce>
|
||
clst = get_fat(dp->fs, clst); /* Get next cluster */
|
||
800302a: 687b ldr r3, [r7, #4]
|
||
800302c: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003030: 6979 ldr r1, [r7, #20]
|
||
8003032: 4618 mov r0, r3
|
||
8003034: f7ff fcbe bl 80029b4 <get_fat>
|
||
8003038: 6178 str r0, [r7, #20]
|
||
if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
|
||
800303a: 697b ldr r3, [r7, #20]
|
||
800303c: f1b3 3fff cmp.w r3, #4294967295
|
||
8003040: d101 bne.n 8003046 <dir_sdi+0xac>
|
||
8003042: 2301 movs r3, #1
|
||
8003044: e039 b.n 80030ba <dir_sdi+0x120>
|
||
if (clst < 2 || clst >= dp->fs->n_fatent) /* Reached to end of table or internal error */
|
||
8003046: 697b ldr r3, [r7, #20]
|
||
8003048: 2b01 cmp r3, #1
|
||
800304a: d907 bls.n 800305c <dir_sdi+0xc2>
|
||
800304c: 687b ldr r3, [r7, #4]
|
||
800304e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003052: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8003056: 697a ldr r2, [r7, #20]
|
||
8003058: 429a cmp r2, r3
|
||
800305a: d301 bcc.n 8003060 <dir_sdi+0xc6>
|
||
return FR_INT_ERR;
|
||
800305c: 2302 movs r3, #2
|
||
800305e: e02c b.n 80030ba <dir_sdi+0x120>
|
||
idx -= ic;
|
||
8003060: 683a ldr r2, [r7, #0]
|
||
8003062: 68fb ldr r3, [r7, #12]
|
||
8003064: 1ad3 subs r3, r2, r3
|
||
8003066: 603b str r3, [r7, #0]
|
||
while (idx >= ic) { /* Follow cluster chain */
|
||
8003068: 683a ldr r2, [r7, #0]
|
||
800306a: 68fb ldr r3, [r7, #12]
|
||
800306c: 429a cmp r2, r3
|
||
800306e: d2dc bcs.n 800302a <dir_sdi+0x90>
|
||
}
|
||
sect = clust2sect(dp->fs, clst);
|
||
8003070: 687b ldr r3, [r7, #4]
|
||
8003072: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003076: 6979 ldr r1, [r7, #20]
|
||
8003078: 4618 mov r0, r3
|
||
800307a: f7ff fc7a bl 8002972 <clust2sect>
|
||
800307e: 6138 str r0, [r7, #16]
|
||
}
|
||
dp->clust = clst; /* Current cluster# */
|
||
8003080: 687b ldr r3, [r7, #4]
|
||
8003082: 697a ldr r2, [r7, #20]
|
||
8003084: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
if (!sect) return FR_INT_ERR;
|
||
8003088: 693b ldr r3, [r7, #16]
|
||
800308a: 2b00 cmp r3, #0
|
||
800308c: d101 bne.n 8003092 <dir_sdi+0xf8>
|
||
800308e: 2302 movs r3, #2
|
||
8003090: e013 b.n 80030ba <dir_sdi+0x120>
|
||
dp->sect = sect + idx / (SS(dp->fs) / SZ_DIRE); /* Sector# of the directory entry */
|
||
8003092: 683b ldr r3, [r7, #0]
|
||
8003094: 091a lsrs r2, r3, #4
|
||
8003096: 693b ldr r3, [r7, #16]
|
||
8003098: 441a add r2, r3
|
||
800309a: 687b ldr r3, [r7, #4]
|
||
800309c: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
dp->dir = dp->fs->win.d8 + (idx % (SS(dp->fs) / SZ_DIRE)) * SZ_DIRE; /* Ptr to the entry in the sector */
|
||
80030a0: 687b ldr r3, [r7, #4]
|
||
80030a2: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80030a6: 461a mov r2, r3
|
||
80030a8: 683b ldr r3, [r7, #0]
|
||
80030aa: f003 030f and.w r3, r3, #15
|
||
80030ae: 015b lsls r3, r3, #5
|
||
80030b0: 441a add r2, r3
|
||
80030b2: 687b ldr r3, [r7, #4]
|
||
80030b4: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
||
|
||
return FR_OK;
|
||
80030b8: 2300 movs r3, #0
|
||
}
|
||
80030ba: 4618 mov r0, r3
|
||
80030bc: 3718 adds r7, #24
|
||
80030be: 46bd mov sp, r7
|
||
80030c0: bd80 pop {r7, pc}
|
||
|
||
080030c2 <dir_next>:
|
||
static
|
||
FRESULT dir_next ( /* FR_OK:Succeeded, FR_NO_FILE:End of table, FR_DENIED:Could not stretch */
|
||
DIR* dp, /* Pointer to the directory object */
|
||
int stretch /* 0: Do not stretch table, 1: Stretch table if needed */
|
||
)
|
||
{
|
||
80030c2: b590 push {r4, r7, lr}
|
||
80030c4: b087 sub sp, #28
|
||
80030c6: af00 add r7, sp, #0
|
||
80030c8: 6078 str r0, [r7, #4]
|
||
80030ca: 6039 str r1, [r7, #0]
|
||
#if !_FS_READONLY
|
||
UINT c;
|
||
#endif
|
||
|
||
|
||
i = dp->index + 1;
|
||
80030cc: 687b ldr r3, [r7, #4]
|
||
80030ce: f8b3 3206 ldrh.w r3, [r3, #518] ; 0x206
|
||
80030d2: 3301 adds r3, #1
|
||
80030d4: 60fb str r3, [r7, #12]
|
||
if (!(i & 0xFFFF) || !dp->sect) /* Report EOT when index has reached 65535 */
|
||
80030d6: 68fb ldr r3, [r7, #12]
|
||
80030d8: b29b uxth r3, r3
|
||
80030da: 2b00 cmp r3, #0
|
||
80030dc: d004 beq.n 80030e8 <dir_next+0x26>
|
||
80030de: 687b ldr r3, [r7, #4]
|
||
80030e0: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
80030e4: 2b00 cmp r3, #0
|
||
80030e6: d101 bne.n 80030ec <dir_next+0x2a>
|
||
return FR_NO_FILE;
|
||
80030e8: 2304 movs r3, #4
|
||
80030ea: e0dd b.n 80032a8 <dir_next+0x1e6>
|
||
|
||
if (!(i % (SS(dp->fs) / SZ_DIRE))) { /* Sector changed? */
|
||
80030ec: 68fb ldr r3, [r7, #12]
|
||
80030ee: f003 030f and.w r3, r3, #15
|
||
80030f2: 2b00 cmp r3, #0
|
||
80030f4: f040 80c6 bne.w 8003284 <dir_next+0x1c2>
|
||
dp->sect++; /* Next sector */
|
||
80030f8: 687b ldr r3, [r7, #4]
|
||
80030fa: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
80030fe: 1c5a adds r2, r3, #1
|
||
8003100: 687b ldr r3, [r7, #4]
|
||
8003102: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
|
||
if (!dp->clust) { /* Static table */
|
||
8003106: 687b ldr r3, [r7, #4]
|
||
8003108: f8d3 320c ldr.w r3, [r3, #524] ; 0x20c
|
||
800310c: 2b00 cmp r3, #0
|
||
800310e: d10b bne.n 8003128 <dir_next+0x66>
|
||
if (i >= dp->fs->n_rootdir) /* Report EOT if it reached end of static table */
|
||
8003110: 687b ldr r3, [r7, #4]
|
||
8003112: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003116: f8b3 3208 ldrh.w r3, [r3, #520] ; 0x208
|
||
800311a: 461a mov r2, r3
|
||
800311c: 68fb ldr r3, [r7, #12]
|
||
800311e: 4293 cmp r3, r2
|
||
8003120: f0c0 80b0 bcc.w 8003284 <dir_next+0x1c2>
|
||
return FR_NO_FILE;
|
||
8003124: 2304 movs r3, #4
|
||
8003126: e0bf b.n 80032a8 <dir_next+0x1e6>
|
||
}
|
||
else { /* Dynamic table */
|
||
if (((i / (SS(dp->fs) / SZ_DIRE)) & (dp->fs->csize - 1)) == 0) { /* Cluster changed? */
|
||
8003128: 68fb ldr r3, [r7, #12]
|
||
800312a: 091b lsrs r3, r3, #4
|
||
800312c: 687a ldr r2, [r7, #4]
|
||
800312e: f8d2 2200 ldr.w r2, [r2, #512] ; 0x200
|
||
8003132: f892 2202 ldrb.w r2, [r2, #514] ; 0x202
|
||
8003136: 3a01 subs r2, #1
|
||
8003138: 4013 ands r3, r2
|
||
800313a: 2b00 cmp r3, #0
|
||
800313c: f040 80a2 bne.w 8003284 <dir_next+0x1c2>
|
||
clst = get_fat(dp->fs, dp->clust); /* Get next cluster */
|
||
8003140: 687b ldr r3, [r7, #4]
|
||
8003142: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
8003146: 687b ldr r3, [r7, #4]
|
||
8003148: f8d3 320c ldr.w r3, [r3, #524] ; 0x20c
|
||
800314c: 4619 mov r1, r3
|
||
800314e: 4610 mov r0, r2
|
||
8003150: f7ff fc30 bl 80029b4 <get_fat>
|
||
8003154: 6178 str r0, [r7, #20]
|
||
if (clst <= 1) return FR_INT_ERR;
|
||
8003156: 697b ldr r3, [r7, #20]
|
||
8003158: 2b01 cmp r3, #1
|
||
800315a: d801 bhi.n 8003160 <dir_next+0x9e>
|
||
800315c: 2302 movs r3, #2
|
||
800315e: e0a3 b.n 80032a8 <dir_next+0x1e6>
|
||
if (clst == 0xFFFFFFFF) return FR_DISK_ERR;
|
||
8003160: 697b ldr r3, [r7, #20]
|
||
8003162: f1b3 3fff cmp.w r3, #4294967295
|
||
8003166: d101 bne.n 800316c <dir_next+0xaa>
|
||
8003168: 2301 movs r3, #1
|
||
800316a: e09d b.n 80032a8 <dir_next+0x1e6>
|
||
if (clst >= dp->fs->n_fatent) { /* If it reached end of dynamic table, */
|
||
800316c: 687b ldr r3, [r7, #4]
|
||
800316e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003172: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8003176: 697a ldr r2, [r7, #20]
|
||
8003178: 429a cmp r2, r3
|
||
800317a: d374 bcc.n 8003266 <dir_next+0x1a4>
|
||
#if !_FS_READONLY
|
||
if (!stretch) return FR_NO_FILE; /* If do not stretch, report EOT */
|
||
800317c: 683b ldr r3, [r7, #0]
|
||
800317e: 2b00 cmp r3, #0
|
||
8003180: d101 bne.n 8003186 <dir_next+0xc4>
|
||
8003182: 2304 movs r3, #4
|
||
8003184: e090 b.n 80032a8 <dir_next+0x1e6>
|
||
clst = create_chain(dp->fs, dp->clust); /* Stretch cluster chain */
|
||
8003186: 687b ldr r3, [r7, #4]
|
||
8003188: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
800318c: 687b ldr r3, [r7, #4]
|
||
800318e: f8d3 320c ldr.w r3, [r3, #524] ; 0x20c
|
||
8003192: 4619 mov r1, r3
|
||
8003194: 4610 mov r0, r2
|
||
8003196: f7ff fe2f bl 8002df8 <create_chain>
|
||
800319a: 6178 str r0, [r7, #20]
|
||
if (clst == 0) return FR_DENIED; /* No free cluster */
|
||
800319c: 697b ldr r3, [r7, #20]
|
||
800319e: 2b00 cmp r3, #0
|
||
80031a0: d101 bne.n 80031a6 <dir_next+0xe4>
|
||
80031a2: 2307 movs r3, #7
|
||
80031a4: e080 b.n 80032a8 <dir_next+0x1e6>
|
||
if (clst == 1) return FR_INT_ERR;
|
||
80031a6: 697b ldr r3, [r7, #20]
|
||
80031a8: 2b01 cmp r3, #1
|
||
80031aa: d101 bne.n 80031b0 <dir_next+0xee>
|
||
80031ac: 2302 movs r3, #2
|
||
80031ae: e07b b.n 80032a8 <dir_next+0x1e6>
|
||
if (clst == 0xFFFFFFFF) return FR_DISK_ERR;
|
||
80031b0: 697b ldr r3, [r7, #20]
|
||
80031b2: f1b3 3fff cmp.w r3, #4294967295
|
||
80031b6: d101 bne.n 80031bc <dir_next+0xfa>
|
||
80031b8: 2301 movs r3, #1
|
||
80031ba: e075 b.n 80032a8 <dir_next+0x1e6>
|
||
/* Clean-up stretched table */
|
||
if (sync_window(dp->fs)) return FR_DISK_ERR;/* Flush disk access window */
|
||
80031bc: 687b ldr r3, [r7, #4]
|
||
80031be: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80031c2: 4618 mov r0, r3
|
||
80031c4: f7ff fb5e bl 8002884 <sync_window>
|
||
80031c8: 4603 mov r3, r0
|
||
80031ca: 2b00 cmp r3, #0
|
||
80031cc: d001 beq.n 80031d2 <dir_next+0x110>
|
||
80031ce: 2301 movs r3, #1
|
||
80031d0: e06a b.n 80032a8 <dir_next+0x1e6>
|
||
mem_set(dp->fs->win.d8, 0, SS(dp->fs)); /* Clear window buffer */
|
||
80031d2: 687b ldr r3, [r7, #4]
|
||
80031d4: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80031d8: f44f 7200 mov.w r2, #512 ; 0x200
|
||
80031dc: 2100 movs r1, #0
|
||
80031de: 4618 mov r0, r3
|
||
80031e0: f7ff f986 bl 80024f0 <mem_set>
|
||
dp->fs->winsect = clust2sect(dp->fs, clst); /* Cluster start sector */
|
||
80031e4: 687b ldr r3, [r7, #4]
|
||
80031e6: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
80031ea: 687b ldr r3, [r7, #4]
|
||
80031ec: f8d3 4200 ldr.w r4, [r3, #512] ; 0x200
|
||
80031f0: 6979 ldr r1, [r7, #20]
|
||
80031f2: 4610 mov r0, r2
|
||
80031f4: f7ff fbbd bl 8002972 <clust2sect>
|
||
80031f8: 4603 mov r3, r0
|
||
80031fa: f8c4 322c str.w r3, [r4, #556] ; 0x22c
|
||
for (c = 0; c < dp->fs->csize; c++) { /* Fill the new cluster with 0 */
|
||
80031fe: 2300 movs r3, #0
|
||
8003200: 613b str r3, [r7, #16]
|
||
8003202: e01b b.n 800323c <dir_next+0x17a>
|
||
dp->fs->wflag = 1;
|
||
8003204: 687b ldr r3, [r7, #4]
|
||
8003206: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800320a: 2201 movs r2, #1
|
||
800320c: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
if (sync_window(dp->fs)) return FR_DISK_ERR;
|
||
8003210: 687b ldr r3, [r7, #4]
|
||
8003212: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003216: 4618 mov r0, r3
|
||
8003218: f7ff fb34 bl 8002884 <sync_window>
|
||
800321c: 4603 mov r3, r0
|
||
800321e: 2b00 cmp r3, #0
|
||
8003220: d001 beq.n 8003226 <dir_next+0x164>
|
||
8003222: 2301 movs r3, #1
|
||
8003224: e040 b.n 80032a8 <dir_next+0x1e6>
|
||
dp->fs->winsect++;
|
||
8003226: 687b ldr r3, [r7, #4]
|
||
8003228: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800322c: f8d3 222c ldr.w r2, [r3, #556] ; 0x22c
|
||
8003230: 3201 adds r2, #1
|
||
8003232: f8c3 222c str.w r2, [r3, #556] ; 0x22c
|
||
for (c = 0; c < dp->fs->csize; c++) { /* Fill the new cluster with 0 */
|
||
8003236: 693b ldr r3, [r7, #16]
|
||
8003238: 3301 adds r3, #1
|
||
800323a: 613b str r3, [r7, #16]
|
||
800323c: 687b ldr r3, [r7, #4]
|
||
800323e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003242: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
8003246: 461a mov r2, r3
|
||
8003248: 693b ldr r3, [r7, #16]
|
||
800324a: 4293 cmp r3, r2
|
||
800324c: d3da bcc.n 8003204 <dir_next+0x142>
|
||
}
|
||
dp->fs->winsect -= c; /* Rewind window offset */
|
||
800324e: 687b ldr r3, [r7, #4]
|
||
8003250: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003254: f8d3 122c ldr.w r1, [r3, #556] ; 0x22c
|
||
8003258: 687b ldr r3, [r7, #4]
|
||
800325a: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800325e: 693a ldr r2, [r7, #16]
|
||
8003260: 1a8a subs r2, r1, r2
|
||
8003262: f8c3 222c str.w r2, [r3, #556] ; 0x22c
|
||
#else
|
||
if (!stretch) return FR_NO_FILE; /* If do not stretch, report EOT (this is to suppress warning) */
|
||
return FR_NO_FILE; /* Report EOT */
|
||
#endif
|
||
}
|
||
dp->clust = clst; /* Initialize data for new cluster */
|
||
8003266: 687b ldr r3, [r7, #4]
|
||
8003268: 697a ldr r2, [r7, #20]
|
||
800326a: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
dp->sect = clust2sect(dp->fs, clst);
|
||
800326e: 687b ldr r3, [r7, #4]
|
||
8003270: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003274: 6979 ldr r1, [r7, #20]
|
||
8003276: 4618 mov r0, r3
|
||
8003278: f7ff fb7b bl 8002972 <clust2sect>
|
||
800327c: 4602 mov r2, r0
|
||
800327e: 687b ldr r3, [r7, #4]
|
||
8003280: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
}
|
||
}
|
||
}
|
||
|
||
dp->index = (WORD)i; /* Current index */
|
||
8003284: 68fb ldr r3, [r7, #12]
|
||
8003286: b29a uxth r2, r3
|
||
8003288: 687b ldr r3, [r7, #4]
|
||
800328a: f8a3 2206 strh.w r2, [r3, #518] ; 0x206
|
||
dp->dir = dp->fs->win.d8 + (i % (SS(dp->fs) / SZ_DIRE)) * SZ_DIRE; /* Current entry in the window */
|
||
800328e: 687b ldr r3, [r7, #4]
|
||
8003290: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003294: 461a mov r2, r3
|
||
8003296: 68fb ldr r3, [r7, #12]
|
||
8003298: f003 030f and.w r3, r3, #15
|
||
800329c: 015b lsls r3, r3, #5
|
||
800329e: 441a add r2, r3
|
||
80032a0: 687b ldr r3, [r7, #4]
|
||
80032a2: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
||
|
||
return FR_OK;
|
||
80032a6: 2300 movs r3, #0
|
||
}
|
||
80032a8: 4618 mov r0, r3
|
||
80032aa: 371c adds r7, #28
|
||
80032ac: 46bd mov sp, r7
|
||
80032ae: bd90 pop {r4, r7, pc}
|
||
|
||
080032b0 <dir_alloc>:
|
||
static
|
||
FRESULT dir_alloc (
|
||
DIR* dp, /* Pointer to the directory object */
|
||
UINT nent /* Number of contiguous entries to allocate (1-21) */
|
||
)
|
||
{
|
||
80032b0: b580 push {r7, lr}
|
||
80032b2: b084 sub sp, #16
|
||
80032b4: af00 add r7, sp, #0
|
||
80032b6: 6078 str r0, [r7, #4]
|
||
80032b8: 6039 str r1, [r7, #0]
|
||
FRESULT res;
|
||
UINT n;
|
||
|
||
|
||
res = dir_sdi(dp, 0);
|
||
80032ba: 2100 movs r1, #0
|
||
80032bc: 6878 ldr r0, [r7, #4]
|
||
80032be: f7ff fe6c bl 8002f9a <dir_sdi>
|
||
80032c2: 4603 mov r3, r0
|
||
80032c4: 73fb strb r3, [r7, #15]
|
||
if (res == FR_OK) {
|
||
80032c6: 7bfb ldrb r3, [r7, #15]
|
||
80032c8: 2b00 cmp r3, #0
|
||
80032ca: d131 bne.n 8003330 <dir_alloc+0x80>
|
||
n = 0;
|
||
80032cc: 2300 movs r3, #0
|
||
80032ce: 60bb str r3, [r7, #8]
|
||
do {
|
||
res = move_window(dp->fs, dp->sect);
|
||
80032d0: 687b ldr r3, [r7, #4]
|
||
80032d2: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
80032d6: 687b ldr r3, [r7, #4]
|
||
80032d8: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
80032dc: 4619 mov r1, r3
|
||
80032de: 4610 mov r0, r2
|
||
80032e0: f7ff fb19 bl 8002916 <move_window>
|
||
80032e4: 4603 mov r3, r0
|
||
80032e6: 73fb strb r3, [r7, #15]
|
||
if (res != FR_OK) break;
|
||
80032e8: 7bfb ldrb r3, [r7, #15]
|
||
80032ea: 2b00 cmp r3, #0
|
||
80032ec: d11f bne.n 800332e <dir_alloc+0x7e>
|
||
if (dp->dir[0] == DDEM || dp->dir[0] == 0) { /* Is it a free entry? */
|
||
80032ee: 687b ldr r3, [r7, #4]
|
||
80032f0: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
80032f4: 781b ldrb r3, [r3, #0]
|
||
80032f6: 2be5 cmp r3, #229 ; 0xe5
|
||
80032f8: d005 beq.n 8003306 <dir_alloc+0x56>
|
||
80032fa: 687b ldr r3, [r7, #4]
|
||
80032fc: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8003300: 781b ldrb r3, [r3, #0]
|
||
8003302: 2b00 cmp r3, #0
|
||
8003304: d107 bne.n 8003316 <dir_alloc+0x66>
|
||
if (++n == nent) break; /* A block of contiguous free entries is found */
|
||
8003306: 68bb ldr r3, [r7, #8]
|
||
8003308: 3301 adds r3, #1
|
||
800330a: 60bb str r3, [r7, #8]
|
||
800330c: 68ba ldr r2, [r7, #8]
|
||
800330e: 683b ldr r3, [r7, #0]
|
||
8003310: 429a cmp r2, r3
|
||
8003312: d102 bne.n 800331a <dir_alloc+0x6a>
|
||
8003314: e00c b.n 8003330 <dir_alloc+0x80>
|
||
} else {
|
||
n = 0; /* Not a blank entry. Restart to search */
|
||
8003316: 2300 movs r3, #0
|
||
8003318: 60bb str r3, [r7, #8]
|
||
}
|
||
res = dir_next(dp, 1); /* Next entry with table stretch enabled */
|
||
800331a: 2101 movs r1, #1
|
||
800331c: 6878 ldr r0, [r7, #4]
|
||
800331e: f7ff fed0 bl 80030c2 <dir_next>
|
||
8003322: 4603 mov r3, r0
|
||
8003324: 73fb strb r3, [r7, #15]
|
||
} while (res == FR_OK);
|
||
8003326: 7bfb ldrb r3, [r7, #15]
|
||
8003328: 2b00 cmp r3, #0
|
||
800332a: d0d1 beq.n 80032d0 <dir_alloc+0x20>
|
||
800332c: e000 b.n 8003330 <dir_alloc+0x80>
|
||
if (res != FR_OK) break;
|
||
800332e: bf00 nop
|
||
}
|
||
if (res == FR_NO_FILE) res = FR_DENIED; /* No directory entry to allocate */
|
||
8003330: 7bfb ldrb r3, [r7, #15]
|
||
8003332: 2b04 cmp r3, #4
|
||
8003334: d101 bne.n 800333a <dir_alloc+0x8a>
|
||
8003336: 2307 movs r3, #7
|
||
8003338: 73fb strb r3, [r7, #15]
|
||
return res;
|
||
800333a: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
800333c: 4618 mov r0, r3
|
||
800333e: 3710 adds r7, #16
|
||
8003340: 46bd mov sp, r7
|
||
8003342: bd80 pop {r7, pc}
|
||
|
||
08003344 <ld_clust>:
|
||
static
|
||
DWORD ld_clust (
|
||
FATFS* fs, /* Pointer to the fs object */
|
||
BYTE* dir /* Pointer to the directory entry */
|
||
)
|
||
{
|
||
8003344: b480 push {r7}
|
||
8003346: b085 sub sp, #20
|
||
8003348: af00 add r7, sp, #0
|
||
800334a: 6078 str r0, [r7, #4]
|
||
800334c: 6039 str r1, [r7, #0]
|
||
DWORD cl;
|
||
|
||
cl = LD_WORD(dir + DIR_FstClusLO);
|
||
800334e: 683b ldr r3, [r7, #0]
|
||
8003350: 331b adds r3, #27
|
||
8003352: 781b ldrb r3, [r3, #0]
|
||
8003354: 021b lsls r3, r3, #8
|
||
8003356: b21a sxth r2, r3
|
||
8003358: 683b ldr r3, [r7, #0]
|
||
800335a: 331a adds r3, #26
|
||
800335c: 781b ldrb r3, [r3, #0]
|
||
800335e: b21b sxth r3, r3
|
||
8003360: 4313 orrs r3, r2
|
||
8003362: b21b sxth r3, r3
|
||
8003364: b29b uxth r3, r3
|
||
8003366: 60fb str r3, [r7, #12]
|
||
if (fs->fs_type == FS_FAT32)
|
||
8003368: 687b ldr r3, [r7, #4]
|
||
800336a: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
800336e: 2b03 cmp r3, #3
|
||
8003370: d10f bne.n 8003392 <ld_clust+0x4e>
|
||
cl |= (DWORD)LD_WORD(dir + DIR_FstClusHI) << 16;
|
||
8003372: 683b ldr r3, [r7, #0]
|
||
8003374: 3315 adds r3, #21
|
||
8003376: 781b ldrb r3, [r3, #0]
|
||
8003378: 021b lsls r3, r3, #8
|
||
800337a: b21a sxth r2, r3
|
||
800337c: 683b ldr r3, [r7, #0]
|
||
800337e: 3314 adds r3, #20
|
||
8003380: 781b ldrb r3, [r3, #0]
|
||
8003382: b21b sxth r3, r3
|
||
8003384: 4313 orrs r3, r2
|
||
8003386: b21b sxth r3, r3
|
||
8003388: b29b uxth r3, r3
|
||
800338a: 041b lsls r3, r3, #16
|
||
800338c: 68fa ldr r2, [r7, #12]
|
||
800338e: 4313 orrs r3, r2
|
||
8003390: 60fb str r3, [r7, #12]
|
||
|
||
return cl;
|
||
8003392: 68fb ldr r3, [r7, #12]
|
||
}
|
||
8003394: 4618 mov r0, r3
|
||
8003396: 3714 adds r7, #20
|
||
8003398: 46bd mov sp, r7
|
||
800339a: bc80 pop {r7}
|
||
800339c: 4770 bx lr
|
||
|
||
0800339e <st_clust>:
|
||
static
|
||
void st_clust (
|
||
BYTE* dir, /* Pointer to the directory entry */
|
||
DWORD cl /* Value to be set */
|
||
)
|
||
{
|
||
800339e: b480 push {r7}
|
||
80033a0: b083 sub sp, #12
|
||
80033a2: af00 add r7, sp, #0
|
||
80033a4: 6078 str r0, [r7, #4]
|
||
80033a6: 6039 str r1, [r7, #0]
|
||
ST_WORD(dir + DIR_FstClusLO, cl);
|
||
80033a8: 687b ldr r3, [r7, #4]
|
||
80033aa: 331a adds r3, #26
|
||
80033ac: 683a ldr r2, [r7, #0]
|
||
80033ae: b2d2 uxtb r2, r2
|
||
80033b0: 701a strb r2, [r3, #0]
|
||
80033b2: 683b ldr r3, [r7, #0]
|
||
80033b4: b29b uxth r3, r3
|
||
80033b6: 0a1b lsrs r3, r3, #8
|
||
80033b8: b29a uxth r2, r3
|
||
80033ba: 687b ldr r3, [r7, #4]
|
||
80033bc: 331b adds r3, #27
|
||
80033be: b2d2 uxtb r2, r2
|
||
80033c0: 701a strb r2, [r3, #0]
|
||
ST_WORD(dir + DIR_FstClusHI, cl >> 16);
|
||
80033c2: 683b ldr r3, [r7, #0]
|
||
80033c4: 0c1a lsrs r2, r3, #16
|
||
80033c6: 687b ldr r3, [r7, #4]
|
||
80033c8: 3314 adds r3, #20
|
||
80033ca: b2d2 uxtb r2, r2
|
||
80033cc: 701a strb r2, [r3, #0]
|
||
80033ce: 683b ldr r3, [r7, #0]
|
||
80033d0: 0c1b lsrs r3, r3, #16
|
||
80033d2: b29b uxth r3, r3
|
||
80033d4: 0a1b lsrs r3, r3, #8
|
||
80033d6: b29a uxth r2, r3
|
||
80033d8: 687b ldr r3, [r7, #4]
|
||
80033da: 3315 adds r3, #21
|
||
80033dc: b2d2 uxtb r2, r2
|
||
80033de: 701a strb r2, [r3, #0]
|
||
}
|
||
80033e0: bf00 nop
|
||
80033e2: 370c adds r7, #12
|
||
80033e4: 46bd mov sp, r7
|
||
80033e6: bc80 pop {r7}
|
||
80033e8: 4770 bx lr
|
||
|
||
080033ea <dir_find>:
|
||
|
||
static
|
||
FRESULT dir_find (
|
||
DIR* dp /* Pointer to the directory object linked to the file name */
|
||
)
|
||
{
|
||
80033ea: b580 push {r7, lr}
|
||
80033ec: b086 sub sp, #24
|
||
80033ee: af00 add r7, sp, #0
|
||
80033f0: 6078 str r0, [r7, #4]
|
||
BYTE c, *dir;
|
||
#if _USE_LFN
|
||
BYTE a, ord, sum;
|
||
#endif
|
||
|
||
res = dir_sdi(dp, 0); /* Rewind directory object */
|
||
80033f2: 2100 movs r1, #0
|
||
80033f4: 6878 ldr r0, [r7, #4]
|
||
80033f6: f7ff fdd0 bl 8002f9a <dir_sdi>
|
||
80033fa: 4603 mov r3, r0
|
||
80033fc: 75fb strb r3, [r7, #23]
|
||
if (res != FR_OK) return res;
|
||
80033fe: 7dfb ldrb r3, [r7, #23]
|
||
8003400: 2b00 cmp r3, #0
|
||
8003402: d001 beq.n 8003408 <dir_find+0x1e>
|
||
8003404: 7dfb ldrb r3, [r7, #23]
|
||
8003406: e03b b.n 8003480 <dir_find+0x96>
|
||
|
||
#if _USE_LFN
|
||
ord = sum = 0xFF; dp->lfn_idx = 0xFFFF; /* Reset LFN sequence */
|
||
#endif
|
||
do {
|
||
res = move_window(dp->fs, dp->sect);
|
||
8003408: 687b ldr r3, [r7, #4]
|
||
800340a: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
800340e: 687b ldr r3, [r7, #4]
|
||
8003410: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8003414: 4619 mov r1, r3
|
||
8003416: 4610 mov r0, r2
|
||
8003418: f7ff fa7d bl 8002916 <move_window>
|
||
800341c: 4603 mov r3, r0
|
||
800341e: 75fb strb r3, [r7, #23]
|
||
if (res != FR_OK) break;
|
||
8003420: 7dfb ldrb r3, [r7, #23]
|
||
8003422: 2b00 cmp r3, #0
|
||
8003424: d128 bne.n 8003478 <dir_find+0x8e>
|
||
dir = dp->dir; /* Ptr to the directory entry of current index */
|
||
8003426: 687b ldr r3, [r7, #4]
|
||
8003428: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
800342c: 613b str r3, [r7, #16]
|
||
c = dir[DIR_Name];
|
||
800342e: 693b ldr r3, [r7, #16]
|
||
8003430: 781b ldrb r3, [r3, #0]
|
||
8003432: 73fb strb r3, [r7, #15]
|
||
if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */
|
||
8003434: 7bfb ldrb r3, [r7, #15]
|
||
8003436: 2b00 cmp r3, #0
|
||
8003438: d102 bne.n 8003440 <dir_find+0x56>
|
||
800343a: 2304 movs r3, #4
|
||
800343c: 75fb strb r3, [r7, #23]
|
||
800343e: e01e b.n 800347e <dir_find+0x94>
|
||
if (!(dp->fn[NSFLAG] & NS_LOSS) && !mem_cmp(dir, dp->fn, 11)) break; /* SFN matched? */
|
||
ord = 0xFF; dp->lfn_idx = 0xFFFF; /* Reset LFN sequence */
|
||
}
|
||
}
|
||
#else /* Non LFN configuration */
|
||
if (!(dir[DIR_Attr] & AM_VOL) && !mem_cmp(dir, dp->fn, 11)) /* Is it a valid entry? */
|
||
8003440: 693b ldr r3, [r7, #16]
|
||
8003442: 330b adds r3, #11
|
||
8003444: 781b ldrb r3, [r3, #0]
|
||
8003446: f003 0308 and.w r3, r3, #8
|
||
800344a: 2b00 cmp r3, #0
|
||
800344c: d10a bne.n 8003464 <dir_find+0x7a>
|
||
800344e: 687b ldr r3, [r7, #4]
|
||
8003450: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
8003454: 220b movs r2, #11
|
||
8003456: 4619 mov r1, r3
|
||
8003458: 6938 ldr r0, [r7, #16]
|
||
800345a: f7ff f863 bl 8002524 <mem_cmp>
|
||
800345e: 4603 mov r3, r0
|
||
8003460: 2b00 cmp r3, #0
|
||
8003462: d00b beq.n 800347c <dir_find+0x92>
|
||
break;
|
||
#endif
|
||
res = dir_next(dp, 0); /* Next entry */
|
||
8003464: 2100 movs r1, #0
|
||
8003466: 6878 ldr r0, [r7, #4]
|
||
8003468: f7ff fe2b bl 80030c2 <dir_next>
|
||
800346c: 4603 mov r3, r0
|
||
800346e: 75fb strb r3, [r7, #23]
|
||
} while (res == FR_OK);
|
||
8003470: 7dfb ldrb r3, [r7, #23]
|
||
8003472: 2b00 cmp r3, #0
|
||
8003474: d0c8 beq.n 8003408 <dir_find+0x1e>
|
||
8003476: e002 b.n 800347e <dir_find+0x94>
|
||
if (res != FR_OK) break;
|
||
8003478: bf00 nop
|
||
800347a: e000 b.n 800347e <dir_find+0x94>
|
||
break;
|
||
800347c: bf00 nop
|
||
|
||
return res;
|
||
800347e: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
8003480: 4618 mov r0, r3
|
||
8003482: 3718 adds r7, #24
|
||
8003484: 46bd mov sp, r7
|
||
8003486: bd80 pop {r7, pc}
|
||
|
||
08003488 <dir_register>:
|
||
#if !_FS_READONLY
|
||
static
|
||
FRESULT dir_register ( /* FR_OK:Successful, FR_DENIED:No free entry or too many SFN collision, FR_DISK_ERR:Disk error */
|
||
DIR* dp /* Target directory with object name to be created */
|
||
)
|
||
{
|
||
8003488: b580 push {r7, lr}
|
||
800348a: b084 sub sp, #16
|
||
800348c: af00 add r7, sp, #0
|
||
800348e: 6078 str r0, [r7, #4]
|
||
res = dir_next(dp, 0); /* Next entry */
|
||
} while (res == FR_OK && --nent);
|
||
}
|
||
}
|
||
#else /* Non LFN configuration */
|
||
res = dir_alloc(dp, 1); /* Allocate an entry for SFN */
|
||
8003490: 2101 movs r1, #1
|
||
8003492: 6878 ldr r0, [r7, #4]
|
||
8003494: f7ff ff0c bl 80032b0 <dir_alloc>
|
||
8003498: 4603 mov r3, r0
|
||
800349a: 73fb strb r3, [r7, #15]
|
||
#endif
|
||
|
||
if (res == FR_OK) { /* Set SFN entry */
|
||
800349c: 7bfb ldrb r3, [r7, #15]
|
||
800349e: 2b00 cmp r3, #0
|
||
80034a0: d126 bne.n 80034f0 <dir_register+0x68>
|
||
res = move_window(dp->fs, dp->sect);
|
||
80034a2: 687b ldr r3, [r7, #4]
|
||
80034a4: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
80034a8: 687b ldr r3, [r7, #4]
|
||
80034aa: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
80034ae: 4619 mov r1, r3
|
||
80034b0: 4610 mov r0, r2
|
||
80034b2: f7ff fa30 bl 8002916 <move_window>
|
||
80034b6: 4603 mov r3, r0
|
||
80034b8: 73fb strb r3, [r7, #15]
|
||
if (res == FR_OK) {
|
||
80034ba: 7bfb ldrb r3, [r7, #15]
|
||
80034bc: 2b00 cmp r3, #0
|
||
80034be: d117 bne.n 80034f0 <dir_register+0x68>
|
||
mem_set(dp->dir, 0, SZ_DIRE); /* Clean the entry */
|
||
80034c0: 687b ldr r3, [r7, #4]
|
||
80034c2: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
80034c6: 2220 movs r2, #32
|
||
80034c8: 2100 movs r1, #0
|
||
80034ca: 4618 mov r0, r3
|
||
80034cc: f7ff f810 bl 80024f0 <mem_set>
|
||
mem_cpy(dp->dir, dp->fn, 11); /* Put SFN */
|
||
80034d0: 687b ldr r3, [r7, #4]
|
||
80034d2: f8d3 0214 ldr.w r0, [r3, #532] ; 0x214
|
||
80034d6: 687b ldr r3, [r7, #4]
|
||
80034d8: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
80034dc: 220b movs r2, #11
|
||
80034de: 4619 mov r1, r3
|
||
80034e0: f7fe ffe8 bl 80024b4 <mem_cpy>
|
||
#if _USE_LFN
|
||
dp->dir[DIR_NTres] = dp->fn[NSFLAG] & (NS_BODY | NS_EXT); /* Put NT flag */
|
||
#endif
|
||
dp->fs->wflag = 1;
|
||
80034e4: 687b ldr r3, [r7, #4]
|
||
80034e6: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80034ea: 2201 movs r2, #1
|
||
80034ec: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
}
|
||
}
|
||
|
||
return res;
|
||
80034f0: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
80034f2: 4618 mov r0, r3
|
||
80034f4: 3710 adds r7, #16
|
||
80034f6: 46bd mov sp, r7
|
||
80034f8: bd80 pop {r7, pc}
|
||
...
|
||
|
||
080034fc <create_name>:
|
||
static
|
||
FRESULT create_name (
|
||
DIR* dp, /* Pointer to the directory object */
|
||
const TCHAR** path /* Pointer to pointer to the segment in the path string */
|
||
)
|
||
{
|
||
80034fc: b580 push {r7, lr}
|
||
80034fe: b088 sub sp, #32
|
||
8003500: af00 add r7, sp, #0
|
||
8003502: 6078 str r0, [r7, #4]
|
||
8003504: 6039 str r1, [r7, #0]
|
||
BYTE b, c, d, *sfn;
|
||
UINT ni, si, i;
|
||
const char *p;
|
||
|
||
/* Create file name in directory form */
|
||
for (p = *path; *p == '/' || *p == '\\'; p++) ; /* Strip duplicated separator */
|
||
8003506: 683b ldr r3, [r7, #0]
|
||
8003508: 681b ldr r3, [r3, #0]
|
||
800350a: 60fb str r3, [r7, #12]
|
||
800350c: e002 b.n 8003514 <create_name+0x18>
|
||
800350e: 68fb ldr r3, [r7, #12]
|
||
8003510: 3301 adds r3, #1
|
||
8003512: 60fb str r3, [r7, #12]
|
||
8003514: 68fb ldr r3, [r7, #12]
|
||
8003516: 781b ldrb r3, [r3, #0]
|
||
8003518: 2b2f cmp r3, #47 ; 0x2f
|
||
800351a: d0f8 beq.n 800350e <create_name+0x12>
|
||
800351c: 68fb ldr r3, [r7, #12]
|
||
800351e: 781b ldrb r3, [r3, #0]
|
||
8003520: 2b5c cmp r3, #92 ; 0x5c
|
||
8003522: d0f4 beq.n 800350e <create_name+0x12>
|
||
sfn = dp->fn;
|
||
8003524: 687b ldr r3, [r7, #4]
|
||
8003526: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
800352a: 60bb str r3, [r7, #8]
|
||
mem_set(sfn, ' ', 11);
|
||
800352c: 220b movs r2, #11
|
||
800352e: 2120 movs r1, #32
|
||
8003530: 68b8 ldr r0, [r7, #8]
|
||
8003532: f7fe ffdd bl 80024f0 <mem_set>
|
||
si = i = b = 0; ni = 8;
|
||
8003536: 2300 movs r3, #0
|
||
8003538: 77fb strb r3, [r7, #31]
|
||
800353a: 2300 movs r3, #0
|
||
800353c: 613b str r3, [r7, #16]
|
||
800353e: 693b ldr r3, [r7, #16]
|
||
8003540: 617b str r3, [r7, #20]
|
||
8003542: 2308 movs r3, #8
|
||
8003544: 61bb str r3, [r7, #24]
|
||
sfn[NSFLAG] = (c <= ' ') ? NS_LAST | NS_DOT : NS_DOT; /* Set last segment flag if end of path */
|
||
return FR_OK;
|
||
}
|
||
#endif
|
||
for (;;) {
|
||
c = (BYTE)p[si++];
|
||
8003546: 697b ldr r3, [r7, #20]
|
||
8003548: 1c5a adds r2, r3, #1
|
||
800354a: 617a str r2, [r7, #20]
|
||
800354c: 68fa ldr r2, [r7, #12]
|
||
800354e: 4413 add r3, r2
|
||
8003550: 781b ldrb r3, [r3, #0]
|
||
8003552: 77bb strb r3, [r7, #30]
|
||
if (c <= ' ' || c == '/' || c == '\\') break; /* Break on end of segment */
|
||
8003554: 7fbb ldrb r3, [r7, #30]
|
||
8003556: 2b20 cmp r3, #32
|
||
8003558: d953 bls.n 8003602 <create_name+0x106>
|
||
800355a: 7fbb ldrb r3, [r7, #30]
|
||
800355c: 2b2f cmp r3, #47 ; 0x2f
|
||
800355e: d050 beq.n 8003602 <create_name+0x106>
|
||
8003560: 7fbb ldrb r3, [r7, #30]
|
||
8003562: 2b5c cmp r3, #92 ; 0x5c
|
||
8003564: d04d beq.n 8003602 <create_name+0x106>
|
||
if (c == '.' || i >= ni) {
|
||
8003566: 7fbb ldrb r3, [r7, #30]
|
||
8003568: 2b2e cmp r3, #46 ; 0x2e
|
||
800356a: d003 beq.n 8003574 <create_name+0x78>
|
||
800356c: 693a ldr r2, [r7, #16]
|
||
800356e: 69bb ldr r3, [r7, #24]
|
||
8003570: 429a cmp r2, r3
|
||
8003572: d30f bcc.n 8003594 <create_name+0x98>
|
||
if (ni != 8 || c != '.') return FR_INVALID_NAME;
|
||
8003574: 69bb ldr r3, [r7, #24]
|
||
8003576: 2b08 cmp r3, #8
|
||
8003578: d102 bne.n 8003580 <create_name+0x84>
|
||
800357a: 7fbb ldrb r3, [r7, #30]
|
||
800357c: 2b2e cmp r3, #46 ; 0x2e
|
||
800357e: d001 beq.n 8003584 <create_name+0x88>
|
||
8003580: 2306 movs r3, #6
|
||
8003582: e073 b.n 800366c <create_name+0x170>
|
||
i = 8; ni = 11;
|
||
8003584: 2308 movs r3, #8
|
||
8003586: 613b str r3, [r7, #16]
|
||
8003588: 230b movs r3, #11
|
||
800358a: 61bb str r3, [r7, #24]
|
||
b <<= 2; continue;
|
||
800358c: 7ffb ldrb r3, [r7, #31]
|
||
800358e: 009b lsls r3, r3, #2
|
||
8003590: 77fb strb r3, [r7, #31]
|
||
8003592: e035 b.n 8003600 <create_name+0x104>
|
||
}
|
||
if (c >= 0x80) { /* Extended character? */
|
||
8003594: f997 301e ldrsb.w r3, [r7, #30]
|
||
8003598: 2b00 cmp r3, #0
|
||
800359a: da08 bge.n 80035ae <create_name+0xb2>
|
||
b |= 3; /* Eliminate NT flag */
|
||
800359c: 7ffb ldrb r3, [r7, #31]
|
||
800359e: f043 0303 orr.w r3, r3, #3
|
||
80035a2: 77fb strb r3, [r7, #31]
|
||
#ifdef _EXCVT
|
||
c = ExCvt[c - 0x80]; /* To upper extended characters (SBCS cfg) */
|
||
80035a4: 7fbb ldrb r3, [r7, #30]
|
||
80035a6: 3b80 subs r3, #128 ; 0x80
|
||
80035a8: 4a32 ldr r2, [pc, #200] ; (8003674 <create_name+0x178>)
|
||
80035aa: 5cd3 ldrb r3, [r2, r3]
|
||
80035ac: 77bb strb r3, [r7, #30]
|
||
if (!IsDBCS2(d) || i >= ni - 1) /* Reject invalid DBC */
|
||
return FR_INVALID_NAME;
|
||
sfn[i++] = c;
|
||
sfn[i++] = d;
|
||
} else { /* SBC */
|
||
if (chk_chr("\"*+,:;<=>\?[]|\x7F", c)) /* Reject illegal chrs for SFN */
|
||
80035ae: 7fbb ldrb r3, [r7, #30]
|
||
80035b0: 4619 mov r1, r3
|
||
80035b2: 4831 ldr r0, [pc, #196] ; (8003678 <create_name+0x17c>)
|
||
80035b4: f7fe ffdc bl 8002570 <chk_chr>
|
||
80035b8: 4603 mov r3, r0
|
||
80035ba: 2b00 cmp r3, #0
|
||
80035bc: d001 beq.n 80035c2 <create_name+0xc6>
|
||
return FR_INVALID_NAME;
|
||
80035be: 2306 movs r3, #6
|
||
80035c0: e054 b.n 800366c <create_name+0x170>
|
||
if (IsUpper(c)) { /* ASCII large capital? */
|
||
80035c2: 7fbb ldrb r3, [r7, #30]
|
||
80035c4: 2b40 cmp r3, #64 ; 0x40
|
||
80035c6: d907 bls.n 80035d8 <create_name+0xdc>
|
||
80035c8: 7fbb ldrb r3, [r7, #30]
|
||
80035ca: 2b5a cmp r3, #90 ; 0x5a
|
||
80035cc: d804 bhi.n 80035d8 <create_name+0xdc>
|
||
b |= 2;
|
||
80035ce: 7ffb ldrb r3, [r7, #31]
|
||
80035d0: f043 0302 orr.w r3, r3, #2
|
||
80035d4: 77fb strb r3, [r7, #31]
|
||
80035d6: e00c b.n 80035f2 <create_name+0xf6>
|
||
} else {
|
||
if (IsLower(c)) { /* ASCII small capital? */
|
||
80035d8: 7fbb ldrb r3, [r7, #30]
|
||
80035da: 2b60 cmp r3, #96 ; 0x60
|
||
80035dc: d909 bls.n 80035f2 <create_name+0xf6>
|
||
80035de: 7fbb ldrb r3, [r7, #30]
|
||
80035e0: 2b7a cmp r3, #122 ; 0x7a
|
||
80035e2: d806 bhi.n 80035f2 <create_name+0xf6>
|
||
b |= 1; c -= 0x20;
|
||
80035e4: 7ffb ldrb r3, [r7, #31]
|
||
80035e6: f043 0301 orr.w r3, r3, #1
|
||
80035ea: 77fb strb r3, [r7, #31]
|
||
80035ec: 7fbb ldrb r3, [r7, #30]
|
||
80035ee: 3b20 subs r3, #32
|
||
80035f0: 77bb strb r3, [r7, #30]
|
||
}
|
||
}
|
||
sfn[i++] = c;
|
||
80035f2: 693b ldr r3, [r7, #16]
|
||
80035f4: 1c5a adds r2, r3, #1
|
||
80035f6: 613a str r2, [r7, #16]
|
||
80035f8: 68ba ldr r2, [r7, #8]
|
||
80035fa: 4413 add r3, r2
|
||
80035fc: 7fba ldrb r2, [r7, #30]
|
||
80035fe: 701a strb r2, [r3, #0]
|
||
c = (BYTE)p[si++];
|
||
8003600: e7a1 b.n 8003546 <create_name+0x4a>
|
||
}
|
||
}
|
||
*path = &p[si]; /* Return pointer to the next segment */
|
||
8003602: 68fa ldr r2, [r7, #12]
|
||
8003604: 697b ldr r3, [r7, #20]
|
||
8003606: 441a add r2, r3
|
||
8003608: 683b ldr r3, [r7, #0]
|
||
800360a: 601a str r2, [r3, #0]
|
||
c = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of path */
|
||
800360c: 7fbb ldrb r3, [r7, #30]
|
||
800360e: 2b20 cmp r3, #32
|
||
8003610: d801 bhi.n 8003616 <create_name+0x11a>
|
||
8003612: 2304 movs r3, #4
|
||
8003614: e000 b.n 8003618 <create_name+0x11c>
|
||
8003616: 2300 movs r3, #0
|
||
8003618: 77bb strb r3, [r7, #30]
|
||
|
||
if (!i) return FR_INVALID_NAME; /* Reject nul string */
|
||
800361a: 693b ldr r3, [r7, #16]
|
||
800361c: 2b00 cmp r3, #0
|
||
800361e: d101 bne.n 8003624 <create_name+0x128>
|
||
8003620: 2306 movs r3, #6
|
||
8003622: e023 b.n 800366c <create_name+0x170>
|
||
if (sfn[0] == DDEM) sfn[0] = RDDEM; /* When first character collides with DDEM, replace it with RDDEM */
|
||
8003624: 68bb ldr r3, [r7, #8]
|
||
8003626: 781b ldrb r3, [r3, #0]
|
||
8003628: 2be5 cmp r3, #229 ; 0xe5
|
||
800362a: d102 bne.n 8003632 <create_name+0x136>
|
||
800362c: 68bb ldr r3, [r7, #8]
|
||
800362e: 2205 movs r2, #5
|
||
8003630: 701a strb r2, [r3, #0]
|
||
|
||
if (ni == 8) b <<= 2;
|
||
8003632: 69bb ldr r3, [r7, #24]
|
||
8003634: 2b08 cmp r3, #8
|
||
8003636: d102 bne.n 800363e <create_name+0x142>
|
||
8003638: 7ffb ldrb r3, [r7, #31]
|
||
800363a: 009b lsls r3, r3, #2
|
||
800363c: 77fb strb r3, [r7, #31]
|
||
if ((b & 0x03) == 0x01) c |= NS_EXT; /* NT flag (Name extension has only small capital) */
|
||
800363e: 7ffb ldrb r3, [r7, #31]
|
||
8003640: f003 0303 and.w r3, r3, #3
|
||
8003644: 2b01 cmp r3, #1
|
||
8003646: d103 bne.n 8003650 <create_name+0x154>
|
||
8003648: 7fbb ldrb r3, [r7, #30]
|
||
800364a: f043 0310 orr.w r3, r3, #16
|
||
800364e: 77bb strb r3, [r7, #30]
|
||
if ((b & 0x0C) == 0x04) c |= NS_BODY; /* NT flag (Name body has only small capital) */
|
||
8003650: 7ffb ldrb r3, [r7, #31]
|
||
8003652: f003 030c and.w r3, r3, #12
|
||
8003656: 2b04 cmp r3, #4
|
||
8003658: d103 bne.n 8003662 <create_name+0x166>
|
||
800365a: 7fbb ldrb r3, [r7, #30]
|
||
800365c: f043 0308 orr.w r3, r3, #8
|
||
8003660: 77bb strb r3, [r7, #30]
|
||
|
||
sfn[NSFLAG] = c; /* Store NT flag, File name is created */
|
||
8003662: 68bb ldr r3, [r7, #8]
|
||
8003664: 330b adds r3, #11
|
||
8003666: 7fba ldrb r2, [r7, #30]
|
||
8003668: 701a strb r2, [r3, #0]
|
||
|
||
return FR_OK;
|
||
800366a: 2300 movs r3, #0
|
||
#endif
|
||
}
|
||
800366c: 4618 mov r0, r3
|
||
800366e: 3720 adds r7, #32
|
||
8003670: 46bd mov sp, r7
|
||
8003672: bd80 pop {r7, pc}
|
||
8003674: 08005fc8 .word 0x08005fc8
|
||
8003678: 08005f5c .word 0x08005f5c
|
||
|
||
0800367c <follow_path>:
|
||
static
|
||
FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */
|
||
DIR* dp, /* Directory object to return last directory and found object */
|
||
const TCHAR* path /* Full-path string to find a file or directory */
|
||
)
|
||
{
|
||
800367c: b580 push {r7, lr}
|
||
800367e: b084 sub sp, #16
|
||
8003680: af00 add r7, sp, #0
|
||
8003682: 6078 str r0, [r7, #4]
|
||
8003684: 6039 str r1, [r7, #0]
|
||
path++; dp->sclust = 0; /* Strip it and start from the root directory */
|
||
} else { /* No heading separator */
|
||
dp->sclust = dp->fs->cdir; /* Start from the current directory */
|
||
}
|
||
#else
|
||
if (*path == '/' || *path == '\\') /* Strip heading separator if exist */
|
||
8003686: 683b ldr r3, [r7, #0]
|
||
8003688: 781b ldrb r3, [r3, #0]
|
||
800368a: 2b2f cmp r3, #47 ; 0x2f
|
||
800368c: d003 beq.n 8003696 <follow_path+0x1a>
|
||
800368e: 683b ldr r3, [r7, #0]
|
||
8003690: 781b ldrb r3, [r3, #0]
|
||
8003692: 2b5c cmp r3, #92 ; 0x5c
|
||
8003694: d102 bne.n 800369c <follow_path+0x20>
|
||
path++;
|
||
8003696: 683b ldr r3, [r7, #0]
|
||
8003698: 3301 adds r3, #1
|
||
800369a: 603b str r3, [r7, #0]
|
||
dp->sclust = 0; /* Always start from the root directory */
|
||
800369c: 687b ldr r3, [r7, #4]
|
||
800369e: 2200 movs r2, #0
|
||
80036a0: f8c3 2208 str.w r2, [r3, #520] ; 0x208
|
||
#endif
|
||
|
||
if ((UINT)*path < ' ') { /* Null path name is the origin directory itself */
|
||
80036a4: 683b ldr r3, [r7, #0]
|
||
80036a6: 781b ldrb r3, [r3, #0]
|
||
80036a8: 2b1f cmp r3, #31
|
||
80036aa: d80a bhi.n 80036c2 <follow_path+0x46>
|
||
res = dir_sdi(dp, 0);
|
||
80036ac: 2100 movs r1, #0
|
||
80036ae: 6878 ldr r0, [r7, #4]
|
||
80036b0: f7ff fc73 bl 8002f9a <dir_sdi>
|
||
80036b4: 4603 mov r3, r0
|
||
80036b6: 73fb strb r3, [r7, #15]
|
||
dp->dir = 0;
|
||
80036b8: 687b ldr r3, [r7, #4]
|
||
80036ba: 2200 movs r2, #0
|
||
80036bc: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
||
80036c0: e045 b.n 800374e <follow_path+0xd2>
|
||
} else { /* Follow path */
|
||
for (;;) {
|
||
res = create_name(dp, &path); /* Get a segment name of the path */
|
||
80036c2: 463b mov r3, r7
|
||
80036c4: 4619 mov r1, r3
|
||
80036c6: 6878 ldr r0, [r7, #4]
|
||
80036c8: f7ff ff18 bl 80034fc <create_name>
|
||
80036cc: 4603 mov r3, r0
|
||
80036ce: 73fb strb r3, [r7, #15]
|
||
if (res != FR_OK) break;
|
||
80036d0: 7bfb ldrb r3, [r7, #15]
|
||
80036d2: 2b00 cmp r3, #0
|
||
80036d4: d136 bne.n 8003744 <follow_path+0xc8>
|
||
res = dir_find(dp); /* Find an object with the sagment name */
|
||
80036d6: 6878 ldr r0, [r7, #4]
|
||
80036d8: f7ff fe87 bl 80033ea <dir_find>
|
||
80036dc: 4603 mov r3, r0
|
||
80036de: 73fb strb r3, [r7, #15]
|
||
ns = dp->fn[NSFLAG];
|
||
80036e0: 687b ldr r3, [r7, #4]
|
||
80036e2: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
80036e6: 7adb ldrb r3, [r3, #11]
|
||
80036e8: 73bb strb r3, [r7, #14]
|
||
if (res != FR_OK) { /* Failed to find the object */
|
||
80036ea: 7bfb ldrb r3, [r7, #15]
|
||
80036ec: 2b00 cmp r3, #0
|
||
80036ee: d00a beq.n 8003706 <follow_path+0x8a>
|
||
if (res == FR_NO_FILE) { /* Object is not found */
|
||
80036f0: 7bfb ldrb r3, [r7, #15]
|
||
80036f2: 2b04 cmp r3, #4
|
||
80036f4: d128 bne.n 8003748 <follow_path+0xcc>
|
||
if (_FS_RPATH && (ns & NS_DOT)) { /* If dot entry is not exist, */
|
||
dp->sclust = 0; dp->dir = 0; /* it is the root directory and stay there */
|
||
if (!(ns & NS_LAST)) continue; /* Continue to follow if not last segment */
|
||
res = FR_OK; /* Ended at the root directroy. Function completed. */
|
||
} else { /* Could not find the object */
|
||
if (!(ns & NS_LAST)) res = FR_NO_PATH; /* Adjust error code if not last segment */
|
||
80036f6: 7bbb ldrb r3, [r7, #14]
|
||
80036f8: f003 0304 and.w r3, r3, #4
|
||
80036fc: 2b00 cmp r3, #0
|
||
80036fe: d123 bne.n 8003748 <follow_path+0xcc>
|
||
8003700: 2305 movs r3, #5
|
||
8003702: 73fb strb r3, [r7, #15]
|
||
}
|
||
}
|
||
break;
|
||
8003704: e020 b.n 8003748 <follow_path+0xcc>
|
||
}
|
||
if (ns & NS_LAST) break; /* Last segment matched. Function completed. */
|
||
8003706: 7bbb ldrb r3, [r7, #14]
|
||
8003708: f003 0304 and.w r3, r3, #4
|
||
800370c: 2b00 cmp r3, #0
|
||
800370e: d11d bne.n 800374c <follow_path+0xd0>
|
||
dir = dp->dir; /* Follow the sub-directory */
|
||
8003710: 687b ldr r3, [r7, #4]
|
||
8003712: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8003716: 60bb str r3, [r7, #8]
|
||
if (!(dir[DIR_Attr] & AM_DIR)) { /* It is not a sub-directory and cannot follow */
|
||
8003718: 68bb ldr r3, [r7, #8]
|
||
800371a: 330b adds r3, #11
|
||
800371c: 781b ldrb r3, [r3, #0]
|
||
800371e: f003 0310 and.w r3, r3, #16
|
||
8003722: 2b00 cmp r3, #0
|
||
8003724: d102 bne.n 800372c <follow_path+0xb0>
|
||
res = FR_NO_PATH; break;
|
||
8003726: 2305 movs r3, #5
|
||
8003728: 73fb strb r3, [r7, #15]
|
||
800372a: e010 b.n 800374e <follow_path+0xd2>
|
||
}
|
||
dp->sclust = ld_clust(dp->fs, dir);
|
||
800372c: 687b ldr r3, [r7, #4]
|
||
800372e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003732: 68b9 ldr r1, [r7, #8]
|
||
8003734: 4618 mov r0, r3
|
||
8003736: f7ff fe05 bl 8003344 <ld_clust>
|
||
800373a: 4602 mov r2, r0
|
||
800373c: 687b ldr r3, [r7, #4]
|
||
800373e: f8c3 2208 str.w r2, [r3, #520] ; 0x208
|
||
res = create_name(dp, &path); /* Get a segment name of the path */
|
||
8003742: e7be b.n 80036c2 <follow_path+0x46>
|
||
if (res != FR_OK) break;
|
||
8003744: bf00 nop
|
||
8003746: e002 b.n 800374e <follow_path+0xd2>
|
||
break;
|
||
8003748: bf00 nop
|
||
800374a: e000 b.n 800374e <follow_path+0xd2>
|
||
if (ns & NS_LAST) break; /* Last segment matched. Function completed. */
|
||
800374c: bf00 nop
|
||
}
|
||
}
|
||
|
||
return res;
|
||
800374e: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8003750: 4618 mov r0, r3
|
||
8003752: 3710 adds r7, #16
|
||
8003754: 46bd mov sp, r7
|
||
8003756: bd80 pop {r7, pc}
|
||
|
||
08003758 <get_ldnumber>:
|
||
|
||
static
|
||
int get_ldnumber ( /* Returns logical drive number (-1:invalid drive) */
|
||
const TCHAR** path /* Pointer to pointer to the path name */
|
||
)
|
||
{
|
||
8003758: b480 push {r7}
|
||
800375a: b087 sub sp, #28
|
||
800375c: af00 add r7, sp, #0
|
||
800375e: 6078 str r0, [r7, #4]
|
||
const TCHAR *tp, *tt;
|
||
UINT i;
|
||
int vol = -1;
|
||
8003760: f04f 33ff mov.w r3, #4294967295
|
||
8003764: 613b str r3, [r7, #16]
|
||
char c;
|
||
TCHAR tc;
|
||
#endif
|
||
|
||
|
||
if (*path) { /* If the pointer is not a null */
|
||
8003766: 687b ldr r3, [r7, #4]
|
||
8003768: 681b ldr r3, [r3, #0]
|
||
800376a: 2b00 cmp r3, #0
|
||
800376c: d031 beq.n 80037d2 <get_ldnumber+0x7a>
|
||
for (tt = *path; (UINT)*tt >= (_USE_LFN ? ' ' : '!') && *tt != ':'; tt++) ; /* Find ':' in the path */
|
||
800376e: 687b ldr r3, [r7, #4]
|
||
8003770: 681b ldr r3, [r3, #0]
|
||
8003772: 617b str r3, [r7, #20]
|
||
8003774: e002 b.n 800377c <get_ldnumber+0x24>
|
||
8003776: 697b ldr r3, [r7, #20]
|
||
8003778: 3301 adds r3, #1
|
||
800377a: 617b str r3, [r7, #20]
|
||
800377c: 697b ldr r3, [r7, #20]
|
||
800377e: 781b ldrb r3, [r3, #0]
|
||
8003780: 2b20 cmp r3, #32
|
||
8003782: d903 bls.n 800378c <get_ldnumber+0x34>
|
||
8003784: 697b ldr r3, [r7, #20]
|
||
8003786: 781b ldrb r3, [r3, #0]
|
||
8003788: 2b3a cmp r3, #58 ; 0x3a
|
||
800378a: d1f4 bne.n 8003776 <get_ldnumber+0x1e>
|
||
if (*tt == ':') { /* If a ':' is exist in the path name */
|
||
800378c: 697b ldr r3, [r7, #20]
|
||
800378e: 781b ldrb r3, [r3, #0]
|
||
8003790: 2b3a cmp r3, #58 ; 0x3a
|
||
8003792: d11c bne.n 80037ce <get_ldnumber+0x76>
|
||
tp = *path;
|
||
8003794: 687b ldr r3, [r7, #4]
|
||
8003796: 681b ldr r3, [r3, #0]
|
||
8003798: 60fb str r3, [r7, #12]
|
||
i = *tp++ - '0';
|
||
800379a: 68fb ldr r3, [r7, #12]
|
||
800379c: 1c5a adds r2, r3, #1
|
||
800379e: 60fa str r2, [r7, #12]
|
||
80037a0: 781b ldrb r3, [r3, #0]
|
||
80037a2: 3b30 subs r3, #48 ; 0x30
|
||
80037a4: 60bb str r3, [r7, #8]
|
||
if (i < 10 && tp == tt) { /* Is there a numeric drive id? */
|
||
80037a6: 68bb ldr r3, [r7, #8]
|
||
80037a8: 2b09 cmp r3, #9
|
||
80037aa: d80e bhi.n 80037ca <get_ldnumber+0x72>
|
||
80037ac: 68fa ldr r2, [r7, #12]
|
||
80037ae: 697b ldr r3, [r7, #20]
|
||
80037b0: 429a cmp r2, r3
|
||
80037b2: d10a bne.n 80037ca <get_ldnumber+0x72>
|
||
if (i < _VOLUMES) { /* If a drive id is found, get the value and strip it */
|
||
80037b4: 68bb ldr r3, [r7, #8]
|
||
80037b6: 2b00 cmp r3, #0
|
||
80037b8: d107 bne.n 80037ca <get_ldnumber+0x72>
|
||
vol = (int)i;
|
||
80037ba: 68bb ldr r3, [r7, #8]
|
||
80037bc: 613b str r3, [r7, #16]
|
||
*path = ++tt;
|
||
80037be: 697b ldr r3, [r7, #20]
|
||
80037c0: 3301 adds r3, #1
|
||
80037c2: 617b str r3, [r7, #20]
|
||
80037c4: 687b ldr r3, [r7, #4]
|
||
80037c6: 697a ldr r2, [r7, #20]
|
||
80037c8: 601a str r2, [r3, #0]
|
||
vol = (int)i;
|
||
*path = tt;
|
||
}
|
||
}
|
||
#endif
|
||
return vol;
|
||
80037ca: 693b ldr r3, [r7, #16]
|
||
80037cc: e002 b.n 80037d4 <get_ldnumber+0x7c>
|
||
}
|
||
#if _FS_RPATH && _VOLUMES >= 2
|
||
vol = CurrVol; /* Current drive */
|
||
#else
|
||
vol = 0; /* Drive 0 */
|
||
80037ce: 2300 movs r3, #0
|
||
80037d0: 613b str r3, [r7, #16]
|
||
#endif
|
||
}
|
||
return vol;
|
||
80037d2: 693b ldr r3, [r7, #16]
|
||
}
|
||
80037d4: 4618 mov r0, r3
|
||
80037d6: 371c adds r7, #28
|
||
80037d8: 46bd mov sp, r7
|
||
80037da: bc80 pop {r7}
|
||
80037dc: 4770 bx lr
|
||
...
|
||
|
||
080037e0 <check_fs>:
|
||
static
|
||
BYTE check_fs ( /* 0:FAT boor sector, 1:Valid boor sector but not FAT, 2:Not a boot sector, 3:Disk error */
|
||
FATFS* fs, /* File system object */
|
||
DWORD sect /* Sector# (lba) to check if it is an FAT boot record or not */
|
||
)
|
||
{
|
||
80037e0: b580 push {r7, lr}
|
||
80037e2: b082 sub sp, #8
|
||
80037e4: af00 add r7, sp, #0
|
||
80037e6: 6078 str r0, [r7, #4]
|
||
80037e8: 6039 str r1, [r7, #0]
|
||
fs->wflag = 0; fs->winsect = 0xFFFFFFFF; /* Invaidate window */
|
||
80037ea: 687b ldr r3, [r7, #4]
|
||
80037ec: 2200 movs r2, #0
|
||
80037ee: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
80037f2: 687b ldr r3, [r7, #4]
|
||
80037f4: f04f 32ff mov.w r2, #4294967295
|
||
80037f8: f8c3 222c str.w r2, [r3, #556] ; 0x22c
|
||
if (move_window(fs, sect) != FR_OK) /* Load boot record */
|
||
80037fc: 6839 ldr r1, [r7, #0]
|
||
80037fe: 6878 ldr r0, [r7, #4]
|
||
8003800: f7ff f889 bl 8002916 <move_window>
|
||
8003804: 4603 mov r3, r0
|
||
8003806: 2b00 cmp r3, #0
|
||
8003808: d001 beq.n 800380e <check_fs+0x2e>
|
||
return 3;
|
||
800380a: 2303 movs r3, #3
|
||
800380c: e04a b.n 80038a4 <check_fs+0xc4>
|
||
|
||
if (LD_WORD(&fs->win.d8[BS_55AA]) != 0xAA55) /* Check boot record signature (always placed at offset 510 even if the sector size is >512) */
|
||
800380e: 687b ldr r3, [r7, #4]
|
||
8003810: f503 73ff add.w r3, r3, #510 ; 0x1fe
|
||
8003814: 3301 adds r3, #1
|
||
8003816: 781b ldrb r3, [r3, #0]
|
||
8003818: 021b lsls r3, r3, #8
|
||
800381a: b21a sxth r2, r3
|
||
800381c: 687b ldr r3, [r7, #4]
|
||
800381e: f893 31fe ldrb.w r3, [r3, #510] ; 0x1fe
|
||
8003822: b21b sxth r3, r3
|
||
8003824: 4313 orrs r3, r2
|
||
8003826: b21b sxth r3, r3
|
||
8003828: 4a20 ldr r2, [pc, #128] ; (80038ac <check_fs+0xcc>)
|
||
800382a: 4293 cmp r3, r2
|
||
800382c: d001 beq.n 8003832 <check_fs+0x52>
|
||
return 2;
|
||
800382e: 2302 movs r3, #2
|
||
8003830: e038 b.n 80038a4 <check_fs+0xc4>
|
||
|
||
if ((LD_DWORD(&fs->win.d8[BS_FilSysType]) & 0xFFFFFF) == 0x544146) /* Check "FAT" string */
|
||
8003832: 687b ldr r3, [r7, #4]
|
||
8003834: 3336 adds r3, #54 ; 0x36
|
||
8003836: 3303 adds r3, #3
|
||
8003838: 781b ldrb r3, [r3, #0]
|
||
800383a: 061a lsls r2, r3, #24
|
||
800383c: 687b ldr r3, [r7, #4]
|
||
800383e: 3336 adds r3, #54 ; 0x36
|
||
8003840: 3302 adds r3, #2
|
||
8003842: 781b ldrb r3, [r3, #0]
|
||
8003844: 041b lsls r3, r3, #16
|
||
8003846: 4313 orrs r3, r2
|
||
8003848: 687a ldr r2, [r7, #4]
|
||
800384a: 3236 adds r2, #54 ; 0x36
|
||
800384c: 3201 adds r2, #1
|
||
800384e: 7812 ldrb r2, [r2, #0]
|
||
8003850: 0212 lsls r2, r2, #8
|
||
8003852: 4313 orrs r3, r2
|
||
8003854: 687a ldr r2, [r7, #4]
|
||
8003856: f892 2036 ldrb.w r2, [r2, #54] ; 0x36
|
||
800385a: 4313 orrs r3, r2
|
||
800385c: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000
|
||
8003860: 4a13 ldr r2, [pc, #76] ; (80038b0 <check_fs+0xd0>)
|
||
8003862: 4293 cmp r3, r2
|
||
8003864: d101 bne.n 800386a <check_fs+0x8a>
|
||
return 0;
|
||
8003866: 2300 movs r3, #0
|
||
8003868: e01c b.n 80038a4 <check_fs+0xc4>
|
||
if ((LD_DWORD(&fs->win.d8[BS_FilSysType32]) & 0xFFFFFF) == 0x544146) /* Check "FAT" string */
|
||
800386a: 687b ldr r3, [r7, #4]
|
||
800386c: 3352 adds r3, #82 ; 0x52
|
||
800386e: 3303 adds r3, #3
|
||
8003870: 781b ldrb r3, [r3, #0]
|
||
8003872: 061a lsls r2, r3, #24
|
||
8003874: 687b ldr r3, [r7, #4]
|
||
8003876: 3352 adds r3, #82 ; 0x52
|
||
8003878: 3302 adds r3, #2
|
||
800387a: 781b ldrb r3, [r3, #0]
|
||
800387c: 041b lsls r3, r3, #16
|
||
800387e: 4313 orrs r3, r2
|
||
8003880: 687a ldr r2, [r7, #4]
|
||
8003882: 3252 adds r2, #82 ; 0x52
|
||
8003884: 3201 adds r2, #1
|
||
8003886: 7812 ldrb r2, [r2, #0]
|
||
8003888: 0212 lsls r2, r2, #8
|
||
800388a: 4313 orrs r3, r2
|
||
800388c: 687a ldr r2, [r7, #4]
|
||
800388e: f892 2052 ldrb.w r2, [r2, #82] ; 0x52
|
||
8003892: 4313 orrs r3, r2
|
||
8003894: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000
|
||
8003898: 4a05 ldr r2, [pc, #20] ; (80038b0 <check_fs+0xd0>)
|
||
800389a: 4293 cmp r3, r2
|
||
800389c: d101 bne.n 80038a2 <check_fs+0xc2>
|
||
return 0;
|
||
800389e: 2300 movs r3, #0
|
||
80038a0: e000 b.n 80038a4 <check_fs+0xc4>
|
||
|
||
return 1;
|
||
80038a2: 2301 movs r3, #1
|
||
}
|
||
80038a4: 4618 mov r0, r3
|
||
80038a6: 3708 adds r7, #8
|
||
80038a8: 46bd mov sp, r7
|
||
80038aa: bd80 pop {r7, pc}
|
||
80038ac: ffffaa55 .word 0xffffaa55
|
||
80038b0: 00544146 .word 0x00544146
|
||
|
||
080038b4 <find_volume>:
|
||
FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */
|
||
FATFS** rfs, /* Pointer to pointer to the found file system object */
|
||
const TCHAR** path, /* Pointer to pointer to the path name (drive number) */
|
||
BYTE wmode /* !=0: Check write protection for write access */
|
||
)
|
||
{
|
||
80038b4: b580 push {r7, lr}
|
||
80038b6: b096 sub sp, #88 ; 0x58
|
||
80038b8: af00 add r7, sp, #0
|
||
80038ba: 60f8 str r0, [r7, #12]
|
||
80038bc: 60b9 str r1, [r7, #8]
|
||
80038be: 4613 mov r3, r2
|
||
80038c0: 71fb strb r3, [r7, #7]
|
||
FATFS *fs;
|
||
UINT i;
|
||
|
||
|
||
/* Get logical drive number from the path name */
|
||
*rfs = 0;
|
||
80038c2: 68fb ldr r3, [r7, #12]
|
||
80038c4: 2200 movs r2, #0
|
||
80038c6: 601a str r2, [r3, #0]
|
||
vol = get_ldnumber(path);
|
||
80038c8: 68b8 ldr r0, [r7, #8]
|
||
80038ca: f7ff ff45 bl 8003758 <get_ldnumber>
|
||
80038ce: 63f8 str r0, [r7, #60] ; 0x3c
|
||
if (vol < 0) return FR_INVALID_DRIVE;
|
||
80038d0: 6bfb ldr r3, [r7, #60] ; 0x3c
|
||
80038d2: 2b00 cmp r3, #0
|
||
80038d4: da01 bge.n 80038da <find_volume+0x26>
|
||
80038d6: 230b movs r3, #11
|
||
80038d8: e2aa b.n 8003e30 <find_volume+0x57c>
|
||
|
||
/* Check if the file system object is valid or not */
|
||
fs = FatFs[vol]; /* Get pointer to the file system object */
|
||
80038da: 4a9e ldr r2, [pc, #632] ; (8003b54 <find_volume+0x2a0>)
|
||
80038dc: 6bfb ldr r3, [r7, #60] ; 0x3c
|
||
80038de: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
||
80038e2: 63bb str r3, [r7, #56] ; 0x38
|
||
if (!fs) return FR_NOT_ENABLED; /* Is the file system object available? */
|
||
80038e4: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
80038e6: 2b00 cmp r3, #0
|
||
80038e8: d101 bne.n 80038ee <find_volume+0x3a>
|
||
80038ea: 230c movs r3, #12
|
||
80038ec: e2a0 b.n 8003e30 <find_volume+0x57c>
|
||
|
||
ENTER_FF(fs); /* Lock the volume */
|
||
*rfs = fs; /* Return pointer to the file system object */
|
||
80038ee: 68fb ldr r3, [r7, #12]
|
||
80038f0: 6bba ldr r2, [r7, #56] ; 0x38
|
||
80038f2: 601a str r2, [r3, #0]
|
||
|
||
if (fs->fs_type) { /* If the volume has been mounted */
|
||
80038f4: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
80038f6: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
80038fa: 2b00 cmp r3, #0
|
||
80038fc: d01b beq.n 8003936 <find_volume+0x82>
|
||
stat = disk_status(fs->drv);
|
||
80038fe: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003900: f893 3201 ldrb.w r3, [r3, #513] ; 0x201
|
||
8003904: 4618 mov r0, r3
|
||
8003906: f7fe fd55 bl 80023b4 <disk_status>
|
||
800390a: 4603 mov r3, r0
|
||
800390c: f887 3037 strb.w r3, [r7, #55] ; 0x37
|
||
if (!(stat & STA_NOINIT)) { /* and the physical drive is kept initialized */
|
||
8003910: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
|
||
8003914: f003 0301 and.w r3, r3, #1
|
||
8003918: 2b00 cmp r3, #0
|
||
800391a: d10c bne.n 8003936 <find_volume+0x82>
|
||
if (!_FS_READONLY && wmode && (stat & STA_PROTECT)) /* Check write protection if needed */
|
||
800391c: 79fb ldrb r3, [r7, #7]
|
||
800391e: 2b00 cmp r3, #0
|
||
8003920: d007 beq.n 8003932 <find_volume+0x7e>
|
||
8003922: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
|
||
8003926: f003 0304 and.w r3, r3, #4
|
||
800392a: 2b00 cmp r3, #0
|
||
800392c: d001 beq.n 8003932 <find_volume+0x7e>
|
||
return FR_WRITE_PROTECTED;
|
||
800392e: 230a movs r3, #10
|
||
8003930: e27e b.n 8003e30 <find_volume+0x57c>
|
||
return FR_OK; /* The file system object is valid */
|
||
8003932: 2300 movs r3, #0
|
||
8003934: e27c b.n 8003e30 <find_volume+0x57c>
|
||
}
|
||
|
||
/* The file system object is not valid. */
|
||
/* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */
|
||
|
||
fs->fs_type = 0; /* Clear the file system object */
|
||
8003936: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003938: 2200 movs r2, #0
|
||
800393a: f883 2200 strb.w r2, [r3, #512] ; 0x200
|
||
fs->drv = LD2PD(vol); /* Bind the logical drive and a physical drive */
|
||
800393e: 6bfb ldr r3, [r7, #60] ; 0x3c
|
||
8003940: b2da uxtb r2, r3
|
||
8003942: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003944: f883 2201 strb.w r2, [r3, #513] ; 0x201
|
||
stat = disk_initialize(fs->drv); /* Initialize the physical drive */
|
||
8003948: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
800394a: f893 3201 ldrb.w r3, [r3, #513] ; 0x201
|
||
800394e: 4618 mov r0, r3
|
||
8003950: f7fe fd4a bl 80023e8 <disk_initialize>
|
||
8003954: 4603 mov r3, r0
|
||
8003956: f887 3037 strb.w r3, [r7, #55] ; 0x37
|
||
if (stat & STA_NOINIT) /* Check if the initialization succeeded */
|
||
800395a: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
|
||
800395e: f003 0301 and.w r3, r3, #1
|
||
8003962: 2b00 cmp r3, #0
|
||
8003964: d001 beq.n 800396a <find_volume+0xb6>
|
||
return FR_NOT_READY; /* Failed to initialize due to no medium or hard error */
|
||
8003966: 2303 movs r3, #3
|
||
8003968: e262 b.n 8003e30 <find_volume+0x57c>
|
||
if (!_FS_READONLY && wmode && (stat & STA_PROTECT)) /* Check disk write protection if needed */
|
||
800396a: 79fb ldrb r3, [r7, #7]
|
||
800396c: 2b00 cmp r3, #0
|
||
800396e: d007 beq.n 8003980 <find_volume+0xcc>
|
||
8003970: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
|
||
8003974: f003 0304 and.w r3, r3, #4
|
||
8003978: 2b00 cmp r3, #0
|
||
800397a: d001 beq.n 8003980 <find_volume+0xcc>
|
||
return FR_WRITE_PROTECTED;
|
||
800397c: 230a movs r3, #10
|
||
800397e: e257 b.n 8003e30 <find_volume+0x57c>
|
||
#if _MAX_SS != _MIN_SS /* Get sector size (multiple sector size cfg only) */
|
||
if (disk_ioctl(fs->drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK
|
||
|| SS(fs) < _MIN_SS || SS(fs) > _MAX_SS) return FR_DISK_ERR;
|
||
#endif
|
||
/* Find an FAT partition on the drive. Supports only generic partitioning, FDISK and SFD. */
|
||
bsect = 0;
|
||
8003980: 2300 movs r3, #0
|
||
8003982: 653b str r3, [r7, #80] ; 0x50
|
||
fmt = check_fs(fs, bsect); /* Load sector 0 and check if it is an FAT boot sector as SFD */
|
||
8003984: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
8003986: 6bb8 ldr r0, [r7, #56] ; 0x38
|
||
8003988: f7ff ff2a bl 80037e0 <check_fs>
|
||
800398c: 4603 mov r3, r0
|
||
800398e: f887 3057 strb.w r3, [r7, #87] ; 0x57
|
||
if (fmt == 1 || (!fmt && (LD2PT(vol)))) { /* Not an FAT boot sector or forced partition number */
|
||
8003992: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003996: 2b01 cmp r3, #1
|
||
8003998: d155 bne.n 8003a46 <find_volume+0x192>
|
||
for (i = 0; i < 4; i++) { /* Get partition offset */
|
||
800399a: 2300 movs r3, #0
|
||
800399c: 643b str r3, [r7, #64] ; 0x40
|
||
800399e: e029 b.n 80039f4 <find_volume+0x140>
|
||
pt = fs->win.d8 + MBR_Table + i * SZ_PTE;
|
||
80039a0: 6bba ldr r2, [r7, #56] ; 0x38
|
||
80039a2: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
80039a4: 011b lsls r3, r3, #4
|
||
80039a6: f503 73df add.w r3, r3, #446 ; 0x1be
|
||
80039aa: 4413 add r3, r2
|
||
80039ac: 633b str r3, [r7, #48] ; 0x30
|
||
br[i] = pt[4] ? LD_DWORD(&pt[8]) : 0;
|
||
80039ae: 6b3b ldr r3, [r7, #48] ; 0x30
|
||
80039b0: 3304 adds r3, #4
|
||
80039b2: 781b ldrb r3, [r3, #0]
|
||
80039b4: 2b00 cmp r3, #0
|
||
80039b6: d012 beq.n 80039de <find_volume+0x12a>
|
||
80039b8: 6b3b ldr r3, [r7, #48] ; 0x30
|
||
80039ba: 330b adds r3, #11
|
||
80039bc: 781b ldrb r3, [r3, #0]
|
||
80039be: 061a lsls r2, r3, #24
|
||
80039c0: 6b3b ldr r3, [r7, #48] ; 0x30
|
||
80039c2: 330a adds r3, #10
|
||
80039c4: 781b ldrb r3, [r3, #0]
|
||
80039c6: 041b lsls r3, r3, #16
|
||
80039c8: 4313 orrs r3, r2
|
||
80039ca: 6b3a ldr r2, [r7, #48] ; 0x30
|
||
80039cc: 3209 adds r2, #9
|
||
80039ce: 7812 ldrb r2, [r2, #0]
|
||
80039d0: 0212 lsls r2, r2, #8
|
||
80039d2: 4313 orrs r3, r2
|
||
80039d4: 6b3a ldr r2, [r7, #48] ; 0x30
|
||
80039d6: 3208 adds r2, #8
|
||
80039d8: 7812 ldrb r2, [r2, #0]
|
||
80039da: 431a orrs r2, r3
|
||
80039dc: e000 b.n 80039e0 <find_volume+0x12c>
|
||
80039de: 2200 movs r2, #0
|
||
80039e0: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
80039e2: 009b lsls r3, r3, #2
|
||
80039e4: f107 0158 add.w r1, r7, #88 ; 0x58
|
||
80039e8: 440b add r3, r1
|
||
80039ea: f843 2c44 str.w r2, [r3, #-68]
|
||
for (i = 0; i < 4; i++) { /* Get partition offset */
|
||
80039ee: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
80039f0: 3301 adds r3, #1
|
||
80039f2: 643b str r3, [r7, #64] ; 0x40
|
||
80039f4: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
80039f6: 2b03 cmp r3, #3
|
||
80039f8: d9d2 bls.n 80039a0 <find_volume+0xec>
|
||
}
|
||
i = LD2PT(vol); /* Partition number: 0:auto, 1-4:forced */
|
||
80039fa: 2300 movs r3, #0
|
||
80039fc: 643b str r3, [r7, #64] ; 0x40
|
||
if (i) i--;
|
||
80039fe: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003a00: 2b00 cmp r3, #0
|
||
8003a02: d002 beq.n 8003a0a <find_volume+0x156>
|
||
8003a04: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003a06: 3b01 subs r3, #1
|
||
8003a08: 643b str r3, [r7, #64] ; 0x40
|
||
do { /* Find an FAT volume */
|
||
bsect = br[i];
|
||
8003a0a: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003a0c: 009b lsls r3, r3, #2
|
||
8003a0e: f107 0258 add.w r2, r7, #88 ; 0x58
|
||
8003a12: 4413 add r3, r2
|
||
8003a14: f853 3c44 ldr.w r3, [r3, #-68]
|
||
8003a18: 653b str r3, [r7, #80] ; 0x50
|
||
fmt = bsect ? check_fs(fs, bsect) : 2; /* Check the partition */
|
||
8003a1a: 6d3b ldr r3, [r7, #80] ; 0x50
|
||
8003a1c: 2b00 cmp r3, #0
|
||
8003a1e: d005 beq.n 8003a2c <find_volume+0x178>
|
||
8003a20: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
8003a22: 6bb8 ldr r0, [r7, #56] ; 0x38
|
||
8003a24: f7ff fedc bl 80037e0 <check_fs>
|
||
8003a28: 4603 mov r3, r0
|
||
8003a2a: e000 b.n 8003a2e <find_volume+0x17a>
|
||
8003a2c: 2302 movs r3, #2
|
||
8003a2e: f887 3057 strb.w r3, [r7, #87] ; 0x57
|
||
} while (!LD2PT(vol) && fmt && ++i < 4);
|
||
8003a32: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003a36: 2b00 cmp r3, #0
|
||
8003a38: d005 beq.n 8003a46 <find_volume+0x192>
|
||
8003a3a: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003a3c: 3301 adds r3, #1
|
||
8003a3e: 643b str r3, [r7, #64] ; 0x40
|
||
8003a40: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003a42: 2b03 cmp r3, #3
|
||
8003a44: d9e1 bls.n 8003a0a <find_volume+0x156>
|
||
}
|
||
if (fmt == 3) return FR_DISK_ERR; /* An error occured in the disk I/O layer */
|
||
8003a46: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003a4a: 2b03 cmp r3, #3
|
||
8003a4c: d101 bne.n 8003a52 <find_volume+0x19e>
|
||
8003a4e: 2301 movs r3, #1
|
||
8003a50: e1ee b.n 8003e30 <find_volume+0x57c>
|
||
if (fmt) return FR_NO_FILESYSTEM; /* No FAT volume is found */
|
||
8003a52: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003a56: 2b00 cmp r3, #0
|
||
8003a58: d001 beq.n 8003a5e <find_volume+0x1aa>
|
||
8003a5a: 230d movs r3, #13
|
||
8003a5c: e1e8 b.n 8003e30 <find_volume+0x57c>
|
||
|
||
/* An FAT volume is found. Following code initializes the file system object */
|
||
|
||
if (LD_WORD(fs->win.d8 + BPB_BytsPerSec) != SS(fs)) /* (BPB_BytsPerSec must be equal to the physical sector size) */
|
||
8003a5e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003a60: 7b1b ldrb r3, [r3, #12]
|
||
8003a62: 021b lsls r3, r3, #8
|
||
8003a64: b21a sxth r2, r3
|
||
8003a66: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003a68: 7adb ldrb r3, [r3, #11]
|
||
8003a6a: b21b sxth r3, r3
|
||
8003a6c: 4313 orrs r3, r2
|
||
8003a6e: b21b sxth r3, r3
|
||
8003a70: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
||
8003a74: d001 beq.n 8003a7a <find_volume+0x1c6>
|
||
return FR_NO_FILESYSTEM;
|
||
8003a76: 230d movs r3, #13
|
||
8003a78: e1da b.n 8003e30 <find_volume+0x57c>
|
||
|
||
fasize = LD_WORD(fs->win.d8 + BPB_FATSz16); /* Number of sectors per FAT */
|
||
8003a7a: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003a7c: 7ddb ldrb r3, [r3, #23]
|
||
8003a7e: 021b lsls r3, r3, #8
|
||
8003a80: b21a sxth r2, r3
|
||
8003a82: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003a84: 7d9b ldrb r3, [r3, #22]
|
||
8003a86: b21b sxth r3, r3
|
||
8003a88: 4313 orrs r3, r2
|
||
8003a8a: b21b sxth r3, r3
|
||
8003a8c: b29b uxth r3, r3
|
||
8003a8e: 64fb str r3, [r7, #76] ; 0x4c
|
||
if (!fasize) fasize = LD_DWORD(fs->win.d8 + BPB_FATSz32);
|
||
8003a90: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
8003a92: 2b00 cmp r3, #0
|
||
8003a94: d112 bne.n 8003abc <find_volume+0x208>
|
||
8003a96: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003a98: f893 3027 ldrb.w r3, [r3, #39] ; 0x27
|
||
8003a9c: 061a lsls r2, r3, #24
|
||
8003a9e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003aa0: f893 3026 ldrb.w r3, [r3, #38] ; 0x26
|
||
8003aa4: 041b lsls r3, r3, #16
|
||
8003aa6: 4313 orrs r3, r2
|
||
8003aa8: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003aaa: f892 2025 ldrb.w r2, [r2, #37] ; 0x25
|
||
8003aae: 0212 lsls r2, r2, #8
|
||
8003ab0: 4313 orrs r3, r2
|
||
8003ab2: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003ab4: f892 2024 ldrb.w r2, [r2, #36] ; 0x24
|
||
8003ab8: 4313 orrs r3, r2
|
||
8003aba: 64fb str r3, [r7, #76] ; 0x4c
|
||
fs->fsize = fasize;
|
||
8003abc: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003abe: 6cfa ldr r2, [r7, #76] ; 0x4c
|
||
8003ac0: f8c3 2218 str.w r2, [r3, #536] ; 0x218
|
||
|
||
fs->n_fats = fs->win.d8[BPB_NumFATs]; /* Number of FAT copies */
|
||
8003ac4: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003ac6: 7c1a ldrb r2, [r3, #16]
|
||
8003ac8: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003aca: f883 2203 strb.w r2, [r3, #515] ; 0x203
|
||
if (fs->n_fats != 1 && fs->n_fats != 2) /* (Must be 1 or 2) */
|
||
8003ace: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003ad0: f893 3203 ldrb.w r3, [r3, #515] ; 0x203
|
||
8003ad4: 2b01 cmp r3, #1
|
||
8003ad6: d006 beq.n 8003ae6 <find_volume+0x232>
|
||
8003ad8: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003ada: f893 3203 ldrb.w r3, [r3, #515] ; 0x203
|
||
8003ade: 2b02 cmp r3, #2
|
||
8003ae0: d001 beq.n 8003ae6 <find_volume+0x232>
|
||
return FR_NO_FILESYSTEM;
|
||
8003ae2: 230d movs r3, #13
|
||
8003ae4: e1a4 b.n 8003e30 <find_volume+0x57c>
|
||
fasize *= fs->n_fats; /* Number of sectors for FAT area */
|
||
8003ae6: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003ae8: f893 3203 ldrb.w r3, [r3, #515] ; 0x203
|
||
8003aec: 461a mov r2, r3
|
||
8003aee: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
8003af0: fb02 f303 mul.w r3, r2, r3
|
||
8003af4: 64fb str r3, [r7, #76] ; 0x4c
|
||
|
||
fs->csize = fs->win.d8[BPB_SecPerClus]; /* Number of sectors per cluster */
|
||
8003af6: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003af8: 7b5a ldrb r2, [r3, #13]
|
||
8003afa: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003afc: f883 2202 strb.w r2, [r3, #514] ; 0x202
|
||
if (!fs->csize || (fs->csize & (fs->csize - 1))) /* (Must be power of 2) */
|
||
8003b00: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b02: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
8003b06: 2b00 cmp r3, #0
|
||
8003b08: d00a beq.n 8003b20 <find_volume+0x26c>
|
||
8003b0a: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b0c: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
8003b10: 461a mov r2, r3
|
||
8003b12: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b14: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
8003b18: 3b01 subs r3, #1
|
||
8003b1a: 4013 ands r3, r2
|
||
8003b1c: 2b00 cmp r3, #0
|
||
8003b1e: d001 beq.n 8003b24 <find_volume+0x270>
|
||
return FR_NO_FILESYSTEM;
|
||
8003b20: 230d movs r3, #13
|
||
8003b22: e185 b.n 8003e30 <find_volume+0x57c>
|
||
|
||
fs->n_rootdir = LD_WORD(fs->win.d8 + BPB_RootEntCnt); /* Number of root directory entries */
|
||
8003b24: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b26: 7c9b ldrb r3, [r3, #18]
|
||
8003b28: 021b lsls r3, r3, #8
|
||
8003b2a: b21a sxth r2, r3
|
||
8003b2c: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b2e: 7c5b ldrb r3, [r3, #17]
|
||
8003b30: b21b sxth r3, r3
|
||
8003b32: 4313 orrs r3, r2
|
||
8003b34: b21b sxth r3, r3
|
||
8003b36: b29a uxth r2, r3
|
||
8003b38: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b3a: f8a3 2208 strh.w r2, [r3, #520] ; 0x208
|
||
if (fs->n_rootdir % (SS(fs) / SZ_DIRE)) /* (Must be sector aligned) */
|
||
8003b3e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b40: f8b3 3208 ldrh.w r3, [r3, #520] ; 0x208
|
||
8003b44: f003 030f and.w r3, r3, #15
|
||
8003b48: b29b uxth r3, r3
|
||
8003b4a: 2b00 cmp r3, #0
|
||
8003b4c: d004 beq.n 8003b58 <find_volume+0x2a4>
|
||
return FR_NO_FILESYSTEM;
|
||
8003b4e: 230d movs r3, #13
|
||
8003b50: e16e b.n 8003e30 <find_volume+0x57c>
|
||
8003b52: bf00 nop
|
||
8003b54: 20000044 .word 0x20000044
|
||
|
||
tsect = LD_WORD(fs->win.d8 + BPB_TotSec16); /* Number of sectors on the volume */
|
||
8003b58: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b5a: 7d1b ldrb r3, [r3, #20]
|
||
8003b5c: 021b lsls r3, r3, #8
|
||
8003b5e: b21a sxth r2, r3
|
||
8003b60: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b62: 7cdb ldrb r3, [r3, #19]
|
||
8003b64: b21b sxth r3, r3
|
||
8003b66: 4313 orrs r3, r2
|
||
8003b68: b21b sxth r3, r3
|
||
8003b6a: b29b uxth r3, r3
|
||
8003b6c: 64bb str r3, [r7, #72] ; 0x48
|
||
if (!tsect) tsect = LD_DWORD(fs->win.d8 + BPB_TotSec32);
|
||
8003b6e: 6cbb ldr r3, [r7, #72] ; 0x48
|
||
8003b70: 2b00 cmp r3, #0
|
||
8003b72: d112 bne.n 8003b9a <find_volume+0x2e6>
|
||
8003b74: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b76: f893 3023 ldrb.w r3, [r3, #35] ; 0x23
|
||
8003b7a: 061a lsls r2, r3, #24
|
||
8003b7c: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b7e: f893 3022 ldrb.w r3, [r3, #34] ; 0x22
|
||
8003b82: 041b lsls r3, r3, #16
|
||
8003b84: 4313 orrs r3, r2
|
||
8003b86: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003b88: f892 2021 ldrb.w r2, [r2, #33] ; 0x21
|
||
8003b8c: 0212 lsls r2, r2, #8
|
||
8003b8e: 4313 orrs r3, r2
|
||
8003b90: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003b92: f892 2020 ldrb.w r2, [r2, #32]
|
||
8003b96: 4313 orrs r3, r2
|
||
8003b98: 64bb str r3, [r7, #72] ; 0x48
|
||
|
||
nrsv = LD_WORD(fs->win.d8 + BPB_RsvdSecCnt); /* Number of reserved sectors */
|
||
8003b9a: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b9c: 7bdb ldrb r3, [r3, #15]
|
||
8003b9e: 021b lsls r3, r3, #8
|
||
8003ba0: b21a sxth r2, r3
|
||
8003ba2: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003ba4: 7b9b ldrb r3, [r3, #14]
|
||
8003ba6: b21b sxth r3, r3
|
||
8003ba8: 4313 orrs r3, r2
|
||
8003baa: b21b sxth r3, r3
|
||
8003bac: 85fb strh r3, [r7, #46] ; 0x2e
|
||
if (!nrsv) return FR_NO_FILESYSTEM; /* (Must not be 0) */
|
||
8003bae: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
||
8003bb0: 2b00 cmp r3, #0
|
||
8003bb2: d101 bne.n 8003bb8 <find_volume+0x304>
|
||
8003bb4: 230d movs r3, #13
|
||
8003bb6: e13b b.n 8003e30 <find_volume+0x57c>
|
||
|
||
/* Determine the FAT sub type */
|
||
sysect = nrsv + fasize + fs->n_rootdir / (SS(fs) / SZ_DIRE); /* RSV + FAT + DIR */
|
||
8003bb8: 8dfa ldrh r2, [r7, #46] ; 0x2e
|
||
8003bba: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
8003bbc: 4413 add r3, r2
|
||
8003bbe: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003bc0: f8b2 2208 ldrh.w r2, [r2, #520] ; 0x208
|
||
8003bc4: 0912 lsrs r2, r2, #4
|
||
8003bc6: b292 uxth r2, r2
|
||
8003bc8: 4413 add r3, r2
|
||
8003bca: 62bb str r3, [r7, #40] ; 0x28
|
||
if (tsect < sysect) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
|
||
8003bcc: 6cba ldr r2, [r7, #72] ; 0x48
|
||
8003bce: 6abb ldr r3, [r7, #40] ; 0x28
|
||
8003bd0: 429a cmp r2, r3
|
||
8003bd2: d201 bcs.n 8003bd8 <find_volume+0x324>
|
||
8003bd4: 230d movs r3, #13
|
||
8003bd6: e12b b.n 8003e30 <find_volume+0x57c>
|
||
nclst = (tsect - sysect) / fs->csize; /* Number of clusters */
|
||
8003bd8: 6cba ldr r2, [r7, #72] ; 0x48
|
||
8003bda: 6abb ldr r3, [r7, #40] ; 0x28
|
||
8003bdc: 1ad3 subs r3, r2, r3
|
||
8003bde: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003be0: f892 2202 ldrb.w r2, [r2, #514] ; 0x202
|
||
8003be4: fbb3 f3f2 udiv r3, r3, r2
|
||
8003be8: 627b str r3, [r7, #36] ; 0x24
|
||
if (!nclst) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
|
||
8003bea: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8003bec: 2b00 cmp r3, #0
|
||
8003bee: d101 bne.n 8003bf4 <find_volume+0x340>
|
||
8003bf0: 230d movs r3, #13
|
||
8003bf2: e11d b.n 8003e30 <find_volume+0x57c>
|
||
fmt = FS_FAT12;
|
||
8003bf4: 2301 movs r3, #1
|
||
8003bf6: f887 3057 strb.w r3, [r7, #87] ; 0x57
|
||
if (nclst >= MIN_FAT16) fmt = FS_FAT16;
|
||
8003bfa: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8003bfc: f640 72f5 movw r2, #4085 ; 0xff5
|
||
8003c00: 4293 cmp r3, r2
|
||
8003c02: d902 bls.n 8003c0a <find_volume+0x356>
|
||
8003c04: 2302 movs r3, #2
|
||
8003c06: f887 3057 strb.w r3, [r7, #87] ; 0x57
|
||
if (nclst >= MIN_FAT32) fmt = FS_FAT32;
|
||
8003c0a: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8003c0c: f64f 72f5 movw r2, #65525 ; 0xfff5
|
||
8003c10: 4293 cmp r3, r2
|
||
8003c12: d902 bls.n 8003c1a <find_volume+0x366>
|
||
8003c14: 2303 movs r3, #3
|
||
8003c16: f887 3057 strb.w r3, [r7, #87] ; 0x57
|
||
|
||
/* Boundaries and Limits */
|
||
fs->n_fatent = nclst + 2; /* Number of FAT entries */
|
||
8003c1a: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8003c1c: 1c9a adds r2, r3, #2
|
||
8003c1e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c20: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
||
fs->volbase = bsect; /* Volume start sector */
|
||
8003c24: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c26: 6d3a ldr r2, [r7, #80] ; 0x50
|
||
8003c28: f8c3 221c str.w r2, [r3, #540] ; 0x21c
|
||
fs->fatbase = bsect + nrsv; /* FAT start sector */
|
||
8003c2c: 8dfa ldrh r2, [r7, #46] ; 0x2e
|
||
8003c2e: 6d3b ldr r3, [r7, #80] ; 0x50
|
||
8003c30: 441a add r2, r3
|
||
8003c32: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c34: f8c3 2220 str.w r2, [r3, #544] ; 0x220
|
||
fs->database = bsect + sysect; /* Data start sector */
|
||
8003c38: 6d3a ldr r2, [r7, #80] ; 0x50
|
||
8003c3a: 6abb ldr r3, [r7, #40] ; 0x28
|
||
8003c3c: 441a add r2, r3
|
||
8003c3e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c40: f8c3 2228 str.w r2, [r3, #552] ; 0x228
|
||
if (fmt == FS_FAT32) {
|
||
8003c44: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003c48: 2b03 cmp r3, #3
|
||
8003c4a: d121 bne.n 8003c90 <find_volume+0x3dc>
|
||
if (fs->n_rootdir) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must be 0) */
|
||
8003c4c: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c4e: f8b3 3208 ldrh.w r3, [r3, #520] ; 0x208
|
||
8003c52: 2b00 cmp r3, #0
|
||
8003c54: d001 beq.n 8003c5a <find_volume+0x3a6>
|
||
8003c56: 230d movs r3, #13
|
||
8003c58: e0ea b.n 8003e30 <find_volume+0x57c>
|
||
fs->dirbase = LD_DWORD(fs->win.d8 + BPB_RootClus); /* Root directory start cluster */
|
||
8003c5a: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c5c: f893 302f ldrb.w r3, [r3, #47] ; 0x2f
|
||
8003c60: 061a lsls r2, r3, #24
|
||
8003c62: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c64: f893 302e ldrb.w r3, [r3, #46] ; 0x2e
|
||
8003c68: 041b lsls r3, r3, #16
|
||
8003c6a: 4313 orrs r3, r2
|
||
8003c6c: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003c6e: f892 202d ldrb.w r2, [r2, #45] ; 0x2d
|
||
8003c72: 0212 lsls r2, r2, #8
|
||
8003c74: 4313 orrs r3, r2
|
||
8003c76: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003c78: f892 202c ldrb.w r2, [r2, #44] ; 0x2c
|
||
8003c7c: 431a orrs r2, r3
|
||
8003c7e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c80: f8c3 2224 str.w r2, [r3, #548] ; 0x224
|
||
szbfat = fs->n_fatent * 4; /* (Needed FAT size) */
|
||
8003c84: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c86: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8003c8a: 009b lsls r3, r3, #2
|
||
8003c8c: 647b str r3, [r7, #68] ; 0x44
|
||
8003c8e: e025 b.n 8003cdc <find_volume+0x428>
|
||
} else {
|
||
if (!fs->n_rootdir) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must not be 0) */
|
||
8003c90: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c92: f8b3 3208 ldrh.w r3, [r3, #520] ; 0x208
|
||
8003c96: 2b00 cmp r3, #0
|
||
8003c98: d101 bne.n 8003c9e <find_volume+0x3ea>
|
||
8003c9a: 230d movs r3, #13
|
||
8003c9c: e0c8 b.n 8003e30 <find_volume+0x57c>
|
||
fs->dirbase = fs->fatbase + fasize; /* Root directory start sector */
|
||
8003c9e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003ca0: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8003ca4: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
8003ca6: 441a add r2, r3
|
||
8003ca8: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003caa: f8c3 2224 str.w r2, [r3, #548] ; 0x224
|
||
szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */
|
||
fs->n_fatent * 2 : fs->n_fatent * 3 / 2 + (fs->n_fatent & 1);
|
||
8003cae: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003cb2: 2b02 cmp r3, #2
|
||
8003cb4: d104 bne.n 8003cc0 <find_volume+0x40c>
|
||
8003cb6: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003cb8: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8003cbc: 005b lsls r3, r3, #1
|
||
8003cbe: e00c b.n 8003cda <find_volume+0x426>
|
||
8003cc0: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003cc2: f8d3 2214 ldr.w r2, [r3, #532] ; 0x214
|
||
8003cc6: 4613 mov r3, r2
|
||
8003cc8: 005b lsls r3, r3, #1
|
||
8003cca: 4413 add r3, r2
|
||
8003ccc: 085a lsrs r2, r3, #1
|
||
8003cce: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003cd0: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8003cd4: f003 0301 and.w r3, r3, #1
|
||
8003cd8: 4413 add r3, r2
|
||
szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */
|
||
8003cda: 647b str r3, [r7, #68] ; 0x44
|
||
}
|
||
if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs)) /* (BPB_FATSz must not be less than the size needed) */
|
||
8003cdc: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003cde: f8d3 2218 ldr.w r2, [r3, #536] ; 0x218
|
||
8003ce2: 6c7b ldr r3, [r7, #68] ; 0x44
|
||
8003ce4: f203 13ff addw r3, r3, #511 ; 0x1ff
|
||
8003ce8: 0a5b lsrs r3, r3, #9
|
||
8003cea: 429a cmp r2, r3
|
||
8003cec: d201 bcs.n 8003cf2 <find_volume+0x43e>
|
||
return FR_NO_FILESYSTEM;
|
||
8003cee: 230d movs r3, #13
|
||
8003cf0: e09e b.n 8003e30 <find_volume+0x57c>
|
||
|
||
#if !_FS_READONLY
|
||
/* Initialize cluster allocation information */
|
||
fs->last_clust = fs->free_clust = 0xFFFFFFFF;
|
||
8003cf2: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003cf4: f04f 32ff mov.w r2, #4294967295
|
||
8003cf8: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
8003cfc: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003cfe: f8d3 2210 ldr.w r2, [r3, #528] ; 0x210
|
||
8003d02: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d04: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
|
||
/* Get fsinfo if available */
|
||
fs->fsi_flag = 0x80;
|
||
8003d08: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d0a: 2280 movs r2, #128 ; 0x80
|
||
8003d0c: f883 2205 strb.w r2, [r3, #517] ; 0x205
|
||
#if (_FS_NOFSINFO & 3) != 3
|
||
if (fmt == FS_FAT32 /* Enable FSINFO only if FAT32 and BPB_FSInfo is 1 */
|
||
8003d10: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003d14: 2b03 cmp r3, #3
|
||
8003d16: d177 bne.n 8003e08 <find_volume+0x554>
|
||
&& LD_WORD(fs->win.d8 + BPB_FSInfo) == 1
|
||
8003d18: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d1a: f893 3031 ldrb.w r3, [r3, #49] ; 0x31
|
||
8003d1e: 021b lsls r3, r3, #8
|
||
8003d20: b21a sxth r2, r3
|
||
8003d22: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d24: f893 3030 ldrb.w r3, [r3, #48] ; 0x30
|
||
8003d28: b21b sxth r3, r3
|
||
8003d2a: 4313 orrs r3, r2
|
||
8003d2c: b21b sxth r3, r3
|
||
8003d2e: 2b01 cmp r3, #1
|
||
8003d30: d16a bne.n 8003e08 <find_volume+0x554>
|
||
&& move_window(fs, bsect + 1) == FR_OK)
|
||
8003d32: 6d3b ldr r3, [r7, #80] ; 0x50
|
||
8003d34: 3301 adds r3, #1
|
||
8003d36: 4619 mov r1, r3
|
||
8003d38: 6bb8 ldr r0, [r7, #56] ; 0x38
|
||
8003d3a: f7fe fdec bl 8002916 <move_window>
|
||
8003d3e: 4603 mov r3, r0
|
||
8003d40: 2b00 cmp r3, #0
|
||
8003d42: d161 bne.n 8003e08 <find_volume+0x554>
|
||
{
|
||
fs->fsi_flag = 0;
|
||
8003d44: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d46: 2200 movs r2, #0
|
||
8003d48: f883 2205 strb.w r2, [r3, #517] ; 0x205
|
||
if (LD_WORD(fs->win.d8 + BS_55AA) == 0xAA55 /* Load FSINFO data if available */
|
||
8003d4c: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d4e: f893 31ff ldrb.w r3, [r3, #511] ; 0x1ff
|
||
8003d52: 021b lsls r3, r3, #8
|
||
8003d54: b21a sxth r2, r3
|
||
8003d56: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d58: f893 31fe ldrb.w r3, [r3, #510] ; 0x1fe
|
||
8003d5c: b21b sxth r3, r3
|
||
8003d5e: 4313 orrs r3, r2
|
||
8003d60: b21b sxth r3, r3
|
||
8003d62: 4a35 ldr r2, [pc, #212] ; (8003e38 <find_volume+0x584>)
|
||
8003d64: 4293 cmp r3, r2
|
||
8003d66: d14f bne.n 8003e08 <find_volume+0x554>
|
||
&& LD_DWORD(fs->win.d8 + FSI_LeadSig) == 0x41615252
|
||
8003d68: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d6a: 78db ldrb r3, [r3, #3]
|
||
8003d6c: 061a lsls r2, r3, #24
|
||
8003d6e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d70: 789b ldrb r3, [r3, #2]
|
||
8003d72: 041b lsls r3, r3, #16
|
||
8003d74: 4313 orrs r3, r2
|
||
8003d76: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003d78: 7852 ldrb r2, [r2, #1]
|
||
8003d7a: 0212 lsls r2, r2, #8
|
||
8003d7c: 4313 orrs r3, r2
|
||
8003d7e: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003d80: 7812 ldrb r2, [r2, #0]
|
||
8003d82: 4313 orrs r3, r2
|
||
8003d84: 4a2d ldr r2, [pc, #180] ; (8003e3c <find_volume+0x588>)
|
||
8003d86: 4293 cmp r3, r2
|
||
8003d88: d13e bne.n 8003e08 <find_volume+0x554>
|
||
&& LD_DWORD(fs->win.d8 + FSI_StrucSig) == 0x61417272)
|
||
8003d8a: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d8c: f893 31e7 ldrb.w r3, [r3, #487] ; 0x1e7
|
||
8003d90: 061a lsls r2, r3, #24
|
||
8003d92: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d94: f893 31e6 ldrb.w r3, [r3, #486] ; 0x1e6
|
||
8003d98: 041b lsls r3, r3, #16
|
||
8003d9a: 4313 orrs r3, r2
|
||
8003d9c: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003d9e: f892 21e5 ldrb.w r2, [r2, #485] ; 0x1e5
|
||
8003da2: 0212 lsls r2, r2, #8
|
||
8003da4: 4313 orrs r3, r2
|
||
8003da6: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003da8: f892 21e4 ldrb.w r2, [r2, #484] ; 0x1e4
|
||
8003dac: 4313 orrs r3, r2
|
||
8003dae: 4a24 ldr r2, [pc, #144] ; (8003e40 <find_volume+0x58c>)
|
||
8003db0: 4293 cmp r3, r2
|
||
8003db2: d129 bne.n 8003e08 <find_volume+0x554>
|
||
{
|
||
#if (_FS_NOFSINFO & 1) == 0
|
||
fs->free_clust = LD_DWORD(fs->win.d8 + FSI_Free_Count);
|
||
8003db4: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003db6: f893 31eb ldrb.w r3, [r3, #491] ; 0x1eb
|
||
8003dba: 061a lsls r2, r3, #24
|
||
8003dbc: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003dbe: f893 31ea ldrb.w r3, [r3, #490] ; 0x1ea
|
||
8003dc2: 041b lsls r3, r3, #16
|
||
8003dc4: 4313 orrs r3, r2
|
||
8003dc6: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003dc8: f892 21e9 ldrb.w r2, [r2, #489] ; 0x1e9
|
||
8003dcc: 0212 lsls r2, r2, #8
|
||
8003dce: 4313 orrs r3, r2
|
||
8003dd0: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003dd2: f892 21e8 ldrb.w r2, [r2, #488] ; 0x1e8
|
||
8003dd6: 431a orrs r2, r3
|
||
8003dd8: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003dda: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
#endif
|
||
#if (_FS_NOFSINFO & 2) == 0
|
||
fs->last_clust = LD_DWORD(fs->win.d8 + FSI_Nxt_Free);
|
||
8003dde: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003de0: f893 31ef ldrb.w r3, [r3, #495] ; 0x1ef
|
||
8003de4: 061a lsls r2, r3, #24
|
||
8003de6: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003de8: f893 31ee ldrb.w r3, [r3, #494] ; 0x1ee
|
||
8003dec: 041b lsls r3, r3, #16
|
||
8003dee: 4313 orrs r3, r2
|
||
8003df0: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003df2: f892 21ed ldrb.w r2, [r2, #493] ; 0x1ed
|
||
8003df6: 0212 lsls r2, r2, #8
|
||
8003df8: 4313 orrs r3, r2
|
||
8003dfa: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003dfc: f892 21ec ldrb.w r2, [r2, #492] ; 0x1ec
|
||
8003e00: 431a orrs r2, r3
|
||
8003e02: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e04: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
#endif
|
||
}
|
||
}
|
||
#endif
|
||
#endif
|
||
fs->fs_type = fmt; /* FAT sub-type */
|
||
8003e08: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e0a: f897 2057 ldrb.w r2, [r7, #87] ; 0x57
|
||
8003e0e: f883 2200 strb.w r2, [r3, #512] ; 0x200
|
||
fs->id = ++Fsid; /* File system mount ID */
|
||
8003e12: 4b0c ldr r3, [pc, #48] ; (8003e44 <find_volume+0x590>)
|
||
8003e14: 881b ldrh r3, [r3, #0]
|
||
8003e16: 3301 adds r3, #1
|
||
8003e18: b29a uxth r2, r3
|
||
8003e1a: 4b0a ldr r3, [pc, #40] ; (8003e44 <find_volume+0x590>)
|
||
8003e1c: 801a strh r2, [r3, #0]
|
||
8003e1e: 4b09 ldr r3, [pc, #36] ; (8003e44 <find_volume+0x590>)
|
||
8003e20: 881a ldrh r2, [r3, #0]
|
||
8003e22: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e24: f8a3 2206 strh.w r2, [r3, #518] ; 0x206
|
||
#if _FS_RPATH
|
||
fs->cdir = 0; /* Set current directory to root */
|
||
#endif
|
||
#if _FS_LOCK /* Clear file lock semaphores */
|
||
clear_lock(fs);
|
||
8003e28: 6bb8 ldr r0, [r7, #56] ; 0x38
|
||
8003e2a: f7fe fd01 bl 8002830 <clear_lock>
|
||
#endif
|
||
|
||
return FR_OK;
|
||
8003e2e: 2300 movs r3, #0
|
||
}
|
||
8003e30: 4618 mov r0, r3
|
||
8003e32: 3758 adds r7, #88 ; 0x58
|
||
8003e34: 46bd mov sp, r7
|
||
8003e36: bd80 pop {r7, pc}
|
||
8003e38: ffffaa55 .word 0xffffaa55
|
||
8003e3c: 41615252 .word 0x41615252
|
||
8003e40: 61417272 .word 0x61417272
|
||
8003e44: 20000048 .word 0x20000048
|
||
|
||
08003e48 <validate>:
|
||
|
||
static
|
||
FRESULT validate ( /* FR_OK(0): The object is valid, !=0: Invalid */
|
||
void* obj /* Pointer to the object FIL/DIR to check validity */
|
||
)
|
||
{
|
||
8003e48: b580 push {r7, lr}
|
||
8003e4a: b084 sub sp, #16
|
||
8003e4c: af00 add r7, sp, #0
|
||
8003e4e: 6078 str r0, [r7, #4]
|
||
FIL *fil = (FIL*)obj; /* Assuming offset of .fs and .id in the FIL/DIR structure is identical */
|
||
8003e50: 687b ldr r3, [r7, #4]
|
||
8003e52: 60fb str r3, [r7, #12]
|
||
|
||
|
||
if (!fil || !fil->fs || !fil->fs->fs_type || fil->fs->id != fil->id || (disk_status(fil->fs->drv) & STA_NOINIT))
|
||
8003e54: 68fb ldr r3, [r7, #12]
|
||
8003e56: 2b00 cmp r3, #0
|
||
8003e58: d022 beq.n 8003ea0 <validate+0x58>
|
||
8003e5a: 68fb ldr r3, [r7, #12]
|
||
8003e5c: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003e60: 2b00 cmp r3, #0
|
||
8003e62: d01d beq.n 8003ea0 <validate+0x58>
|
||
8003e64: 68fb ldr r3, [r7, #12]
|
||
8003e66: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003e6a: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
8003e6e: 2b00 cmp r3, #0
|
||
8003e70: d016 beq.n 8003ea0 <validate+0x58>
|
||
8003e72: 68fb ldr r3, [r7, #12]
|
||
8003e74: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003e78: f8b3 2206 ldrh.w r2, [r3, #518] ; 0x206
|
||
8003e7c: 68fb ldr r3, [r7, #12]
|
||
8003e7e: f8b3 3204 ldrh.w r3, [r3, #516] ; 0x204
|
||
8003e82: 429a cmp r2, r3
|
||
8003e84: d10c bne.n 8003ea0 <validate+0x58>
|
||
8003e86: 68fb ldr r3, [r7, #12]
|
||
8003e88: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003e8c: f893 3201 ldrb.w r3, [r3, #513] ; 0x201
|
||
8003e90: 4618 mov r0, r3
|
||
8003e92: f7fe fa8f bl 80023b4 <disk_status>
|
||
8003e96: 4603 mov r3, r0
|
||
8003e98: f003 0301 and.w r3, r3, #1
|
||
8003e9c: 2b00 cmp r3, #0
|
||
8003e9e: d001 beq.n 8003ea4 <validate+0x5c>
|
||
return FR_INVALID_OBJECT;
|
||
8003ea0: 2309 movs r3, #9
|
||
8003ea2: e000 b.n 8003ea6 <validate+0x5e>
|
||
|
||
ENTER_FF(fil->fs); /* Lock file system */
|
||
|
||
return FR_OK;
|
||
8003ea4: 2300 movs r3, #0
|
||
}
|
||
8003ea6: 4618 mov r0, r3
|
||
8003ea8: 3710 adds r7, #16
|
||
8003eaa: 46bd mov sp, r7
|
||
8003eac: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08003eb0 <f_mount>:
|
||
FRESULT f_mount (
|
||
FATFS* fs, /* Pointer to the file system object (NULL:unmount)*/
|
||
const TCHAR* path, /* Logical drive number to be mounted/unmounted */
|
||
BYTE opt /* 0:Do not mount (delayed mount), 1:Mount immediately */
|
||
)
|
||
{
|
||
8003eb0: b580 push {r7, lr}
|
||
8003eb2: b088 sub sp, #32
|
||
8003eb4: af00 add r7, sp, #0
|
||
8003eb6: 60f8 str r0, [r7, #12]
|
||
8003eb8: 60b9 str r1, [r7, #8]
|
||
8003eba: 4613 mov r3, r2
|
||
8003ebc: 71fb strb r3, [r7, #7]
|
||
FATFS *cfs;
|
||
int vol;
|
||
FRESULT res;
|
||
const TCHAR *rp = path;
|
||
8003ebe: 68bb ldr r3, [r7, #8]
|
||
8003ec0: 613b str r3, [r7, #16]
|
||
|
||
|
||
vol = get_ldnumber(&rp);
|
||
8003ec2: f107 0310 add.w r3, r7, #16
|
||
8003ec6: 4618 mov r0, r3
|
||
8003ec8: f7ff fc46 bl 8003758 <get_ldnumber>
|
||
8003ecc: 61f8 str r0, [r7, #28]
|
||
if (vol < 0) return FR_INVALID_DRIVE;
|
||
8003ece: 69fb ldr r3, [r7, #28]
|
||
8003ed0: 2b00 cmp r3, #0
|
||
8003ed2: da01 bge.n 8003ed8 <f_mount+0x28>
|
||
8003ed4: 230b movs r3, #11
|
||
8003ed6: e02d b.n 8003f34 <f_mount+0x84>
|
||
cfs = FatFs[vol]; /* Pointer to fs object */
|
||
8003ed8: 4a18 ldr r2, [pc, #96] ; (8003f3c <f_mount+0x8c>)
|
||
8003eda: 69fb ldr r3, [r7, #28]
|
||
8003edc: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
||
8003ee0: 61bb str r3, [r7, #24]
|
||
|
||
if (cfs) {
|
||
8003ee2: 69bb ldr r3, [r7, #24]
|
||
8003ee4: 2b00 cmp r3, #0
|
||
8003ee6: d006 beq.n 8003ef6 <f_mount+0x46>
|
||
#if _FS_LOCK
|
||
clear_lock(cfs);
|
||
8003ee8: 69b8 ldr r0, [r7, #24]
|
||
8003eea: f7fe fca1 bl 8002830 <clear_lock>
|
||
#endif
|
||
#if _FS_REENTRANT /* Discard sync object of the current volume */
|
||
if (!ff_del_syncobj(cfs->sobj)) return FR_INT_ERR;
|
||
#endif
|
||
cfs->fs_type = 0; /* Clear old fs object */
|
||
8003eee: 69bb ldr r3, [r7, #24]
|
||
8003ef0: 2200 movs r2, #0
|
||
8003ef2: f883 2200 strb.w r2, [r3, #512] ; 0x200
|
||
}
|
||
|
||
if (fs) {
|
||
8003ef6: 68fb ldr r3, [r7, #12]
|
||
8003ef8: 2b00 cmp r3, #0
|
||
8003efa: d003 beq.n 8003f04 <f_mount+0x54>
|
||
fs->fs_type = 0; /* Clear new fs object */
|
||
8003efc: 68fb ldr r3, [r7, #12]
|
||
8003efe: 2200 movs r2, #0
|
||
8003f00: f883 2200 strb.w r2, [r3, #512] ; 0x200
|
||
#if _FS_REENTRANT /* Create sync object for the new volume */
|
||
if (!ff_cre_syncobj((BYTE)vol, &fs->sobj)) return FR_INT_ERR;
|
||
#endif
|
||
}
|
||
FatFs[vol] = fs; /* Register new fs object */
|
||
8003f04: 68fa ldr r2, [r7, #12]
|
||
8003f06: 490d ldr r1, [pc, #52] ; (8003f3c <f_mount+0x8c>)
|
||
8003f08: 69fb ldr r3, [r7, #28]
|
||
8003f0a: f841 2023 str.w r2, [r1, r3, lsl #2]
|
||
|
||
if (!fs || opt != 1) return FR_OK; /* Do not mount now, it will be mounted later */
|
||
8003f0e: 68fb ldr r3, [r7, #12]
|
||
8003f10: 2b00 cmp r3, #0
|
||
8003f12: d002 beq.n 8003f1a <f_mount+0x6a>
|
||
8003f14: 79fb ldrb r3, [r7, #7]
|
||
8003f16: 2b01 cmp r3, #1
|
||
8003f18: d001 beq.n 8003f1e <f_mount+0x6e>
|
||
8003f1a: 2300 movs r3, #0
|
||
8003f1c: e00a b.n 8003f34 <f_mount+0x84>
|
||
|
||
res = find_volume(&fs, &path, 0); /* Force mounted the volume */
|
||
8003f1e: f107 0108 add.w r1, r7, #8
|
||
8003f22: f107 030c add.w r3, r7, #12
|
||
8003f26: 2200 movs r2, #0
|
||
8003f28: 4618 mov r0, r3
|
||
8003f2a: f7ff fcc3 bl 80038b4 <find_volume>
|
||
8003f2e: 4603 mov r3, r0
|
||
8003f30: 75fb strb r3, [r7, #23]
|
||
LEAVE_FF(fs, res);
|
||
8003f32: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
8003f34: 4618 mov r0, r3
|
||
8003f36: 3720 adds r7, #32
|
||
8003f38: 46bd mov sp, r7
|
||
8003f3a: bd80 pop {r7, pc}
|
||
8003f3c: 20000044 .word 0x20000044
|
||
|
||
08003f40 <f_open>:
|
||
FRESULT f_open (
|
||
FIL* fp, /* Pointer to the blank file object */
|
||
const TCHAR* path, /* Pointer to the file name */
|
||
BYTE mode /* Access mode and file open mode flags */
|
||
)
|
||
{
|
||
8003f40: b580 push {r7, lr}
|
||
8003f42: f5ad 7d14 sub.w sp, sp, #592 ; 0x250
|
||
8003f46: af00 add r7, sp, #0
|
||
8003f48: f107 030c add.w r3, r7, #12
|
||
8003f4c: 6018 str r0, [r3, #0]
|
||
8003f4e: f107 0308 add.w r3, r7, #8
|
||
8003f52: 6019 str r1, [r3, #0]
|
||
8003f54: 1dfb adds r3, r7, #7
|
||
8003f56: 701a strb r2, [r3, #0]
|
||
#if !_FS_READONLY
|
||
DWORD dw, cl;
|
||
#endif
|
||
|
||
|
||
if (!fp) return FR_INVALID_OBJECT;
|
||
8003f58: f107 030c add.w r3, r7, #12
|
||
8003f5c: 681b ldr r3, [r3, #0]
|
||
8003f5e: 2b00 cmp r3, #0
|
||
8003f60: d101 bne.n 8003f66 <f_open+0x26>
|
||
8003f62: 2309 movs r3, #9
|
||
8003f64: e1f2 b.n 800434c <f_open+0x40c>
|
||
fp->fs = 0; /* Clear file object */
|
||
8003f66: f107 030c add.w r3, r7, #12
|
||
8003f6a: 681b ldr r3, [r3, #0]
|
||
8003f6c: 2200 movs r2, #0
|
||
8003f6e: f8c3 2200 str.w r2, [r3, #512] ; 0x200
|
||
|
||
/* Get logical drive number */
|
||
#if !_FS_READONLY
|
||
mode &= FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW;
|
||
8003f72: 1dfb adds r3, r7, #7
|
||
8003f74: 1dfa adds r2, r7, #7
|
||
8003f76: 7812 ldrb r2, [r2, #0]
|
||
8003f78: f002 021f and.w r2, r2, #31
|
||
8003f7c: 701a strb r2, [r3, #0]
|
||
res = find_volume(&dj.fs, &path, (BYTE)(mode & ~FA_READ));
|
||
8003f7e: 1dfb adds r3, r7, #7
|
||
8003f80: 781b ldrb r3, [r3, #0]
|
||
8003f82: f023 0301 bic.w r3, r3, #1
|
||
8003f86: b2da uxtb r2, r3
|
||
8003f88: f107 0108 add.w r1, r7, #8
|
||
8003f8c: f107 0320 add.w r3, r7, #32
|
||
8003f90: f503 7300 add.w r3, r3, #512 ; 0x200
|
||
8003f94: 4618 mov r0, r3
|
||
8003f96: f7ff fc8d bl 80038b4 <find_volume>
|
||
8003f9a: 4603 mov r3, r0
|
||
8003f9c: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
#else
|
||
mode &= FA_READ;
|
||
res = find_volume(&dj.fs, &path, 0);
|
||
#endif
|
||
if (res == FR_OK) {
|
||
8003fa0: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
8003fa4: 2b00 cmp r3, #0
|
||
8003fa6: f040 81cf bne.w 8004348 <f_open+0x408>
|
||
INIT_BUF(dj);
|
||
8003faa: f107 0320 add.w r3, r7, #32
|
||
8003fae: f107 0214 add.w r2, r7, #20
|
||
8003fb2: f8c3 2218 str.w r2, [r3, #536] ; 0x218
|
||
res = follow_path(&dj, path); /* Follow the file path */
|
||
8003fb6: f107 0308 add.w r3, r7, #8
|
||
8003fba: 681a ldr r2, [r3, #0]
|
||
8003fbc: f107 0320 add.w r3, r7, #32
|
||
8003fc0: 4611 mov r1, r2
|
||
8003fc2: 4618 mov r0, r3
|
||
8003fc4: f7ff fb5a bl 800367c <follow_path>
|
||
8003fc8: 4603 mov r3, r0
|
||
8003fca: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
dir = dj.dir;
|
||
8003fce: f107 0320 add.w r3, r7, #32
|
||
8003fd2: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8003fd6: f8c7 3248 str.w r3, [r7, #584] ; 0x248
|
||
#if !_FS_READONLY /* R/W configuration */
|
||
if (res == FR_OK) {
|
||
8003fda: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
8003fde: 2b00 cmp r3, #0
|
||
8003fe0: d11a bne.n 8004018 <f_open+0xd8>
|
||
if (!dir) /* Default directory itself */
|
||
8003fe2: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
8003fe6: 2b00 cmp r3, #0
|
||
8003fe8: d103 bne.n 8003ff2 <f_open+0xb2>
|
||
res = FR_INVALID_NAME;
|
||
8003fea: 2306 movs r3, #6
|
||
8003fec: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
8003ff0: e012 b.n 8004018 <f_open+0xd8>
|
||
#if _FS_LOCK
|
||
else
|
||
res = chk_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
|
||
8003ff2: 1dfb adds r3, r7, #7
|
||
8003ff4: 781b ldrb r3, [r3, #0]
|
||
8003ff6: f023 0301 bic.w r3, r3, #1
|
||
8003ffa: 2b00 cmp r3, #0
|
||
8003ffc: bf14 ite ne
|
||
8003ffe: 2301 movne r3, #1
|
||
8004000: 2300 moveq r3, #0
|
||
8004002: b2db uxtb r3, r3
|
||
8004004: 461a mov r2, r3
|
||
8004006: f107 0320 add.w r3, r7, #32
|
||
800400a: 4611 mov r1, r2
|
||
800400c: 4618 mov r0, r3
|
||
800400e: f7fe fac9 bl 80025a4 <chk_lock>
|
||
8004012: 4603 mov r3, r0
|
||
8004014: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
#endif
|
||
}
|
||
/* Create or Open a file */
|
||
if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) {
|
||
8004018: 1dfb adds r3, r7, #7
|
||
800401a: 781b ldrb r3, [r3, #0]
|
||
800401c: f003 031c and.w r3, r3, #28
|
||
8004020: 2b00 cmp r3, #0
|
||
8004022: f000 80cc beq.w 80041be <f_open+0x27e>
|
||
if (res != FR_OK) { /* No file, create new */
|
||
8004026: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
800402a: 2b00 cmp r3, #0
|
||
800402c: d01f beq.n 800406e <f_open+0x12e>
|
||
if (res == FR_NO_FILE) /* There is no file to open, create a new entry */
|
||
800402e: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
8004032: 2b04 cmp r3, #4
|
||
8004034: d10e bne.n 8004054 <f_open+0x114>
|
||
#if _FS_LOCK
|
||
res = enq_lock() ? dir_register(&dj) : FR_TOO_MANY_OPEN_FILES;
|
||
8004036: f7fe fb21 bl 800267c <enq_lock>
|
||
800403a: 4603 mov r3, r0
|
||
800403c: 2b00 cmp r3, #0
|
||
800403e: d006 beq.n 800404e <f_open+0x10e>
|
||
8004040: f107 0320 add.w r3, r7, #32
|
||
8004044: 4618 mov r0, r3
|
||
8004046: f7ff fa1f bl 8003488 <dir_register>
|
||
800404a: 4603 mov r3, r0
|
||
800404c: e000 b.n 8004050 <f_open+0x110>
|
||
800404e: 2312 movs r3, #18
|
||
8004050: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
#else
|
||
res = dir_register(&dj);
|
||
#endif
|
||
mode |= FA_CREATE_ALWAYS; /* File is created */
|
||
8004054: 1dfb adds r3, r7, #7
|
||
8004056: 1dfa adds r2, r7, #7
|
||
8004058: 7812 ldrb r2, [r2, #0]
|
||
800405a: f042 0208 orr.w r2, r2, #8
|
||
800405e: 701a strb r2, [r3, #0]
|
||
dir = dj.dir; /* New entry */
|
||
8004060: f107 0320 add.w r3, r7, #32
|
||
8004064: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8004068: f8c7 3248 str.w r3, [r7, #584] ; 0x248
|
||
800406c: e014 b.n 8004098 <f_open+0x158>
|
||
}
|
||
else { /* Any object is already existing */
|
||
if (dir[DIR_Attr] & (AM_RDO | AM_DIR)) { /* Cannot overwrite it (R/O or DIR) */
|
||
800406e: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
8004072: 330b adds r3, #11
|
||
8004074: 781b ldrb r3, [r3, #0]
|
||
8004076: f003 0311 and.w r3, r3, #17
|
||
800407a: 2b00 cmp r3, #0
|
||
800407c: d003 beq.n 8004086 <f_open+0x146>
|
||
res = FR_DENIED;
|
||
800407e: 2307 movs r3, #7
|
||
8004080: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
8004084: e008 b.n 8004098 <f_open+0x158>
|
||
} else {
|
||
if (mode & FA_CREATE_NEW) /* Cannot create as new file */
|
||
8004086: 1dfb adds r3, r7, #7
|
||
8004088: 781b ldrb r3, [r3, #0]
|
||
800408a: f003 0304 and.w r3, r3, #4
|
||
800408e: 2b00 cmp r3, #0
|
||
8004090: d002 beq.n 8004098 <f_open+0x158>
|
||
res = FR_EXIST;
|
||
8004092: 2308 movs r3, #8
|
||
8004094: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
}
|
||
}
|
||
if (res == FR_OK && (mode & FA_CREATE_ALWAYS)) { /* Truncate it if overwrite mode */
|
||
8004098: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
800409c: 2b00 cmp r3, #0
|
||
800409e: f040 80af bne.w 8004200 <f_open+0x2c0>
|
||
80040a2: 1dfb adds r3, r7, #7
|
||
80040a4: 781b ldrb r3, [r3, #0]
|
||
80040a6: f003 0308 and.w r3, r3, #8
|
||
80040aa: 2b00 cmp r3, #0
|
||
80040ac: f000 80a8 beq.w 8004200 <f_open+0x2c0>
|
||
dw = GET_FATTIME(); /* Created time */
|
||
80040b0: f7fe f910 bl 80022d4 <get_fattime>
|
||
80040b4: f8c7 0244 str.w r0, [r7, #580] ; 0x244
|
||
ST_DWORD(dir + DIR_CrtTime, dw);
|
||
80040b8: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80040bc: 330e adds r3, #14
|
||
80040be: f8d7 2244 ldr.w r2, [r7, #580] ; 0x244
|
||
80040c2: b2d2 uxtb r2, r2
|
||
80040c4: 701a strb r2, [r3, #0]
|
||
80040c6: f8d7 3244 ldr.w r3, [r7, #580] ; 0x244
|
||
80040ca: b29b uxth r3, r3
|
||
80040cc: 0a1b lsrs r3, r3, #8
|
||
80040ce: b29a uxth r2, r3
|
||
80040d0: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80040d4: 330f adds r3, #15
|
||
80040d6: b2d2 uxtb r2, r2
|
||
80040d8: 701a strb r2, [r3, #0]
|
||
80040da: f8d7 3244 ldr.w r3, [r7, #580] ; 0x244
|
||
80040de: 0c1a lsrs r2, r3, #16
|
||
80040e0: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80040e4: 3310 adds r3, #16
|
||
80040e6: b2d2 uxtb r2, r2
|
||
80040e8: 701a strb r2, [r3, #0]
|
||
80040ea: f8d7 3244 ldr.w r3, [r7, #580] ; 0x244
|
||
80040ee: 0e1a lsrs r2, r3, #24
|
||
80040f0: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80040f4: 3311 adds r3, #17
|
||
80040f6: b2d2 uxtb r2, r2
|
||
80040f8: 701a strb r2, [r3, #0]
|
||
dir[DIR_Attr] = 0; /* Reset attribute */
|
||
80040fa: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80040fe: 330b adds r3, #11
|
||
8004100: 2200 movs r2, #0
|
||
8004102: 701a strb r2, [r3, #0]
|
||
ST_DWORD(dir + DIR_FileSize, 0);/* size = 0 */
|
||
8004104: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
8004108: 331c adds r3, #28
|
||
800410a: 2200 movs r2, #0
|
||
800410c: 701a strb r2, [r3, #0]
|
||
800410e: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
8004112: 331d adds r3, #29
|
||
8004114: 2200 movs r2, #0
|
||
8004116: 701a strb r2, [r3, #0]
|
||
8004118: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
800411c: 331e adds r3, #30
|
||
800411e: 2200 movs r2, #0
|
||
8004120: 701a strb r2, [r3, #0]
|
||
8004122: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
8004126: 331f adds r3, #31
|
||
8004128: 2200 movs r2, #0
|
||
800412a: 701a strb r2, [r3, #0]
|
||
cl = ld_clust(dj.fs, dir); /* Get start cluster */
|
||
800412c: f107 0320 add.w r3, r7, #32
|
||
8004130: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8004134: f8d7 1248 ldr.w r1, [r7, #584] ; 0x248
|
||
8004138: 4618 mov r0, r3
|
||
800413a: f7ff f903 bl 8003344 <ld_clust>
|
||
800413e: f8c7 0240 str.w r0, [r7, #576] ; 0x240
|
||
st_clust(dir, 0); /* cluster = 0 */
|
||
8004142: 2100 movs r1, #0
|
||
8004144: f8d7 0248 ldr.w r0, [r7, #584] ; 0x248
|
||
8004148: f7ff f929 bl 800339e <st_clust>
|
||
dj.fs->wflag = 1;
|
||
800414c: f107 0320 add.w r3, r7, #32
|
||
8004150: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8004154: 2201 movs r2, #1
|
||
8004156: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
if (cl) { /* Remove the cluster chain if exist */
|
||
800415a: f8d7 3240 ldr.w r3, [r7, #576] ; 0x240
|
||
800415e: 2b00 cmp r3, #0
|
||
8004160: d04e beq.n 8004200 <f_open+0x2c0>
|
||
dw = dj.fs->winsect;
|
||
8004162: f107 0320 add.w r3, r7, #32
|
||
8004166: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800416a: f8d3 322c ldr.w r3, [r3, #556] ; 0x22c
|
||
800416e: f8c7 3244 str.w r3, [r7, #580] ; 0x244
|
||
res = remove_chain(dj.fs, cl);
|
||
8004172: f107 0320 add.w r3, r7, #32
|
||
8004176: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800417a: f8d7 1240 ldr.w r1, [r7, #576] ; 0x240
|
||
800417e: 4618 mov r0, r3
|
||
8004180: f7fe fde0 bl 8002d44 <remove_chain>
|
||
8004184: 4603 mov r3, r0
|
||
8004186: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
if (res == FR_OK) {
|
||
800418a: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
800418e: 2b00 cmp r3, #0
|
||
8004190: d136 bne.n 8004200 <f_open+0x2c0>
|
||
dj.fs->last_clust = cl - 1; /* Reuse the cluster hole */
|
||
8004192: f107 0320 add.w r3, r7, #32
|
||
8004196: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800419a: f8d7 2240 ldr.w r2, [r7, #576] ; 0x240
|
||
800419e: 3a01 subs r2, #1
|
||
80041a0: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
res = move_window(dj.fs, dw);
|
||
80041a4: f107 0320 add.w r3, r7, #32
|
||
80041a8: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80041ac: f8d7 1244 ldr.w r1, [r7, #580] ; 0x244
|
||
80041b0: 4618 mov r0, r3
|
||
80041b2: f7fe fbb0 bl 8002916 <move_window>
|
||
80041b6: 4603 mov r3, r0
|
||
80041b8: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
80041bc: e020 b.n 8004200 <f_open+0x2c0>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
else { /* Open an existing file */
|
||
if (res == FR_OK) { /* Follow succeeded */
|
||
80041be: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
80041c2: 2b00 cmp r3, #0
|
||
80041c4: d11c bne.n 8004200 <f_open+0x2c0>
|
||
if (dir[DIR_Attr] & AM_DIR) { /* It is a directory */
|
||
80041c6: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80041ca: 330b adds r3, #11
|
||
80041cc: 781b ldrb r3, [r3, #0]
|
||
80041ce: f003 0310 and.w r3, r3, #16
|
||
80041d2: 2b00 cmp r3, #0
|
||
80041d4: d003 beq.n 80041de <f_open+0x29e>
|
||
res = FR_NO_FILE;
|
||
80041d6: 2304 movs r3, #4
|
||
80041d8: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
80041dc: e010 b.n 8004200 <f_open+0x2c0>
|
||
} else {
|
||
if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */
|
||
80041de: 1dfb adds r3, r7, #7
|
||
80041e0: 781b ldrb r3, [r3, #0]
|
||
80041e2: f003 0302 and.w r3, r3, #2
|
||
80041e6: 2b00 cmp r3, #0
|
||
80041e8: d00a beq.n 8004200 <f_open+0x2c0>
|
||
80041ea: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80041ee: 330b adds r3, #11
|
||
80041f0: 781b ldrb r3, [r3, #0]
|
||
80041f2: f003 0301 and.w r3, r3, #1
|
||
80041f6: 2b00 cmp r3, #0
|
||
80041f8: d002 beq.n 8004200 <f_open+0x2c0>
|
||
res = FR_DENIED;
|
||
80041fa: 2307 movs r3, #7
|
||
80041fc: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
}
|
||
}
|
||
}
|
||
if (res == FR_OK) {
|
||
8004200: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
8004204: 2b00 cmp r3, #0
|
||
8004206: d13d bne.n 8004284 <f_open+0x344>
|
||
if (mode & FA_CREATE_ALWAYS) /* Set file change flag if created or overwritten */
|
||
8004208: 1dfb adds r3, r7, #7
|
||
800420a: 781b ldrb r3, [r3, #0]
|
||
800420c: f003 0308 and.w r3, r3, #8
|
||
8004210: 2b00 cmp r3, #0
|
||
8004212: d005 beq.n 8004220 <f_open+0x2e0>
|
||
mode |= FA__WRITTEN;
|
||
8004214: 1dfb adds r3, r7, #7
|
||
8004216: 1dfa adds r2, r7, #7
|
||
8004218: 7812 ldrb r2, [r2, #0]
|
||
800421a: f042 0220 orr.w r2, r2, #32
|
||
800421e: 701a strb r2, [r3, #0]
|
||
fp->dir_sect = dj.fs->winsect; /* Pointer to the directory entry */
|
||
8004220: f107 0320 add.w r3, r7, #32
|
||
8004224: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8004228: f8d3 222c ldr.w r2, [r3, #556] ; 0x22c
|
||
800422c: f107 030c add.w r3, r7, #12
|
||
8004230: 681b ldr r3, [r3, #0]
|
||
8004232: f8c3 221c str.w r2, [r3, #540] ; 0x21c
|
||
fp->dir_ptr = dir;
|
||
8004236: f107 030c add.w r3, r7, #12
|
||
800423a: 681b ldr r3, [r3, #0]
|
||
800423c: f8d7 2248 ldr.w r2, [r7, #584] ; 0x248
|
||
8004240: f8c3 2220 str.w r2, [r3, #544] ; 0x220
|
||
#if _FS_LOCK
|
||
fp->lockid = inc_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
|
||
8004244: 1dfb adds r3, r7, #7
|
||
8004246: 781b ldrb r3, [r3, #0]
|
||
8004248: f023 0301 bic.w r3, r3, #1
|
||
800424c: 2b00 cmp r3, #0
|
||
800424e: bf14 ite ne
|
||
8004250: 2301 movne r3, #1
|
||
8004252: 2300 moveq r3, #0
|
||
8004254: b2db uxtb r3, r3
|
||
8004256: 461a mov r2, r3
|
||
8004258: f107 0320 add.w r3, r7, #32
|
||
800425c: 4611 mov r1, r2
|
||
800425e: 4618 mov r0, r3
|
||
8004260: f7fe fa30 bl 80026c4 <inc_lock>
|
||
8004264: 4602 mov r2, r0
|
||
8004266: f107 030c add.w r3, r7, #12
|
||
800426a: 681b ldr r3, [r3, #0]
|
||
800426c: f8c3 2228 str.w r2, [r3, #552] ; 0x228
|
||
if (!fp->lockid) res = FR_INT_ERR;
|
||
8004270: f107 030c add.w r3, r7, #12
|
||
8004274: 681b ldr r3, [r3, #0]
|
||
8004276: f8d3 3228 ldr.w r3, [r3, #552] ; 0x228
|
||
800427a: 2b00 cmp r3, #0
|
||
800427c: d102 bne.n 8004284 <f_open+0x344>
|
||
800427e: 2302 movs r3, #2
|
||
8004280: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
}
|
||
}
|
||
#endif
|
||
FREE_BUF();
|
||
|
||
if (res == FR_OK) {
|
||
8004284: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
8004288: 2b00 cmp r3, #0
|
||
800428a: d15d bne.n 8004348 <f_open+0x408>
|
||
fp->flag = mode; /* File access mode */
|
||
800428c: f107 030c add.w r3, r7, #12
|
||
8004290: 681b ldr r3, [r3, #0]
|
||
8004292: 1dfa adds r2, r7, #7
|
||
8004294: 7812 ldrb r2, [r2, #0]
|
||
8004296: f883 2206 strb.w r2, [r3, #518] ; 0x206
|
||
fp->err = 0; /* Clear error flag */
|
||
800429a: f107 030c add.w r3, r7, #12
|
||
800429e: 681b ldr r3, [r3, #0]
|
||
80042a0: 2200 movs r2, #0
|
||
80042a2: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
fp->sclust = ld_clust(dj.fs, dir); /* File start cluster */
|
||
80042a6: f107 0320 add.w r3, r7, #32
|
||
80042aa: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80042ae: f8d7 1248 ldr.w r1, [r7, #584] ; 0x248
|
||
80042b2: 4618 mov r0, r3
|
||
80042b4: f7ff f846 bl 8003344 <ld_clust>
|
||
80042b8: 4602 mov r2, r0
|
||
80042ba: f107 030c add.w r3, r7, #12
|
||
80042be: 681b ldr r3, [r3, #0]
|
||
80042c0: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
fp->fsize = LD_DWORD(dir + DIR_FileSize); /* File size */
|
||
80042c4: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80042c8: 331f adds r3, #31
|
||
80042ca: 781b ldrb r3, [r3, #0]
|
||
80042cc: 061a lsls r2, r3, #24
|
||
80042ce: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80042d2: 331e adds r3, #30
|
||
80042d4: 781b ldrb r3, [r3, #0]
|
||
80042d6: 041b lsls r3, r3, #16
|
||
80042d8: 4313 orrs r3, r2
|
||
80042da: f8d7 2248 ldr.w r2, [r7, #584] ; 0x248
|
||
80042de: 321d adds r2, #29
|
||
80042e0: 7812 ldrb r2, [r2, #0]
|
||
80042e2: 0212 lsls r2, r2, #8
|
||
80042e4: 4313 orrs r3, r2
|
||
80042e6: f8d7 2248 ldr.w r2, [r7, #584] ; 0x248
|
||
80042ea: 321c adds r2, #28
|
||
80042ec: 7812 ldrb r2, [r2, #0]
|
||
80042ee: 431a orrs r2, r3
|
||
80042f0: f107 030c add.w r3, r7, #12
|
||
80042f4: 681b ldr r3, [r3, #0]
|
||
80042f6: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
fp->fptr = 0; /* File pointer */
|
||
80042fa: f107 030c add.w r3, r7, #12
|
||
80042fe: 681b ldr r3, [r3, #0]
|
||
8004300: 2200 movs r2, #0
|
||
8004302: f8c3 2208 str.w r2, [r3, #520] ; 0x208
|
||
fp->dsect = 0;
|
||
8004306: f107 030c add.w r3, r7, #12
|
||
800430a: 681b ldr r3, [r3, #0]
|
||
800430c: 2200 movs r2, #0
|
||
800430e: f8c3 2218 str.w r2, [r3, #536] ; 0x218
|
||
#if _USE_FASTSEEK
|
||
fp->cltbl = 0; /* Normal seek mode */
|
||
8004312: f107 030c add.w r3, r7, #12
|
||
8004316: 681b ldr r3, [r3, #0]
|
||
8004318: 2200 movs r2, #0
|
||
800431a: f8c3 2224 str.w r2, [r3, #548] ; 0x224
|
||
#endif
|
||
fp->fs = dj.fs; /* Validate file object */
|
||
800431e: f107 0320 add.w r3, r7, #32
|
||
8004322: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
8004326: f107 030c add.w r3, r7, #12
|
||
800432a: 681b ldr r3, [r3, #0]
|
||
800432c: f8c3 2200 str.w r2, [r3, #512] ; 0x200
|
||
fp->id = fp->fs->id;
|
||
8004330: f107 030c add.w r3, r7, #12
|
||
8004334: 681b ldr r3, [r3, #0]
|
||
8004336: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800433a: f8b3 2206 ldrh.w r2, [r3, #518] ; 0x206
|
||
800433e: f107 030c add.w r3, r7, #12
|
||
8004342: 681b ldr r3, [r3, #0]
|
||
8004344: f8a3 2204 strh.w r2, [r3, #516] ; 0x204
|
||
}
|
||
}
|
||
|
||
LEAVE_FF(dj.fs, res);
|
||
8004348: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
}
|
||
800434c: 4618 mov r0, r3
|
||
800434e: f507 7714 add.w r7, r7, #592 ; 0x250
|
||
8004352: 46bd mov sp, r7
|
||
8004354: bd80 pop {r7, pc}
|
||
|
||
08004356 <f_read>:
|
||
FIL* fp, /* Pointer to the file object */
|
||
void* buff, /* Pointer to data buffer */
|
||
UINT btr, /* Number of bytes to read */
|
||
UINT* br /* Pointer to number of bytes read */
|
||
)
|
||
{
|
||
8004356: b580 push {r7, lr}
|
||
8004358: b08c sub sp, #48 ; 0x30
|
||
800435a: af00 add r7, sp, #0
|
||
800435c: 60f8 str r0, [r7, #12]
|
||
800435e: 60b9 str r1, [r7, #8]
|
||
8004360: 607a str r2, [r7, #4]
|
||
8004362: 603b str r3, [r7, #0]
|
||
FRESULT res;
|
||
DWORD clst, sect, remain;
|
||
UINT rcnt, cc;
|
||
BYTE csect, *rbuff = (BYTE*)buff;
|
||
8004364: 68bb ldr r3, [r7, #8]
|
||
8004366: 623b str r3, [r7, #32]
|
||
|
||
|
||
*br = 0; /* Clear read byte counter */
|
||
8004368: 683b ldr r3, [r7, #0]
|
||
800436a: 2200 movs r2, #0
|
||
800436c: 601a str r2, [r3, #0]
|
||
|
||
res = validate(fp); /* Check validity */
|
||
800436e: 68f8 ldr r0, [r7, #12]
|
||
8004370: f7ff fd6a bl 8003e48 <validate>
|
||
8004374: 4603 mov r3, r0
|
||
8004376: 77fb strb r3, [r7, #31]
|
||
if (res != FR_OK) LEAVE_FF(fp->fs, res);
|
||
8004378: 7ffb ldrb r3, [r7, #31]
|
||
800437a: 2b00 cmp r3, #0
|
||
800437c: d001 beq.n 8004382 <f_read+0x2c>
|
||
800437e: 7ffb ldrb r3, [r7, #31]
|
||
8004380: e150 b.n 8004624 <f_read+0x2ce>
|
||
if (fp->err) /* Check error */
|
||
8004382: 68fb ldr r3, [r7, #12]
|
||
8004384: f893 3207 ldrb.w r3, [r3, #519] ; 0x207
|
||
8004388: 2b00 cmp r3, #0
|
||
800438a: d003 beq.n 8004394 <f_read+0x3e>
|
||
LEAVE_FF(fp->fs, (FRESULT)fp->err);
|
||
800438c: 68fb ldr r3, [r7, #12]
|
||
800438e: f893 3207 ldrb.w r3, [r3, #519] ; 0x207
|
||
8004392: e147 b.n 8004624 <f_read+0x2ce>
|
||
if (!(fp->flag & FA_READ)) /* Check access mode */
|
||
8004394: 68fb ldr r3, [r7, #12]
|
||
8004396: f893 3206 ldrb.w r3, [r3, #518] ; 0x206
|
||
800439a: f003 0301 and.w r3, r3, #1
|
||
800439e: 2b00 cmp r3, #0
|
||
80043a0: d101 bne.n 80043a6 <f_read+0x50>
|
||
LEAVE_FF(fp->fs, FR_DENIED);
|
||
80043a2: 2307 movs r3, #7
|
||
80043a4: e13e b.n 8004624 <f_read+0x2ce>
|
||
remain = fp->fsize - fp->fptr;
|
||
80043a6: 68fb ldr r3, [r7, #12]
|
||
80043a8: f8d3 220c ldr.w r2, [r3, #524] ; 0x20c
|
||
80043ac: 68fb ldr r3, [r7, #12]
|
||
80043ae: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
80043b2: 1ad3 subs r3, r2, r3
|
||
80043b4: 61bb str r3, [r7, #24]
|
||
if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */
|
||
80043b6: 687a ldr r2, [r7, #4]
|
||
80043b8: 69bb ldr r3, [r7, #24]
|
||
80043ba: 429a cmp r2, r3
|
||
80043bc: f240 812d bls.w 800461a <f_read+0x2c4>
|
||
80043c0: 69bb ldr r3, [r7, #24]
|
||
80043c2: 607b str r3, [r7, #4]
|
||
|
||
for ( ; btr; /* Repeat until all data read */
|
||
80043c4: e129 b.n 800461a <f_read+0x2c4>
|
||
rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {
|
||
if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */
|
||
80043c6: 68fb ldr r3, [r7, #12]
|
||
80043c8: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
80043cc: f3c3 0308 ubfx r3, r3, #0, #9
|
||
80043d0: 2b00 cmp r3, #0
|
||
80043d2: f040 80f2 bne.w 80045ba <f_read+0x264>
|
||
csect = (BYTE)(fp->fptr / SS(fp->fs) & (fp->fs->csize - 1)); /* Sector offset in the cluster */
|
||
80043d6: 68fb ldr r3, [r7, #12]
|
||
80043d8: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
80043dc: 0a5b lsrs r3, r3, #9
|
||
80043de: b2da uxtb r2, r3
|
||
80043e0: 68fb ldr r3, [r7, #12]
|
||
80043e2: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80043e6: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
80043ea: 3b01 subs r3, #1
|
||
80043ec: b2db uxtb r3, r3
|
||
80043ee: 4013 ands r3, r2
|
||
80043f0: 75fb strb r3, [r7, #23]
|
||
if (!csect) { /* On the cluster boundary? */
|
||
80043f2: 7dfb ldrb r3, [r7, #23]
|
||
80043f4: 2b00 cmp r3, #0
|
||
80043f6: d139 bne.n 800446c <f_read+0x116>
|
||
if (fp->fptr == 0) { /* On the top of the file? */
|
||
80043f8: 68fb ldr r3, [r7, #12]
|
||
80043fa: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
80043fe: 2b00 cmp r3, #0
|
||
8004400: d104 bne.n 800440c <f_read+0xb6>
|
||
clst = fp->sclust; /* Follow from the origin */
|
||
8004402: 68fb ldr r3, [r7, #12]
|
||
8004404: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8004408: 62fb str r3, [r7, #44] ; 0x2c
|
||
800440a: e018 b.n 800443e <f_read+0xe8>
|
||
} else { /* Middle or end of the file */
|
||
#if _USE_FASTSEEK
|
||
if (fp->cltbl)
|
||
800440c: 68fb ldr r3, [r7, #12]
|
||
800440e: f8d3 3224 ldr.w r3, [r3, #548] ; 0x224
|
||
8004412: 2b00 cmp r3, #0
|
||
8004414: d008 beq.n 8004428 <f_read+0xd2>
|
||
clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */
|
||
8004416: 68fb ldr r3, [r7, #12]
|
||
8004418: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
800441c: 4619 mov r1, r3
|
||
800441e: 68f8 ldr r0, [r7, #12]
|
||
8004420: f7fe fd87 bl 8002f32 <clmt_clust>
|
||
8004424: 62f8 str r0, [r7, #44] ; 0x2c
|
||
8004426: e00a b.n 800443e <f_read+0xe8>
|
||
else
|
||
#endif
|
||
clst = get_fat(fp->fs, fp->clust); /* Follow cluster chain on the FAT */
|
||
8004428: 68fb ldr r3, [r7, #12]
|
||
800442a: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
800442e: 68fb ldr r3, [r7, #12]
|
||
8004430: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8004434: 4619 mov r1, r3
|
||
8004436: 4610 mov r0, r2
|
||
8004438: f7fe fabc bl 80029b4 <get_fat>
|
||
800443c: 62f8 str r0, [r7, #44] ; 0x2c
|
||
}
|
||
if (clst < 2) ABORT(fp->fs, FR_INT_ERR);
|
||
800443e: 6afb ldr r3, [r7, #44] ; 0x2c
|
||
8004440: 2b01 cmp r3, #1
|
||
8004442: d805 bhi.n 8004450 <f_read+0xfa>
|
||
8004444: 68fb ldr r3, [r7, #12]
|
||
8004446: 2202 movs r2, #2
|
||
8004448: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
800444c: 2302 movs r3, #2
|
||
800444e: e0e9 b.n 8004624 <f_read+0x2ce>
|
||
if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
|
||
8004450: 6afb ldr r3, [r7, #44] ; 0x2c
|
||
8004452: f1b3 3fff cmp.w r3, #4294967295
|
||
8004456: d105 bne.n 8004464 <f_read+0x10e>
|
||
8004458: 68fb ldr r3, [r7, #12]
|
||
800445a: 2201 movs r2, #1
|
||
800445c: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
8004460: 2301 movs r3, #1
|
||
8004462: e0df b.n 8004624 <f_read+0x2ce>
|
||
fp->clust = clst; /* Update current cluster */
|
||
8004464: 68fb ldr r3, [r7, #12]
|
||
8004466: 6afa ldr r2, [r7, #44] ; 0x2c
|
||
8004468: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
||
}
|
||
sect = clust2sect(fp->fs, fp->clust); /* Get current sector */
|
||
800446c: 68fb ldr r3, [r7, #12]
|
||
800446e: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
8004472: 68fb ldr r3, [r7, #12]
|
||
8004474: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8004478: 4619 mov r1, r3
|
||
800447a: 4610 mov r0, r2
|
||
800447c: f7fe fa79 bl 8002972 <clust2sect>
|
||
8004480: 6138 str r0, [r7, #16]
|
||
if (!sect) ABORT(fp->fs, FR_INT_ERR);
|
||
8004482: 693b ldr r3, [r7, #16]
|
||
8004484: 2b00 cmp r3, #0
|
||
8004486: d105 bne.n 8004494 <f_read+0x13e>
|
||
8004488: 68fb ldr r3, [r7, #12]
|
||
800448a: 2202 movs r2, #2
|
||
800448c: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
8004490: 2302 movs r3, #2
|
||
8004492: e0c7 b.n 8004624 <f_read+0x2ce>
|
||
sect += csect;
|
||
8004494: 7dfb ldrb r3, [r7, #23]
|
||
8004496: 693a ldr r2, [r7, #16]
|
||
8004498: 4413 add r3, r2
|
||
800449a: 613b str r3, [r7, #16]
|
||
cc = btr / SS(fp->fs); /* When remaining bytes >= sector size, */
|
||
800449c: 687b ldr r3, [r7, #4]
|
||
800449e: 0a5b lsrs r3, r3, #9
|
||
80044a0: 627b str r3, [r7, #36] ; 0x24
|
||
if (cc) { /* Read maximum contiguous sectors directly */
|
||
80044a2: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80044a4: 2b00 cmp r3, #0
|
||
80044a6: d046 beq.n 8004536 <f_read+0x1e0>
|
||
if (csect + cc > fp->fs->csize) /* Clip at cluster boundary */
|
||
80044a8: 7dfa ldrb r2, [r7, #23]
|
||
80044aa: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80044ac: 4413 add r3, r2
|
||
80044ae: 68fa ldr r2, [r7, #12]
|
||
80044b0: f8d2 2200 ldr.w r2, [r2, #512] ; 0x200
|
||
80044b4: f892 2202 ldrb.w r2, [r2, #514] ; 0x202
|
||
80044b8: 4293 cmp r3, r2
|
||
80044ba: d908 bls.n 80044ce <f_read+0x178>
|
||
cc = fp->fs->csize - csect;
|
||
80044bc: 68fb ldr r3, [r7, #12]
|
||
80044be: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80044c2: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
80044c6: 461a mov r2, r3
|
||
80044c8: 7dfb ldrb r3, [r7, #23]
|
||
80044ca: 1ad3 subs r3, r2, r3
|
||
80044cc: 627b str r3, [r7, #36] ; 0x24
|
||
if (disk_read(fp->fs->drv, rbuff, sect, cc) != RES_OK)
|
||
80044ce: 68fb ldr r3, [r7, #12]
|
||
80044d0: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80044d4: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
80044d8: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80044da: 693a ldr r2, [r7, #16]
|
||
80044dc: 6a39 ldr r1, [r7, #32]
|
||
80044de: f7fd ffa9 bl 8002434 <disk_read>
|
||
80044e2: 4603 mov r3, r0
|
||
80044e4: 2b00 cmp r3, #0
|
||
80044e6: d005 beq.n 80044f4 <f_read+0x19e>
|
||
ABORT(fp->fs, FR_DISK_ERR);
|
||
80044e8: 68fb ldr r3, [r7, #12]
|
||
80044ea: 2201 movs r2, #1
|
||
80044ec: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
80044f0: 2301 movs r3, #1
|
||
80044f2: e097 b.n 8004624 <f_read+0x2ce>
|
||
#if !_FS_READONLY && _FS_MINIMIZE <= 2 /* Replace one of the read sectors with cached data if it contains a dirty sector */
|
||
#if _FS_TINY
|
||
if (fp->fs->wflag && fp->fs->winsect - sect < cc)
|
||
mem_cpy(rbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), fp->fs->win.d8, SS(fp->fs));
|
||
#else
|
||
if ((fp->flag & FA__DIRTY) && fp->dsect - sect < cc)
|
||
80044f4: 68fb ldr r3, [r7, #12]
|
||
80044f6: f893 3206 ldrb.w r3, [r3, #518] ; 0x206
|
||
80044fa: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
80044fe: 2b00 cmp r3, #0
|
||
8004500: d015 beq.n 800452e <f_read+0x1d8>
|
||
8004502: 68fb ldr r3, [r7, #12]
|
||
8004504: f8d3 2218 ldr.w r2, [r3, #536] ; 0x218
|
||
8004508: 693b ldr r3, [r7, #16]
|
||
800450a: 1ad3 subs r3, r2, r3
|
||
800450c: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
800450e: 429a cmp r2, r3
|
||
8004510: d90d bls.n 800452e <f_read+0x1d8>
|
||
mem_cpy(rbuff + ((fp->dsect - sect) * SS(fp->fs)), fp->buf.d8, SS(fp->fs));
|
||
8004512: 68fb ldr r3, [r7, #12]
|
||
8004514: f8d3 2218 ldr.w r2, [r3, #536] ; 0x218
|
||
8004518: 693b ldr r3, [r7, #16]
|
||
800451a: 1ad3 subs r3, r2, r3
|
||
800451c: 025b lsls r3, r3, #9
|
||
800451e: 6a3a ldr r2, [r7, #32]
|
||
8004520: 4413 add r3, r2
|
||
8004522: 68f9 ldr r1, [r7, #12]
|
||
8004524: f44f 7200 mov.w r2, #512 ; 0x200
|
||
8004528: 4618 mov r0, r3
|
||
800452a: f7fd ffc3 bl 80024b4 <mem_cpy>
|
||
#endif
|
||
#endif
|
||
rcnt = SS(fp->fs) * cc; /* Number of bytes transferred */
|
||
800452e: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8004530: 025b lsls r3, r3, #9
|
||
8004532: 62bb str r3, [r7, #40] ; 0x28
|
||
continue;
|
||
8004534: e05b b.n 80045ee <f_read+0x298>
|
||
}
|
||
#if !_FS_TINY
|
||
if (fp->dsect != sect) { /* Load data sector if not in cache */
|
||
8004536: 68fb ldr r3, [r7, #12]
|
||
8004538: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
800453c: 693a ldr r2, [r7, #16]
|
||
800453e: 429a cmp r2, r3
|
||
8004540: d037 beq.n 80045b2 <f_read+0x25c>
|
||
#if !_FS_READONLY
|
||
if (fp->flag & FA__DIRTY) { /* Write-back dirty sector cache */
|
||
8004542: 68fb ldr r3, [r7, #12]
|
||
8004544: f893 3206 ldrb.w r3, [r3, #518] ; 0x206
|
||
8004548: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
800454c: 2b00 cmp r3, #0
|
||
800454e: d01d beq.n 800458c <f_read+0x236>
|
||
if (disk_write(fp->fs->drv, fp->buf.d8, fp->dsect, 1) != RES_OK)
|
||
8004550: 68fb ldr r3, [r7, #12]
|
||
8004552: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8004556: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
800455a: 68f9 ldr r1, [r7, #12]
|
||
800455c: 68fb ldr r3, [r7, #12]
|
||
800455e: f8d3 2218 ldr.w r2, [r3, #536] ; 0x218
|
||
8004562: 2301 movs r3, #1
|
||
8004564: f7fd ff86 bl 8002474 <disk_write>
|
||
8004568: 4603 mov r3, r0
|
||
800456a: 2b00 cmp r3, #0
|
||
800456c: d005 beq.n 800457a <f_read+0x224>
|
||
ABORT(fp->fs, FR_DISK_ERR);
|
||
800456e: 68fb ldr r3, [r7, #12]
|
||
8004570: 2201 movs r2, #1
|
||
8004572: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
8004576: 2301 movs r3, #1
|
||
8004578: e054 b.n 8004624 <f_read+0x2ce>
|
||
fp->flag &= ~FA__DIRTY;
|
||
800457a: 68fb ldr r3, [r7, #12]
|
||
800457c: f893 3206 ldrb.w r3, [r3, #518] ; 0x206
|
||
8004580: f023 0340 bic.w r3, r3, #64 ; 0x40
|
||
8004584: b2da uxtb r2, r3
|
||
8004586: 68fb ldr r3, [r7, #12]
|
||
8004588: f883 2206 strb.w r2, [r3, #518] ; 0x206
|
||
}
|
||
#endif
|
||
if (disk_read(fp->fs->drv, fp->buf.d8, sect, 1) != RES_OK) /* Fill sector cache */
|
||
800458c: 68fb ldr r3, [r7, #12]
|
||
800458e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8004592: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
8004596: 68f9 ldr r1, [r7, #12]
|
||
8004598: 2301 movs r3, #1
|
||
800459a: 693a ldr r2, [r7, #16]
|
||
800459c: f7fd ff4a bl 8002434 <disk_read>
|
||
80045a0: 4603 mov r3, r0
|
||
80045a2: 2b00 cmp r3, #0
|
||
80045a4: d005 beq.n 80045b2 <f_read+0x25c>
|
||
ABORT(fp->fs, FR_DISK_ERR);
|
||
80045a6: 68fb ldr r3, [r7, #12]
|
||
80045a8: 2201 movs r2, #1
|
||
80045aa: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
80045ae: 2301 movs r3, #1
|
||
80045b0: e038 b.n 8004624 <f_read+0x2ce>
|
||
}
|
||
#endif
|
||
fp->dsect = sect;
|
||
80045b2: 68fb ldr r3, [r7, #12]
|
||
80045b4: 693a ldr r2, [r7, #16]
|
||
80045b6: f8c3 2218 str.w r2, [r3, #536] ; 0x218
|
||
}
|
||
rcnt = SS(fp->fs) - ((UINT)fp->fptr % SS(fp->fs)); /* Get partial sector data from sector buffer */
|
||
80045ba: 68fb ldr r3, [r7, #12]
|
||
80045bc: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
80045c0: f3c3 0308 ubfx r3, r3, #0, #9
|
||
80045c4: f5c3 7300 rsb r3, r3, #512 ; 0x200
|
||
80045c8: 62bb str r3, [r7, #40] ; 0x28
|
||
if (rcnt > btr) rcnt = btr;
|
||
80045ca: 6aba ldr r2, [r7, #40] ; 0x28
|
||
80045cc: 687b ldr r3, [r7, #4]
|
||
80045ce: 429a cmp r2, r3
|
||
80045d0: d901 bls.n 80045d6 <f_read+0x280>
|
||
80045d2: 687b ldr r3, [r7, #4]
|
||
80045d4: 62bb str r3, [r7, #40] ; 0x28
|
||
#if _FS_TINY
|
||
if (move_window(fp->fs, fp->dsect) != FR_OK) /* Move sector window */
|
||
ABORT(fp->fs, FR_DISK_ERR);
|
||
mem_cpy(rbuff, &fp->fs->win.d8[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */
|
||
#else
|
||
mem_cpy(rbuff, &fp->buf.d8[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */
|
||
80045d6: 68fb ldr r3, [r7, #12]
|
||
80045d8: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
80045dc: f3c3 0308 ubfx r3, r3, #0, #9
|
||
80045e0: 68fa ldr r2, [r7, #12]
|
||
80045e2: 4413 add r3, r2
|
||
80045e4: 6aba ldr r2, [r7, #40] ; 0x28
|
||
80045e6: 4619 mov r1, r3
|
||
80045e8: 6a38 ldr r0, [r7, #32]
|
||
80045ea: f7fd ff63 bl 80024b4 <mem_cpy>
|
||
rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {
|
||
80045ee: 6a3a ldr r2, [r7, #32]
|
||
80045f0: 6abb ldr r3, [r7, #40] ; 0x28
|
||
80045f2: 4413 add r3, r2
|
||
80045f4: 623b str r3, [r7, #32]
|
||
80045f6: 68fb ldr r3, [r7, #12]
|
||
80045f8: f8d3 2208 ldr.w r2, [r3, #520] ; 0x208
|
||
80045fc: 6abb ldr r3, [r7, #40] ; 0x28
|
||
80045fe: 441a add r2, r3
|
||
8004600: 68fb ldr r3, [r7, #12]
|
||
8004602: f8c3 2208 str.w r2, [r3, #520] ; 0x208
|
||
8004606: 683b ldr r3, [r7, #0]
|
||
8004608: 681a ldr r2, [r3, #0]
|
||
800460a: 6abb ldr r3, [r7, #40] ; 0x28
|
||
800460c: 441a add r2, r3
|
||
800460e: 683b ldr r3, [r7, #0]
|
||
8004610: 601a str r2, [r3, #0]
|
||
8004612: 687a ldr r2, [r7, #4]
|
||
8004614: 6abb ldr r3, [r7, #40] ; 0x28
|
||
8004616: 1ad3 subs r3, r2, r3
|
||
8004618: 607b str r3, [r7, #4]
|
||
for ( ; btr; /* Repeat until all data read */
|
||
800461a: 687b ldr r3, [r7, #4]
|
||
800461c: 2b00 cmp r3, #0
|
||
800461e: f47f aed2 bne.w 80043c6 <f_read+0x70>
|
||
#endif
|
||
}
|
||
|
||
LEAVE_FF(fp->fs, FR_OK);
|
||
8004622: 2300 movs r3, #0
|
||
}
|
||
8004624: 4618 mov r0, r3
|
||
8004626: 3730 adds r7, #48 ; 0x30
|
||
8004628: 46bd mov sp, r7
|
||
800462a: bd80 pop {r7, pc}
|
||
|
||
0800462c <FATFS_LinkDriverEx>:
|
||
* @param lun : only used for USB Key Disk to add multi-lun management
|
||
else the paramter must be equal to 0
|
||
* @retval Returns 0 in case of success, otherwise 1.
|
||
*/
|
||
uint8_t FATFS_LinkDriverEx(Diskio_drvTypeDef *drv, char *path, uint8_t lun)
|
||
{
|
||
800462c: b480 push {r7}
|
||
800462e: b087 sub sp, #28
|
||
8004630: af00 add r7, sp, #0
|
||
8004632: 60f8 str r0, [r7, #12]
|
||
8004634: 60b9 str r1, [r7, #8]
|
||
8004636: 4613 mov r3, r2
|
||
8004638: 71fb strb r3, [r7, #7]
|
||
uint8_t ret = 1;
|
||
800463a: 2301 movs r3, #1
|
||
800463c: 75fb strb r3, [r7, #23]
|
||
uint8_t DiskNum = 0;
|
||
800463e: 2300 movs r3, #0
|
||
8004640: 75bb strb r3, [r7, #22]
|
||
|
||
if(disk.nbr <= _VOLUMES)
|
||
8004642: 4b1e ldr r3, [pc, #120] ; (80046bc <FATFS_LinkDriverEx+0x90>)
|
||
8004644: 7a5b ldrb r3, [r3, #9]
|
||
8004646: b2db uxtb r3, r3
|
||
8004648: 2b01 cmp r3, #1
|
||
800464a: d831 bhi.n 80046b0 <FATFS_LinkDriverEx+0x84>
|
||
{
|
||
disk.is_initialized[disk.nbr] = 0;
|
||
800464c: 4b1b ldr r3, [pc, #108] ; (80046bc <FATFS_LinkDriverEx+0x90>)
|
||
800464e: 7a5b ldrb r3, [r3, #9]
|
||
8004650: b2db uxtb r3, r3
|
||
8004652: 461a mov r2, r3
|
||
8004654: 4b19 ldr r3, [pc, #100] ; (80046bc <FATFS_LinkDriverEx+0x90>)
|
||
8004656: 2100 movs r1, #0
|
||
8004658: 5499 strb r1, [r3, r2]
|
||
disk.drv[disk.nbr] = drv;
|
||
800465a: 4b18 ldr r3, [pc, #96] ; (80046bc <FATFS_LinkDriverEx+0x90>)
|
||
800465c: 7a5b ldrb r3, [r3, #9]
|
||
800465e: b2db uxtb r3, r3
|
||
8004660: 4a16 ldr r2, [pc, #88] ; (80046bc <FATFS_LinkDriverEx+0x90>)
|
||
8004662: 009b lsls r3, r3, #2
|
||
8004664: 4413 add r3, r2
|
||
8004666: 68fa ldr r2, [r7, #12]
|
||
8004668: 605a str r2, [r3, #4]
|
||
disk.lun[disk.nbr] = lun;
|
||
800466a: 4b14 ldr r3, [pc, #80] ; (80046bc <FATFS_LinkDriverEx+0x90>)
|
||
800466c: 7a5b ldrb r3, [r3, #9]
|
||
800466e: b2db uxtb r3, r3
|
||
8004670: 461a mov r2, r3
|
||
8004672: 4b12 ldr r3, [pc, #72] ; (80046bc <FATFS_LinkDriverEx+0x90>)
|
||
8004674: 4413 add r3, r2
|
||
8004676: 79fa ldrb r2, [r7, #7]
|
||
8004678: 721a strb r2, [r3, #8]
|
||
DiskNum = disk.nbr++;
|
||
800467a: 4b10 ldr r3, [pc, #64] ; (80046bc <FATFS_LinkDriverEx+0x90>)
|
||
800467c: 7a5b ldrb r3, [r3, #9]
|
||
800467e: b2db uxtb r3, r3
|
||
8004680: 1c5a adds r2, r3, #1
|
||
8004682: b2d1 uxtb r1, r2
|
||
8004684: 4a0d ldr r2, [pc, #52] ; (80046bc <FATFS_LinkDriverEx+0x90>)
|
||
8004686: 7251 strb r1, [r2, #9]
|
||
8004688: 75bb strb r3, [r7, #22]
|
||
path[0] = DiskNum + '0';
|
||
800468a: 7dbb ldrb r3, [r7, #22]
|
||
800468c: 3330 adds r3, #48 ; 0x30
|
||
800468e: b2da uxtb r2, r3
|
||
8004690: 68bb ldr r3, [r7, #8]
|
||
8004692: 701a strb r2, [r3, #0]
|
||
path[1] = ':';
|
||
8004694: 68bb ldr r3, [r7, #8]
|
||
8004696: 3301 adds r3, #1
|
||
8004698: 223a movs r2, #58 ; 0x3a
|
||
800469a: 701a strb r2, [r3, #0]
|
||
path[2] = '/';
|
||
800469c: 68bb ldr r3, [r7, #8]
|
||
800469e: 3302 adds r3, #2
|
||
80046a0: 222f movs r2, #47 ; 0x2f
|
||
80046a2: 701a strb r2, [r3, #0]
|
||
path[3] = 0;
|
||
80046a4: 68bb ldr r3, [r7, #8]
|
||
80046a6: 3303 adds r3, #3
|
||
80046a8: 2200 movs r2, #0
|
||
80046aa: 701a strb r2, [r3, #0]
|
||
ret = 0;
|
||
80046ac: 2300 movs r3, #0
|
||
80046ae: 75fb strb r3, [r7, #23]
|
||
}
|
||
|
||
return ret;
|
||
80046b0: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
80046b2: 4618 mov r0, r3
|
||
80046b4: 371c adds r7, #28
|
||
80046b6: 46bd mov sp, r7
|
||
80046b8: bc80 pop {r7}
|
||
80046ba: 4770 bx lr
|
||
80046bc: 20000064 .word 0x20000064
|
||
|
||
080046c0 <FATFS_LinkDriver>:
|
||
* @param drv: pointer to the disk IO Driver structure
|
||
* @param path: pointer to the logical drive path
|
||
* @retval Returns 0 in case of success, otherwise 1.
|
||
*/
|
||
uint8_t FATFS_LinkDriver(Diskio_drvTypeDef *drv, char *path)
|
||
{
|
||
80046c0: b580 push {r7, lr}
|
||
80046c2: b082 sub sp, #8
|
||
80046c4: af00 add r7, sp, #0
|
||
80046c6: 6078 str r0, [r7, #4]
|
||
80046c8: 6039 str r1, [r7, #0]
|
||
return FATFS_LinkDriverEx(drv, path, 0);
|
||
80046ca: 2200 movs r2, #0
|
||
80046cc: 6839 ldr r1, [r7, #0]
|
||
80046ce: 6878 ldr r0, [r7, #4]
|
||
80046d0: f7ff ffac bl 800462c <FATFS_LinkDriverEx>
|
||
80046d4: 4603 mov r3, r0
|
||
}
|
||
80046d6: 4618 mov r0, r3
|
||
80046d8: 3708 adds r7, #8
|
||
80046da: 46bd mov sp, r7
|
||
80046dc: bd80 pop {r7, pc}
|
||
...
|
||
|
||
080046e0 <my_main>:
|
||
#include "fatfs.h"
|
||
#include "fatfs_sd.h"
|
||
FATFS SD;
|
||
|
||
int my_main()
|
||
{
|
||
80046e0: b580 push {r7, lr}
|
||
80046e2: f5ad 7d36 sub.w sp, sp, #728 ; 0x2d8
|
||
80046e6: af04 add r7, sp, #16
|
||
uint8_t res;
|
||
FIL fil;
|
||
char fil_buff[128];
|
||
uint16_t br=128;
|
||
80046e8: f107 0316 add.w r3, r7, #22
|
||
80046ec: 2280 movs r2, #128 ; 0x80
|
||
80046ee: 801a strh r2, [r3, #0]
|
||
char str[16];
|
||
LCD_BL(0);
|
||
80046f0: 2200 movs r2, #0
|
||
80046f2: 2101 movs r1, #1
|
||
80046f4: 4822 ldr r0, [pc, #136] ; (8004780 <my_main+0xa0>)
|
||
80046f6: f7fc fb3f bl 8000d78 <HAL_GPIO_WritePin>
|
||
LCDx_Init();
|
||
80046fa: f000 ffd3 bl 80056a4 <LCDx_Init>
|
||
LCD_Clear(GRAY);
|
||
80046fe: f248 4030 movw r0, #33840 ; 0x8430
|
||
8004702: f001 f975 bl 80059f0 <LCD_Clear>
|
||
|
||
if(font_init())
|
||
8004706: f001 f9c5 bl 8005a94 <font_init>
|
||
800470a: 4603 mov r3, r0
|
||
800470c: 2b00 cmp r3, #0
|
||
800470e: d00c beq.n 800472a <my_main+0x4a>
|
||
{
|
||
LCD_ShowString(0,16,(uint8_t *)"erro",16,RED,BLUE,64);
|
||
8004710: 2340 movs r3, #64 ; 0x40
|
||
8004712: 9302 str r3, [sp, #8]
|
||
8004714: 231f movs r3, #31
|
||
8004716: 9301 str r3, [sp, #4]
|
||
8004718: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
800471c: 9300 str r3, [sp, #0]
|
||
800471e: 2310 movs r3, #16
|
||
8004720: 4a18 ldr r2, [pc, #96] ; (8004784 <my_main+0xa4>)
|
||
8004722: 2110 movs r1, #16
|
||
8004724: 2000 movs r0, #0
|
||
8004726: f001 fb6d bl 8005e04 <LCD_ShowString>
|
||
}
|
||
|
||
f_mount(&SD,"0:",1);
|
||
800472a: 2201 movs r2, #1
|
||
800472c: 4916 ldr r1, [pc, #88] ; (8004788 <my_main+0xa8>)
|
||
800472e: 4817 ldr r0, [pc, #92] ; (800478c <my_main+0xac>)
|
||
8004730: f7ff fbbe bl 8003eb0 <f_mount>
|
||
res=f_open(&fil,"0:/demo.txt",FA_READ);
|
||
8004734: f107 0398 add.w r3, r7, #152 ; 0x98
|
||
8004738: 2201 movs r2, #1
|
||
800473a: 4915 ldr r1, [pc, #84] ; (8004790 <my_main+0xb0>)
|
||
800473c: 4618 mov r0, r3
|
||
800473e: f7ff fbff bl 8003f40 <f_open>
|
||
8004742: 4603 mov r3, r0
|
||
8004744: f887 32c7 strb.w r3, [r7, #711] ; 0x2c7
|
||
res=f_read(&fil,fil_buff,64,(UINT*)&br);
|
||
8004748: f107 0316 add.w r3, r7, #22
|
||
800474c: f107 0118 add.w r1, r7, #24
|
||
8004750: f107 0098 add.w r0, r7, #152 ; 0x98
|
||
8004754: 2240 movs r2, #64 ; 0x40
|
||
8004756: f7ff fdfe bl 8004356 <f_read>
|
||
800475a: 4603 mov r3, r0
|
||
800475c: f887 32c7 strb.w r3, [r7, #711] ; 0x2c7
|
||
LCD_ShowString(0,0,fil_buff,16,RED,BLUE,64);
|
||
8004760: f107 0218 add.w r2, r7, #24
|
||
8004764: 2340 movs r3, #64 ; 0x40
|
||
8004766: 9302 str r3, [sp, #8]
|
||
8004768: 231f movs r3, #31
|
||
800476a: 9301 str r3, [sp, #4]
|
||
800476c: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004770: 9300 str r3, [sp, #0]
|
||
8004772: 2310 movs r3, #16
|
||
8004774: 2100 movs r1, #0
|
||
8004776: 2000 movs r0, #0
|
||
8004778: f001 fb44 bl 8005e04 <LCD_ShowString>
|
||
sprintf(str,"%02x\n%02x\n%02x\n%02x\n%02x",ftinfo.fontok,ftinfo.ugbkaddr,ftinfo.ugbksize,ftinfo.f12addr,ftinfo.gbk12size);
|
||
LCD_ShowString(0,0,str,12,RED,BLUE);
|
||
|
||
LCD_ShowString(0,100,"163165sdf������",12,RED,BLUE);
|
||
*/
|
||
while(1)
|
||
800477c: e7fe b.n 800477c <my_main+0x9c>
|
||
800477e: bf00 nop
|
||
8004780: 40010c00 .word 0x40010c00
|
||
8004784: 08005fa0 .word 0x08005fa0
|
||
8004788: 08005fa8 .word 0x08005fa8
|
||
800478c: 2000057c .word 0x2000057c
|
||
8004790: 08005fac .word 0x08005fac
|
||
|
||
08004794 <W25QXX_Read>:
|
||
//ReadAddr:��ʼ��ȡ�ĵ�ַ(24bit)
|
||
//NumByteToRead:Ҫ��ȡ���ֽ���(����65535)
|
||
|
||
|
||
void W25QXX_Read(uint8_t* pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead)
|
||
{
|
||
8004794: b580 push {r7, lr}
|
||
8004796: b086 sub sp, #24
|
||
8004798: af00 add r7, sp, #0
|
||
800479a: 60f8 str r0, [r7, #12]
|
||
800479c: 60b9 str r1, [r7, #8]
|
||
800479e: 4613 mov r3, r2
|
||
80047a0: 80fb strh r3, [r7, #6]
|
||
unsigned char buff[4];
|
||
HAL_GPIO_WritePin(FLASH_E_GPIO_Port,FLASH_E_Pin,0);
|
||
80047a2: 2200 movs r2, #0
|
||
80047a4: f44f 5180 mov.w r1, #4096 ; 0x1000
|
||
80047a8: 4813 ldr r0, [pc, #76] ; (80047f8 <W25QXX_Read+0x64>)
|
||
80047aa: f7fc fae5 bl 8000d78 <HAL_GPIO_WritePin>
|
||
buff[0]=W25X_ReadData;
|
||
80047ae: 2303 movs r3, #3
|
||
80047b0: 753b strb r3, [r7, #20]
|
||
buff[1]=(uint8_t)((ReadAddr)>>16);
|
||
80047b2: 68bb ldr r3, [r7, #8]
|
||
80047b4: 0c1b lsrs r3, r3, #16
|
||
80047b6: b2db uxtb r3, r3
|
||
80047b8: 757b strb r3, [r7, #21]
|
||
buff[2]=(uint8_t)((ReadAddr)>>8);
|
||
80047ba: 68bb ldr r3, [r7, #8]
|
||
80047bc: 0a1b lsrs r3, r3, #8
|
||
80047be: b2db uxtb r3, r3
|
||
80047c0: 75bb strb r3, [r7, #22]
|
||
buff[3]=(uint8_t)ReadAddr;
|
||
80047c2: 68bb ldr r3, [r7, #8]
|
||
80047c4: b2db uxtb r3, r3
|
||
80047c6: 75fb strb r3, [r7, #23]
|
||
HAL_SPI_Transmit(&hspi2,buff,4,100); //���Ͷ�ȡ����
|
||
80047c8: f107 0114 add.w r1, r7, #20
|
||
80047cc: 2364 movs r3, #100 ; 0x64
|
||
80047ce: 2204 movs r2, #4
|
||
80047d0: 480a ldr r0, [pc, #40] ; (80047fc <W25QXX_Read+0x68>)
|
||
80047d2: f7fc ff55 bl 8001680 <HAL_SPI_Transmit>
|
||
|
||
HAL_SPI_Receive(&hspi2,pBuffer,NumByteToRead,100);
|
||
80047d6: 88fa ldrh r2, [r7, #6]
|
||
80047d8: 2364 movs r3, #100 ; 0x64
|
||
80047da: 68f9 ldr r1, [r7, #12]
|
||
80047dc: 4807 ldr r0, [pc, #28] ; (80047fc <W25QXX_Read+0x68>)
|
||
80047de: f7fd f88b bl 80018f8 <HAL_SPI_Receive>
|
||
HAL_GPIO_WritePin(FLASH_E_GPIO_Port,FLASH_E_Pin,1);
|
||
80047e2: 2201 movs r2, #1
|
||
80047e4: f44f 5180 mov.w r1, #4096 ; 0x1000
|
||
80047e8: 4803 ldr r0, [pc, #12] ; (80047f8 <W25QXX_Read+0x64>)
|
||
80047ea: f7fc fac5 bl 8000d78 <HAL_GPIO_WritePin>
|
||
|
||
}
|
||
80047ee: bf00 nop
|
||
80047f0: 3718 adds r7, #24
|
||
80047f2: 46bd mov sp, r7
|
||
80047f4: bd80 pop {r7, pc}
|
||
80047f6: bf00 nop
|
||
80047f8: 40010c00 .word 0x40010c00
|
||
80047fc: 20000074 .word 0x20000074
|
||
|
||
08004800 <SELECT>:
|
||
Timer2--;
|
||
}
|
||
|
||
/* SPI Chip Select */
|
||
static void SELECT(void)
|
||
{
|
||
8004800: b580 push {r7, lr}
|
||
8004802: af00 add r7, sp, #0
|
||
HAL_GPIO_WritePin(SD_CS_GPIO_Port, SD_CS_Pin, GPIO_PIN_RESET);
|
||
8004804: 2200 movs r2, #0
|
||
8004806: 2104 movs r1, #4
|
||
8004808: 4802 ldr r0, [pc, #8] ; (8004814 <SELECT+0x14>)
|
||
800480a: f7fc fab5 bl 8000d78 <HAL_GPIO_WritePin>
|
||
}
|
||
800480e: bf00 nop
|
||
8004810: bd80 pop {r7, pc}
|
||
8004812: bf00 nop
|
||
8004814: 40011400 .word 0x40011400
|
||
|
||
08004818 <DESELECT>:
|
||
|
||
/* SPI Chip Deselect */
|
||
static void DESELECT(void)
|
||
{
|
||
8004818: b580 push {r7, lr}
|
||
800481a: af00 add r7, sp, #0
|
||
HAL_GPIO_WritePin(SD_CS_GPIO_Port, SD_CS_Pin, GPIO_PIN_SET);
|
||
800481c: 2201 movs r2, #1
|
||
800481e: 2104 movs r1, #4
|
||
8004820: 4802 ldr r0, [pc, #8] ; (800482c <DESELECT+0x14>)
|
||
8004822: f7fc faa9 bl 8000d78 <HAL_GPIO_WritePin>
|
||
}
|
||
8004826: bf00 nop
|
||
8004828: bd80 pop {r7, pc}
|
||
800482a: bf00 nop
|
||
800482c: 40011400 .word 0x40011400
|
||
|
||
08004830 <SPI_TxByte>:
|
||
|
||
|
||
static void SPI_TxByte(BYTE data)
|
||
{
|
||
8004830: b580 push {r7, lr}
|
||
8004832: b082 sub sp, #8
|
||
8004834: af00 add r7, sp, #0
|
||
8004836: 4603 mov r3, r0
|
||
8004838: 71fb strb r3, [r7, #7]
|
||
while (HAL_SPI_GetState(&hspi2) != HAL_SPI_STATE_READY);
|
||
800483a: bf00 nop
|
||
800483c: 4808 ldr r0, [pc, #32] ; (8004860 <SPI_TxByte+0x30>)
|
||
800483e: f7fd fb0e bl 8001e5e <HAL_SPI_GetState>
|
||
8004842: 4603 mov r3, r0
|
||
8004844: 2b01 cmp r3, #1
|
||
8004846: d1f9 bne.n 800483c <SPI_TxByte+0xc>
|
||
HAL_SPI_Transmit(&hspi2, &data, 1, SPI_TIMEOUT);
|
||
8004848: 1df9 adds r1, r7, #7
|
||
800484a: f44f 737a mov.w r3, #1000 ; 0x3e8
|
||
800484e: 2201 movs r2, #1
|
||
8004850: 4803 ldr r0, [pc, #12] ; (8004860 <SPI_TxByte+0x30>)
|
||
8004852: f7fc ff15 bl 8001680 <HAL_SPI_Transmit>
|
||
}
|
||
8004856: bf00 nop
|
||
8004858: 3708 adds r7, #8
|
||
800485a: 46bd mov sp, r7
|
||
800485c: bd80 pop {r7, pc}
|
||
800485e: bf00 nop
|
||
8004860: 20000074 .word 0x20000074
|
||
|
||
08004864 <SPI_RxByte>:
|
||
|
||
|
||
static uint8_t SPI_RxByte(void)
|
||
{
|
||
8004864: b580 push {r7, lr}
|
||
8004866: b084 sub sp, #16
|
||
8004868: af02 add r7, sp, #8
|
||
uint8_t dummy, data;
|
||
dummy = 0xFF;
|
||
800486a: 23ff movs r3, #255 ; 0xff
|
||
800486c: 71fb strb r3, [r7, #7]
|
||
data = 0;
|
||
800486e: 2300 movs r3, #0
|
||
8004870: 71bb strb r3, [r7, #6]
|
||
|
||
while ((HAL_SPI_GetState(&hspi2) != HAL_SPI_STATE_READY));
|
||
8004872: bf00 nop
|
||
8004874: 4809 ldr r0, [pc, #36] ; (800489c <SPI_RxByte+0x38>)
|
||
8004876: f7fd faf2 bl 8001e5e <HAL_SPI_GetState>
|
||
800487a: 4603 mov r3, r0
|
||
800487c: 2b01 cmp r3, #1
|
||
800487e: d1f9 bne.n 8004874 <SPI_RxByte+0x10>
|
||
HAL_SPI_TransmitReceive(&hspi2, &dummy, &data, 1, SPI_TIMEOUT);
|
||
8004880: 1dba adds r2, r7, #6
|
||
8004882: 1df9 adds r1, r7, #7
|
||
8004884: f44f 737a mov.w r3, #1000 ; 0x3e8
|
||
8004888: 9300 str r3, [sp, #0]
|
||
800488a: 2301 movs r3, #1
|
||
800488c: 4803 ldr r0, [pc, #12] ; (800489c <SPI_RxByte+0x38>)
|
||
800488e: f7fd f944 bl 8001b1a <HAL_SPI_TransmitReceive>
|
||
|
||
return data;
|
||
8004892: 79bb ldrb r3, [r7, #6]
|
||
}
|
||
8004894: 4618 mov r0, r3
|
||
8004896: 3708 adds r7, #8
|
||
8004898: 46bd mov sp, r7
|
||
800489a: bd80 pop {r7, pc}
|
||
800489c: 20000074 .word 0x20000074
|
||
|
||
080048a0 <SPI_RxBytePtr>:
|
||
|
||
|
||
static void SPI_RxBytePtr(uint8_t *buff)
|
||
{
|
||
80048a0: b580 push {r7, lr}
|
||
80048a2: b082 sub sp, #8
|
||
80048a4: af00 add r7, sp, #0
|
||
80048a6: 6078 str r0, [r7, #4]
|
||
*buff = SPI_RxByte();
|
||
80048a8: f7ff ffdc bl 8004864 <SPI_RxByte>
|
||
80048ac: 4603 mov r3, r0
|
||
80048ae: 461a mov r2, r3
|
||
80048b0: 687b ldr r3, [r7, #4]
|
||
80048b2: 701a strb r2, [r3, #0]
|
||
}
|
||
80048b4: bf00 nop
|
||
80048b6: 3708 adds r7, #8
|
||
80048b8: 46bd mov sp, r7
|
||
80048ba: bd80 pop {r7, pc}
|
||
|
||
080048bc <SD_ReadyWait>:
|
||
|
||
|
||
static uint8_t SD_ReadyWait(void)
|
||
{
|
||
80048bc: b580 push {r7, lr}
|
||
80048be: b082 sub sp, #8
|
||
80048c0: af00 add r7, sp, #0
|
||
uint8_t res;
|
||
|
||
|
||
Timer2 = 50;
|
||
80048c2: 4b0b ldr r3, [pc, #44] ; (80048f0 <SD_ReadyWait+0x34>)
|
||
80048c4: 2232 movs r2, #50 ; 0x32
|
||
80048c6: 701a strb r2, [r3, #0]
|
||
SPI_RxByte();
|
||
80048c8: f7ff ffcc bl 8004864 <SPI_RxByte>
|
||
|
||
do
|
||
{
|
||
|
||
res = SPI_RxByte();
|
||
80048cc: f7ff ffca bl 8004864 <SPI_RxByte>
|
||
80048d0: 4603 mov r3, r0
|
||
80048d2: 71fb strb r3, [r7, #7]
|
||
} while ((res != 0xFF) && Timer2);
|
||
80048d4: 79fb ldrb r3, [r7, #7]
|
||
80048d6: 2bff cmp r3, #255 ; 0xff
|
||
80048d8: d004 beq.n 80048e4 <SD_ReadyWait+0x28>
|
||
80048da: 4b05 ldr r3, [pc, #20] ; (80048f0 <SD_ReadyWait+0x34>)
|
||
80048dc: 781b ldrb r3, [r3, #0]
|
||
80048de: b2db uxtb r3, r3
|
||
80048e0: 2b00 cmp r3, #0
|
||
80048e2: d1f3 bne.n 80048cc <SD_ReadyWait+0x10>
|
||
|
||
return res;
|
||
80048e4: 79fb ldrb r3, [r7, #7]
|
||
}
|
||
80048e6: 4618 mov r0, r3
|
||
80048e8: 3708 adds r7, #8
|
||
80048ea: 46bd mov sp, r7
|
||
80048ec: bd80 pop {r7, pc}
|
||
80048ee: bf00 nop
|
||
80048f0: 200007ac .word 0x200007ac
|
||
|
||
080048f4 <SD_PowerOn>:
|
||
|
||
|
||
static void SD_PowerOn(void)
|
||
{
|
||
80048f4: b580 push {r7, lr}
|
||
80048f6: b086 sub sp, #24
|
||
80048f8: af00 add r7, sp, #0
|
||
uint8_t cmd_arg[6];
|
||
uint32_t Count = 0x1FFF;
|
||
80048fa: f641 73ff movw r3, #8191 ; 0x1fff
|
||
80048fe: 617b str r3, [r7, #20]
|
||
|
||
|
||
DESELECT();
|
||
8004900: f7ff ff8a bl 8004818 <DESELECT>
|
||
|
||
for(int i = 0; i < 10; i++)
|
||
8004904: 2300 movs r3, #0
|
||
8004906: 613b str r3, [r7, #16]
|
||
8004908: e005 b.n 8004916 <SD_PowerOn+0x22>
|
||
{
|
||
SPI_TxByte(0xFF);
|
||
800490a: 20ff movs r0, #255 ; 0xff
|
||
800490c: f7ff ff90 bl 8004830 <SPI_TxByte>
|
||
for(int i = 0; i < 10; i++)
|
||
8004910: 693b ldr r3, [r7, #16]
|
||
8004912: 3301 adds r3, #1
|
||
8004914: 613b str r3, [r7, #16]
|
||
8004916: 693b ldr r3, [r7, #16]
|
||
8004918: 2b09 cmp r3, #9
|
||
800491a: ddf6 ble.n 800490a <SD_PowerOn+0x16>
|
||
}
|
||
|
||
/* SPI Chips Select */
|
||
SELECT();
|
||
800491c: f7ff ff70 bl 8004800 <SELECT>
|
||
|
||
|
||
cmd_arg[0] = (CMD0 | 0x40);
|
||
8004920: 2340 movs r3, #64 ; 0x40
|
||
8004922: 713b strb r3, [r7, #4]
|
||
cmd_arg[1] = 0;
|
||
8004924: 2300 movs r3, #0
|
||
8004926: 717b strb r3, [r7, #5]
|
||
cmd_arg[2] = 0;
|
||
8004928: 2300 movs r3, #0
|
||
800492a: 71bb strb r3, [r7, #6]
|
||
cmd_arg[3] = 0;
|
||
800492c: 2300 movs r3, #0
|
||
800492e: 71fb strb r3, [r7, #7]
|
||
cmd_arg[4] = 0;
|
||
8004930: 2300 movs r3, #0
|
||
8004932: 723b strb r3, [r7, #8]
|
||
cmd_arg[5] = 0x95;
|
||
8004934: 2395 movs r3, #149 ; 0x95
|
||
8004936: 727b strb r3, [r7, #9]
|
||
|
||
|
||
for (int i = 0; i < 6; i++)
|
||
8004938: 2300 movs r3, #0
|
||
800493a: 60fb str r3, [r7, #12]
|
||
800493c: e009 b.n 8004952 <SD_PowerOn+0x5e>
|
||
{
|
||
SPI_TxByte(cmd_arg[i]);
|
||
800493e: 1d3a adds r2, r7, #4
|
||
8004940: 68fb ldr r3, [r7, #12]
|
||
8004942: 4413 add r3, r2
|
||
8004944: 781b ldrb r3, [r3, #0]
|
||
8004946: 4618 mov r0, r3
|
||
8004948: f7ff ff72 bl 8004830 <SPI_TxByte>
|
||
for (int i = 0; i < 6; i++)
|
||
800494c: 68fb ldr r3, [r7, #12]
|
||
800494e: 3301 adds r3, #1
|
||
8004950: 60fb str r3, [r7, #12]
|
||
8004952: 68fb ldr r3, [r7, #12]
|
||
8004954: 2b05 cmp r3, #5
|
||
8004956: ddf2 ble.n 800493e <SD_PowerOn+0x4a>
|
||
}
|
||
|
||
|
||
while ((SPI_RxByte() != 0x01) && Count)
|
||
8004958: e002 b.n 8004960 <SD_PowerOn+0x6c>
|
||
{
|
||
Count--;
|
||
800495a: 697b ldr r3, [r7, #20]
|
||
800495c: 3b01 subs r3, #1
|
||
800495e: 617b str r3, [r7, #20]
|
||
while ((SPI_RxByte() != 0x01) && Count)
|
||
8004960: f7ff ff80 bl 8004864 <SPI_RxByte>
|
||
8004964: 4603 mov r3, r0
|
||
8004966: 2b01 cmp r3, #1
|
||
8004968: d002 beq.n 8004970 <SD_PowerOn+0x7c>
|
||
800496a: 697b ldr r3, [r7, #20]
|
||
800496c: 2b00 cmp r3, #0
|
||
800496e: d1f4 bne.n 800495a <SD_PowerOn+0x66>
|
||
}
|
||
|
||
DESELECT();
|
||
8004970: f7ff ff52 bl 8004818 <DESELECT>
|
||
SPI_TxByte(0XFF);
|
||
8004974: 20ff movs r0, #255 ; 0xff
|
||
8004976: f7ff ff5b bl 8004830 <SPI_TxByte>
|
||
|
||
PowerFlag = 1;
|
||
800497a: 4b03 ldr r3, [pc, #12] ; (8004988 <SD_PowerOn+0x94>)
|
||
800497c: 2201 movs r2, #1
|
||
800497e: 701a strb r2, [r3, #0]
|
||
}
|
||
8004980: bf00 nop
|
||
8004982: 3718 adds r7, #24
|
||
8004984: 46bd mov sp, r7
|
||
8004986: bd80 pop {r7, pc}
|
||
8004988: 20000071 .word 0x20000071
|
||
|
||
0800498c <SD_PowerOff>:
|
||
|
||
|
||
static void SD_PowerOff(void)
|
||
{
|
||
800498c: b480 push {r7}
|
||
800498e: af00 add r7, sp, #0
|
||
PowerFlag = 0;
|
||
8004990: 4b03 ldr r3, [pc, #12] ; (80049a0 <SD_PowerOff+0x14>)
|
||
8004992: 2200 movs r2, #0
|
||
8004994: 701a strb r2, [r3, #0]
|
||
}
|
||
8004996: bf00 nop
|
||
8004998: 46bd mov sp, r7
|
||
800499a: bc80 pop {r7}
|
||
800499c: 4770 bx lr
|
||
800499e: bf00 nop
|
||
80049a0: 20000071 .word 0x20000071
|
||
|
||
080049a4 <SD_CheckPower>:
|
||
|
||
|
||
static uint8_t SD_CheckPower(void)
|
||
{
|
||
80049a4: b480 push {r7}
|
||
80049a6: af00 add r7, sp, #0
|
||
/* 0=off, 1=on */
|
||
return PowerFlag;
|
||
80049a8: 4b02 ldr r3, [pc, #8] ; (80049b4 <SD_CheckPower+0x10>)
|
||
80049aa: 781b ldrb r3, [r3, #0]
|
||
}
|
||
80049ac: 4618 mov r0, r3
|
||
80049ae: 46bd mov sp, r7
|
||
80049b0: bc80 pop {r7}
|
||
80049b2: 4770 bx lr
|
||
80049b4: 20000071 .word 0x20000071
|
||
|
||
080049b8 <SD_RxDataBlock>:
|
||
|
||
|
||
static bool SD_RxDataBlock(BYTE *buff, UINT btr)
|
||
{
|
||
80049b8: b580 push {r7, lr}
|
||
80049ba: b084 sub sp, #16
|
||
80049bc: af00 add r7, sp, #0
|
||
80049be: 6078 str r0, [r7, #4]
|
||
80049c0: 6039 str r1, [r7, #0]
|
||
uint8_t token;
|
||
|
||
|
||
Timer1 = 10;
|
||
80049c2: 4b17 ldr r3, [pc, #92] ; (8004a20 <SD_RxDataBlock+0x68>)
|
||
80049c4: 220a movs r2, #10
|
||
80049c6: 701a strb r2, [r3, #0]
|
||
|
||
|
||
do
|
||
{
|
||
token = SPI_RxByte();
|
||
80049c8: f7ff ff4c bl 8004864 <SPI_RxByte>
|
||
80049cc: 4603 mov r3, r0
|
||
80049ce: 73fb strb r3, [r7, #15]
|
||
} while((token == 0xFF) && Timer1);
|
||
80049d0: 7bfb ldrb r3, [r7, #15]
|
||
80049d2: 2bff cmp r3, #255 ; 0xff
|
||
80049d4: d104 bne.n 80049e0 <SD_RxDataBlock+0x28>
|
||
80049d6: 4b12 ldr r3, [pc, #72] ; (8004a20 <SD_RxDataBlock+0x68>)
|
||
80049d8: 781b ldrb r3, [r3, #0]
|
||
80049da: b2db uxtb r3, r3
|
||
80049dc: 2b00 cmp r3, #0
|
||
80049de: d1f3 bne.n 80049c8 <SD_RxDataBlock+0x10>
|
||
|
||
|
||
if(token != 0xFE)
|
||
80049e0: 7bfb ldrb r3, [r7, #15]
|
||
80049e2: 2bfe cmp r3, #254 ; 0xfe
|
||
80049e4: d001 beq.n 80049ea <SD_RxDataBlock+0x32>
|
||
return FALSE;
|
||
80049e6: 2300 movs r3, #0
|
||
80049e8: e016 b.n 8004a18 <SD_RxDataBlock+0x60>
|
||
|
||
|
||
do
|
||
{
|
||
SPI_RxBytePtr(buff++);
|
||
80049ea: 687b ldr r3, [r7, #4]
|
||
80049ec: 1c5a adds r2, r3, #1
|
||
80049ee: 607a str r2, [r7, #4]
|
||
80049f0: 4618 mov r0, r3
|
||
80049f2: f7ff ff55 bl 80048a0 <SPI_RxBytePtr>
|
||
SPI_RxBytePtr(buff++);
|
||
80049f6: 687b ldr r3, [r7, #4]
|
||
80049f8: 1c5a adds r2, r3, #1
|
||
80049fa: 607a str r2, [r7, #4]
|
||
80049fc: 4618 mov r0, r3
|
||
80049fe: f7ff ff4f bl 80048a0 <SPI_RxBytePtr>
|
||
} while(btr -= 2);
|
||
8004a02: 683b ldr r3, [r7, #0]
|
||
8004a04: 3b02 subs r3, #2
|
||
8004a06: 603b str r3, [r7, #0]
|
||
8004a08: 683b ldr r3, [r7, #0]
|
||
8004a0a: 2b00 cmp r3, #0
|
||
8004a0c: d1ed bne.n 80049ea <SD_RxDataBlock+0x32>
|
||
|
||
SPI_RxByte();
|
||
8004a0e: f7ff ff29 bl 8004864 <SPI_RxByte>
|
||
SPI_RxByte();
|
||
8004a12: f7ff ff27 bl 8004864 <SPI_RxByte>
|
||
|
||
return TRUE;
|
||
8004a16: 2301 movs r3, #1
|
||
}
|
||
8004a18: 4618 mov r0, r3
|
||
8004a1a: 3710 adds r7, #16
|
||
8004a1c: 46bd mov sp, r7
|
||
8004a1e: bd80 pop {r7, pc}
|
||
8004a20: 200007ad .word 0x200007ad
|
||
|
||
08004a24 <SD_TxDataBlock>:
|
||
|
||
|
||
#if _READONLY == 0
|
||
static bool SD_TxDataBlock(const BYTE *buff, BYTE token)
|
||
{
|
||
8004a24: b580 push {r7, lr}
|
||
8004a26: b084 sub sp, #16
|
||
8004a28: af00 add r7, sp, #0
|
||
8004a2a: 6078 str r0, [r7, #4]
|
||
8004a2c: 460b mov r3, r1
|
||
8004a2e: 70fb strb r3, [r7, #3]
|
||
uint8_t resp, wc;
|
||
uint8_t i = 0;
|
||
8004a30: 2300 movs r3, #0
|
||
8004a32: 737b strb r3, [r7, #13]
|
||
|
||
if (SD_ReadyWait() != 0xFF)
|
||
8004a34: f7ff ff42 bl 80048bc <SD_ReadyWait>
|
||
8004a38: 4603 mov r3, r0
|
||
8004a3a: 2bff cmp r3, #255 ; 0xff
|
||
8004a3c: d001 beq.n 8004a42 <SD_TxDataBlock+0x1e>
|
||
return FALSE;
|
||
8004a3e: 2300 movs r3, #0
|
||
8004a40: e040 b.n 8004ac4 <SD_TxDataBlock+0xa0>
|
||
|
||
SPI_TxByte(token);
|
||
8004a42: 78fb ldrb r3, [r7, #3]
|
||
8004a44: 4618 mov r0, r3
|
||
8004a46: f7ff fef3 bl 8004830 <SPI_TxByte>
|
||
|
||
if (token != 0xFD)
|
||
8004a4a: 78fb ldrb r3, [r7, #3]
|
||
8004a4c: 2bfd cmp r3, #253 ; 0xfd
|
||
8004a4e: d031 beq.n 8004ab4 <SD_TxDataBlock+0x90>
|
||
{
|
||
wc = 0;
|
||
8004a50: 2300 movs r3, #0
|
||
8004a52: 73bb strb r3, [r7, #14]
|
||
|
||
|
||
do
|
||
{
|
||
SPI_TxByte(*buff++);
|
||
8004a54: 687b ldr r3, [r7, #4]
|
||
8004a56: 1c5a adds r2, r3, #1
|
||
8004a58: 607a str r2, [r7, #4]
|
||
8004a5a: 781b ldrb r3, [r3, #0]
|
||
8004a5c: 4618 mov r0, r3
|
||
8004a5e: f7ff fee7 bl 8004830 <SPI_TxByte>
|
||
SPI_TxByte(*buff++);
|
||
8004a62: 687b ldr r3, [r7, #4]
|
||
8004a64: 1c5a adds r2, r3, #1
|
||
8004a66: 607a str r2, [r7, #4]
|
||
8004a68: 781b ldrb r3, [r3, #0]
|
||
8004a6a: 4618 mov r0, r3
|
||
8004a6c: f7ff fee0 bl 8004830 <SPI_TxByte>
|
||
} while (--wc);
|
||
8004a70: 7bbb ldrb r3, [r7, #14]
|
||
8004a72: 3b01 subs r3, #1
|
||
8004a74: 73bb strb r3, [r7, #14]
|
||
8004a76: 7bbb ldrb r3, [r7, #14]
|
||
8004a78: 2b00 cmp r3, #0
|
||
8004a7a: d1eb bne.n 8004a54 <SD_TxDataBlock+0x30>
|
||
|
||
SPI_RxByte();
|
||
8004a7c: f7ff fef2 bl 8004864 <SPI_RxByte>
|
||
SPI_RxByte();
|
||
8004a80: f7ff fef0 bl 8004864 <SPI_RxByte>
|
||
|
||
|
||
while (i <= 64)
|
||
8004a84: e00b b.n 8004a9e <SD_TxDataBlock+0x7a>
|
||
{
|
||
resp = SPI_RxByte();
|
||
8004a86: f7ff feed bl 8004864 <SPI_RxByte>
|
||
8004a8a: 4603 mov r3, r0
|
||
8004a8c: 73fb strb r3, [r7, #15]
|
||
|
||
|
||
if ((resp & 0x1F) == 0x05)
|
||
8004a8e: 7bfb ldrb r3, [r7, #15]
|
||
8004a90: f003 031f and.w r3, r3, #31
|
||
8004a94: 2b05 cmp r3, #5
|
||
8004a96: d006 beq.n 8004aa6 <SD_TxDataBlock+0x82>
|
||
break;
|
||
|
||
i++;
|
||
8004a98: 7b7b ldrb r3, [r7, #13]
|
||
8004a9a: 3301 adds r3, #1
|
||
8004a9c: 737b strb r3, [r7, #13]
|
||
while (i <= 64)
|
||
8004a9e: 7b7b ldrb r3, [r7, #13]
|
||
8004aa0: 2b40 cmp r3, #64 ; 0x40
|
||
8004aa2: d9f0 bls.n 8004a86 <SD_TxDataBlock+0x62>
|
||
8004aa4: e000 b.n 8004aa8 <SD_TxDataBlock+0x84>
|
||
break;
|
||
8004aa6: bf00 nop
|
||
}
|
||
|
||
|
||
while (SPI_RxByte() == 0);
|
||
8004aa8: bf00 nop
|
||
8004aaa: f7ff fedb bl 8004864 <SPI_RxByte>
|
||
8004aae: 4603 mov r3, r0
|
||
8004ab0: 2b00 cmp r3, #0
|
||
8004ab2: d0fa beq.n 8004aaa <SD_TxDataBlock+0x86>
|
||
}
|
||
|
||
if ((resp & 0x1F) == 0x05)
|
||
8004ab4: 7bfb ldrb r3, [r7, #15]
|
||
8004ab6: f003 031f and.w r3, r3, #31
|
||
8004aba: 2b05 cmp r3, #5
|
||
8004abc: d101 bne.n 8004ac2 <SD_TxDataBlock+0x9e>
|
||
return TRUE;
|
||
8004abe: 2301 movs r3, #1
|
||
8004ac0: e000 b.n 8004ac4 <SD_TxDataBlock+0xa0>
|
||
else
|
||
return FALSE;
|
||
8004ac2: 2300 movs r3, #0
|
||
}
|
||
8004ac4: 4618 mov r0, r3
|
||
8004ac6: 3710 adds r7, #16
|
||
8004ac8: 46bd mov sp, r7
|
||
8004aca: bd80 pop {r7, pc}
|
||
|
||
08004acc <SD_SendCmd>:
|
||
#endif /* _READONLY */
|
||
|
||
|
||
static BYTE SD_SendCmd(BYTE cmd, DWORD arg)
|
||
{
|
||
8004acc: b580 push {r7, lr}
|
||
8004ace: b084 sub sp, #16
|
||
8004ad0: af00 add r7, sp, #0
|
||
8004ad2: 4603 mov r3, r0
|
||
8004ad4: 6039 str r1, [r7, #0]
|
||
8004ad6: 71fb strb r3, [r7, #7]
|
||
uint8_t crc, res;
|
||
|
||
|
||
if (SD_ReadyWait() != 0xFF)
|
||
8004ad8: f7ff fef0 bl 80048bc <SD_ReadyWait>
|
||
8004adc: 4603 mov r3, r0
|
||
8004ade: 2bff cmp r3, #255 ; 0xff
|
||
8004ae0: d001 beq.n 8004ae6 <SD_SendCmd+0x1a>
|
||
return 0xFF;
|
||
8004ae2: 23ff movs r3, #255 ; 0xff
|
||
8004ae4: e040 b.n 8004b68 <SD_SendCmd+0x9c>
|
||
|
||
|
||
SPI_TxByte(cmd); /* Command */
|
||
8004ae6: 79fb ldrb r3, [r7, #7]
|
||
8004ae8: 4618 mov r0, r3
|
||
8004aea: f7ff fea1 bl 8004830 <SPI_TxByte>
|
||
SPI_TxByte((BYTE) (arg >> 24)); /* Argument[31..24] */
|
||
8004aee: 683b ldr r3, [r7, #0]
|
||
8004af0: 0e1b lsrs r3, r3, #24
|
||
8004af2: b2db uxtb r3, r3
|
||
8004af4: 4618 mov r0, r3
|
||
8004af6: f7ff fe9b bl 8004830 <SPI_TxByte>
|
||
SPI_TxByte((BYTE) (arg >> 16)); /* Argument[23..16] */
|
||
8004afa: 683b ldr r3, [r7, #0]
|
||
8004afc: 0c1b lsrs r3, r3, #16
|
||
8004afe: b2db uxtb r3, r3
|
||
8004b00: 4618 mov r0, r3
|
||
8004b02: f7ff fe95 bl 8004830 <SPI_TxByte>
|
||
SPI_TxByte((BYTE) (arg >> 8)); /* Argument[15..8] */
|
||
8004b06: 683b ldr r3, [r7, #0]
|
||
8004b08: 0a1b lsrs r3, r3, #8
|
||
8004b0a: b2db uxtb r3, r3
|
||
8004b0c: 4618 mov r0, r3
|
||
8004b0e: f7ff fe8f bl 8004830 <SPI_TxByte>
|
||
SPI_TxByte((BYTE) arg); /* Argument[7..0] */
|
||
8004b12: 683b ldr r3, [r7, #0]
|
||
8004b14: b2db uxtb r3, r3
|
||
8004b16: 4618 mov r0, r3
|
||
8004b18: f7ff fe8a bl 8004830 <SPI_TxByte>
|
||
|
||
|
||
crc = 0;
|
||
8004b1c: 2300 movs r3, #0
|
||
8004b1e: 73fb strb r3, [r7, #15]
|
||
if (cmd == CMD0)
|
||
8004b20: 79fb ldrb r3, [r7, #7]
|
||
8004b22: 2b40 cmp r3, #64 ; 0x40
|
||
8004b24: d101 bne.n 8004b2a <SD_SendCmd+0x5e>
|
||
crc = 0x95; /* CRC for CMD0(0) */
|
||
8004b26: 2395 movs r3, #149 ; 0x95
|
||
8004b28: 73fb strb r3, [r7, #15]
|
||
|
||
if (cmd == CMD8)
|
||
8004b2a: 79fb ldrb r3, [r7, #7]
|
||
8004b2c: 2b48 cmp r3, #72 ; 0x48
|
||
8004b2e: d101 bne.n 8004b34 <SD_SendCmd+0x68>
|
||
crc = 0x87; /* CRC for CMD8(0x1AA) */
|
||
8004b30: 2387 movs r3, #135 ; 0x87
|
||
8004b32: 73fb strb r3, [r7, #15]
|
||
|
||
SPI_TxByte(crc);
|
||
8004b34: 7bfb ldrb r3, [r7, #15]
|
||
8004b36: 4618 mov r0, r3
|
||
8004b38: f7ff fe7a bl 8004830 <SPI_TxByte>
|
||
|
||
|
||
if (cmd == CMD12)
|
||
8004b3c: 79fb ldrb r3, [r7, #7]
|
||
8004b3e: 2b4c cmp r3, #76 ; 0x4c
|
||
8004b40: d101 bne.n 8004b46 <SD_SendCmd+0x7a>
|
||
SPI_RxByte();
|
||
8004b42: f7ff fe8f bl 8004864 <SPI_RxByte>
|
||
|
||
|
||
uint8_t n = 10;
|
||
8004b46: 230a movs r3, #10
|
||
8004b48: 73bb strb r3, [r7, #14]
|
||
do
|
||
{
|
||
res = SPI_RxByte();
|
||
8004b4a: f7ff fe8b bl 8004864 <SPI_RxByte>
|
||
8004b4e: 4603 mov r3, r0
|
||
8004b50: 737b strb r3, [r7, #13]
|
||
} while ((res & 0x80) && --n);
|
||
8004b52: f997 300d ldrsb.w r3, [r7, #13]
|
||
8004b56: 2b00 cmp r3, #0
|
||
8004b58: da05 bge.n 8004b66 <SD_SendCmd+0x9a>
|
||
8004b5a: 7bbb ldrb r3, [r7, #14]
|
||
8004b5c: 3b01 subs r3, #1
|
||
8004b5e: 73bb strb r3, [r7, #14]
|
||
8004b60: 7bbb ldrb r3, [r7, #14]
|
||
8004b62: 2b00 cmp r3, #0
|
||
8004b64: d1f1 bne.n 8004b4a <SD_SendCmd+0x7e>
|
||
|
||
return res;
|
||
8004b66: 7b7b ldrb r3, [r7, #13]
|
||
}
|
||
8004b68: 4618 mov r0, r3
|
||
8004b6a: 3710 adds r7, #16
|
||
8004b6c: 46bd mov sp, r7
|
||
8004b6e: bd80 pop {r7, pc}
|
||
|
||
08004b70 <SD_disk_initialize>:
|
||
|
||
-----------------------------------------------------------------------*/
|
||
|
||
|
||
DSTATUS SD_disk_initialize(BYTE drv)
|
||
{
|
||
8004b70: b590 push {r4, r7, lr}
|
||
8004b72: b085 sub sp, #20
|
||
8004b74: af00 add r7, sp, #0
|
||
8004b76: 4603 mov r3, r0
|
||
8004b78: 71fb strb r3, [r7, #7]
|
||
uint8_t n, type, ocr[4];
|
||
|
||
|
||
if(drv)
|
||
8004b7a: 79fb ldrb r3, [r7, #7]
|
||
8004b7c: 2b00 cmp r3, #0
|
||
8004b7e: d001 beq.n 8004b84 <SD_disk_initialize+0x14>
|
||
return STA_NOINIT;
|
||
8004b80: 2301 movs r3, #1
|
||
8004b82: e0d5 b.n 8004d30 <SD_disk_initialize+0x1c0>
|
||
|
||
|
||
if(Stat & STA_NODISK)
|
||
8004b84: 4b6c ldr r3, [pc, #432] ; (8004d38 <SD_disk_initialize+0x1c8>)
|
||
8004b86: 781b ldrb r3, [r3, #0]
|
||
8004b88: b2db uxtb r3, r3
|
||
8004b8a: f003 0302 and.w r3, r3, #2
|
||
8004b8e: 2b00 cmp r3, #0
|
||
8004b90: d003 beq.n 8004b9a <SD_disk_initialize+0x2a>
|
||
return Stat;
|
||
8004b92: 4b69 ldr r3, [pc, #420] ; (8004d38 <SD_disk_initialize+0x1c8>)
|
||
8004b94: 781b ldrb r3, [r3, #0]
|
||
8004b96: b2db uxtb r3, r3
|
||
8004b98: e0ca b.n 8004d30 <SD_disk_initialize+0x1c0>
|
||
|
||
|
||
SD_PowerOn();
|
||
8004b9a: f7ff feab bl 80048f4 <SD_PowerOn>
|
||
|
||
|
||
SELECT();
|
||
8004b9e: f7ff fe2f bl 8004800 <SELECT>
|
||
|
||
|
||
type = 0;
|
||
8004ba2: 2300 movs r3, #0
|
||
8004ba4: 73bb strb r3, [r7, #14]
|
||
|
||
|
||
if (SD_SendCmd(CMD0, 0) == 1)
|
||
8004ba6: 2100 movs r1, #0
|
||
8004ba8: 2040 movs r0, #64 ; 0x40
|
||
8004baa: f7ff ff8f bl 8004acc <SD_SendCmd>
|
||
8004bae: 4603 mov r3, r0
|
||
8004bb0: 2b01 cmp r3, #1
|
||
8004bb2: f040 80a5 bne.w 8004d00 <SD_disk_initialize+0x190>
|
||
{
|
||
|
||
Timer1 = 100;
|
||
8004bb6: 4b61 ldr r3, [pc, #388] ; (8004d3c <SD_disk_initialize+0x1cc>)
|
||
8004bb8: 2264 movs r2, #100 ; 0x64
|
||
8004bba: 701a strb r2, [r3, #0]
|
||
|
||
|
||
if (SD_SendCmd(CMD8, 0x1AA) == 1)
|
||
8004bbc: f44f 71d5 mov.w r1, #426 ; 0x1aa
|
||
8004bc0: 2048 movs r0, #72 ; 0x48
|
||
8004bc2: f7ff ff83 bl 8004acc <SD_SendCmd>
|
||
8004bc6: 4603 mov r3, r0
|
||
8004bc8: 2b01 cmp r3, #1
|
||
8004bca: d158 bne.n 8004c7e <SD_disk_initialize+0x10e>
|
||
{
|
||
/* SDC Ver2+ */
|
||
for (n = 0; n < 4; n++)
|
||
8004bcc: 2300 movs r3, #0
|
||
8004bce: 73fb strb r3, [r7, #15]
|
||
8004bd0: e00c b.n 8004bec <SD_disk_initialize+0x7c>
|
||
{
|
||
ocr[n] = SPI_RxByte();
|
||
8004bd2: 7bfc ldrb r4, [r7, #15]
|
||
8004bd4: f7ff fe46 bl 8004864 <SPI_RxByte>
|
||
8004bd8: 4603 mov r3, r0
|
||
8004bda: 461a mov r2, r3
|
||
8004bdc: f107 0310 add.w r3, r7, #16
|
||
8004be0: 4423 add r3, r4
|
||
8004be2: f803 2c08 strb.w r2, [r3, #-8]
|
||
for (n = 0; n < 4; n++)
|
||
8004be6: 7bfb ldrb r3, [r7, #15]
|
||
8004be8: 3301 adds r3, #1
|
||
8004bea: 73fb strb r3, [r7, #15]
|
||
8004bec: 7bfb ldrb r3, [r7, #15]
|
||
8004bee: 2b03 cmp r3, #3
|
||
8004bf0: d9ef bls.n 8004bd2 <SD_disk_initialize+0x62>
|
||
}
|
||
|
||
if (ocr[2] == 0x01 && ocr[3] == 0xAA)
|
||
8004bf2: 7abb ldrb r3, [r7, #10]
|
||
8004bf4: 2b01 cmp r3, #1
|
||
8004bf6: f040 8083 bne.w 8004d00 <SD_disk_initialize+0x190>
|
||
8004bfa: 7afb ldrb r3, [r7, #11]
|
||
8004bfc: 2baa cmp r3, #170 ; 0xaa
|
||
8004bfe: d17f bne.n 8004d00 <SD_disk_initialize+0x190>
|
||
{
|
||
|
||
do {
|
||
if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 1UL << 30) == 0)
|
||
8004c00: 2100 movs r1, #0
|
||
8004c02: 2077 movs r0, #119 ; 0x77
|
||
8004c04: f7ff ff62 bl 8004acc <SD_SendCmd>
|
||
8004c08: 4603 mov r3, r0
|
||
8004c0a: 2b01 cmp r3, #1
|
||
8004c0c: d807 bhi.n 8004c1e <SD_disk_initialize+0xae>
|
||
8004c0e: f04f 4180 mov.w r1, #1073741824 ; 0x40000000
|
||
8004c12: 2069 movs r0, #105 ; 0x69
|
||
8004c14: f7ff ff5a bl 8004acc <SD_SendCmd>
|
||
8004c18: 4603 mov r3, r0
|
||
8004c1a: 2b00 cmp r3, #0
|
||
8004c1c: d005 beq.n 8004c2a <SD_disk_initialize+0xba>
|
||
break; /* ACMD41 with HCS bit */
|
||
} while (Timer1);
|
||
8004c1e: 4b47 ldr r3, [pc, #284] ; (8004d3c <SD_disk_initialize+0x1cc>)
|
||
8004c20: 781b ldrb r3, [r3, #0]
|
||
8004c22: b2db uxtb r3, r3
|
||
8004c24: 2b00 cmp r3, #0
|
||
8004c26: d1eb bne.n 8004c00 <SD_disk_initialize+0x90>
|
||
8004c28: e000 b.n 8004c2c <SD_disk_initialize+0xbc>
|
||
break; /* ACMD41 with HCS bit */
|
||
8004c2a: bf00 nop
|
||
|
||
if (Timer1 && SD_SendCmd(CMD58, 0) == 0)
|
||
8004c2c: 4b43 ldr r3, [pc, #268] ; (8004d3c <SD_disk_initialize+0x1cc>)
|
||
8004c2e: 781b ldrb r3, [r3, #0]
|
||
8004c30: b2db uxtb r3, r3
|
||
8004c32: 2b00 cmp r3, #0
|
||
8004c34: d064 beq.n 8004d00 <SD_disk_initialize+0x190>
|
||
8004c36: 2100 movs r1, #0
|
||
8004c38: 207a movs r0, #122 ; 0x7a
|
||
8004c3a: f7ff ff47 bl 8004acc <SD_SendCmd>
|
||
8004c3e: 4603 mov r3, r0
|
||
8004c40: 2b00 cmp r3, #0
|
||
8004c42: d15d bne.n 8004d00 <SD_disk_initialize+0x190>
|
||
{
|
||
/* Check CCS bit */
|
||
for (n = 0; n < 4; n++)
|
||
8004c44: 2300 movs r3, #0
|
||
8004c46: 73fb strb r3, [r7, #15]
|
||
8004c48: e00c b.n 8004c64 <SD_disk_initialize+0xf4>
|
||
{
|
||
ocr[n] = SPI_RxByte();
|
||
8004c4a: 7bfc ldrb r4, [r7, #15]
|
||
8004c4c: f7ff fe0a bl 8004864 <SPI_RxByte>
|
||
8004c50: 4603 mov r3, r0
|
||
8004c52: 461a mov r2, r3
|
||
8004c54: f107 0310 add.w r3, r7, #16
|
||
8004c58: 4423 add r3, r4
|
||
8004c5a: f803 2c08 strb.w r2, [r3, #-8]
|
||
for (n = 0; n < 4; n++)
|
||
8004c5e: 7bfb ldrb r3, [r7, #15]
|
||
8004c60: 3301 adds r3, #1
|
||
8004c62: 73fb strb r3, [r7, #15]
|
||
8004c64: 7bfb ldrb r3, [r7, #15]
|
||
8004c66: 2b03 cmp r3, #3
|
||
8004c68: d9ef bls.n 8004c4a <SD_disk_initialize+0xda>
|
||
}
|
||
|
||
type = (ocr[0] & 0x40) ? 6 : 2;
|
||
8004c6a: 7a3b ldrb r3, [r7, #8]
|
||
8004c6c: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
8004c70: 2b00 cmp r3, #0
|
||
8004c72: d001 beq.n 8004c78 <SD_disk_initialize+0x108>
|
||
8004c74: 2306 movs r3, #6
|
||
8004c76: e000 b.n 8004c7a <SD_disk_initialize+0x10a>
|
||
8004c78: 2302 movs r3, #2
|
||
8004c7a: 73bb strb r3, [r7, #14]
|
||
8004c7c: e040 b.n 8004d00 <SD_disk_initialize+0x190>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* SDC Ver1 or MMC */
|
||
type = (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) <= 1) ? 2 : 1; /* SDC : MMC */
|
||
8004c7e: 2100 movs r1, #0
|
||
8004c80: 2077 movs r0, #119 ; 0x77
|
||
8004c82: f7ff ff23 bl 8004acc <SD_SendCmd>
|
||
8004c86: 4603 mov r3, r0
|
||
8004c88: 2b01 cmp r3, #1
|
||
8004c8a: d808 bhi.n 8004c9e <SD_disk_initialize+0x12e>
|
||
8004c8c: 2100 movs r1, #0
|
||
8004c8e: 2069 movs r0, #105 ; 0x69
|
||
8004c90: f7ff ff1c bl 8004acc <SD_SendCmd>
|
||
8004c94: 4603 mov r3, r0
|
||
8004c96: 2b01 cmp r3, #1
|
||
8004c98: d801 bhi.n 8004c9e <SD_disk_initialize+0x12e>
|
||
8004c9a: 2302 movs r3, #2
|
||
8004c9c: e000 b.n 8004ca0 <SD_disk_initialize+0x130>
|
||
8004c9e: 2301 movs r3, #1
|
||
8004ca0: 73bb strb r3, [r7, #14]
|
||
|
||
do {
|
||
if (type == 2)
|
||
8004ca2: 7bbb ldrb r3, [r7, #14]
|
||
8004ca4: 2b02 cmp r3, #2
|
||
8004ca6: d10e bne.n 8004cc6 <SD_disk_initialize+0x156>
|
||
{
|
||
if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) == 0)
|
||
8004ca8: 2100 movs r1, #0
|
||
8004caa: 2077 movs r0, #119 ; 0x77
|
||
8004cac: f7ff ff0e bl 8004acc <SD_SendCmd>
|
||
8004cb0: 4603 mov r3, r0
|
||
8004cb2: 2b01 cmp r3, #1
|
||
8004cb4: d80e bhi.n 8004cd4 <SD_disk_initialize+0x164>
|
||
8004cb6: 2100 movs r1, #0
|
||
8004cb8: 2069 movs r0, #105 ; 0x69
|
||
8004cba: f7ff ff07 bl 8004acc <SD_SendCmd>
|
||
8004cbe: 4603 mov r3, r0
|
||
8004cc0: 2b00 cmp r3, #0
|
||
8004cc2: d107 bne.n 8004cd4 <SD_disk_initialize+0x164>
|
||
break; /* ACMD41 */
|
||
8004cc4: e00d b.n 8004ce2 <SD_disk_initialize+0x172>
|
||
}
|
||
else
|
||
{
|
||
if (SD_SendCmd(CMD1, 0) == 0)
|
||
8004cc6: 2100 movs r1, #0
|
||
8004cc8: 2041 movs r0, #65 ; 0x41
|
||
8004cca: f7ff feff bl 8004acc <SD_SendCmd>
|
||
8004cce: 4603 mov r3, r0
|
||
8004cd0: 2b00 cmp r3, #0
|
||
8004cd2: d005 beq.n 8004ce0 <SD_disk_initialize+0x170>
|
||
break; /* CMD1 */
|
||
}
|
||
} while (Timer1);
|
||
8004cd4: 4b19 ldr r3, [pc, #100] ; (8004d3c <SD_disk_initialize+0x1cc>)
|
||
8004cd6: 781b ldrb r3, [r3, #0]
|
||
8004cd8: b2db uxtb r3, r3
|
||
8004cda: 2b00 cmp r3, #0
|
||
8004cdc: d1e1 bne.n 8004ca2 <SD_disk_initialize+0x132>
|
||
8004cde: e000 b.n 8004ce2 <SD_disk_initialize+0x172>
|
||
break; /* CMD1 */
|
||
8004ce0: bf00 nop
|
||
|
||
if (!Timer1 || SD_SendCmd(CMD16, 512) != 0)
|
||
8004ce2: 4b16 ldr r3, [pc, #88] ; (8004d3c <SD_disk_initialize+0x1cc>)
|
||
8004ce4: 781b ldrb r3, [r3, #0]
|
||
8004ce6: b2db uxtb r3, r3
|
||
8004ce8: 2b00 cmp r3, #0
|
||
8004cea: d007 beq.n 8004cfc <SD_disk_initialize+0x18c>
|
||
8004cec: f44f 7100 mov.w r1, #512 ; 0x200
|
||
8004cf0: 2050 movs r0, #80 ; 0x50
|
||
8004cf2: f7ff feeb bl 8004acc <SD_SendCmd>
|
||
8004cf6: 4603 mov r3, r0
|
||
8004cf8: 2b00 cmp r3, #0
|
||
8004cfa: d001 beq.n 8004d00 <SD_disk_initialize+0x190>
|
||
{
|
||
|
||
type = 0;
|
||
8004cfc: 2300 movs r3, #0
|
||
8004cfe: 73bb strb r3, [r7, #14]
|
||
}
|
||
}
|
||
}
|
||
|
||
CardType = type;
|
||
8004d00: 4a0f ldr r2, [pc, #60] ; (8004d40 <SD_disk_initialize+0x1d0>)
|
||
8004d02: 7bbb ldrb r3, [r7, #14]
|
||
8004d04: 7013 strb r3, [r2, #0]
|
||
|
||
DESELECT();
|
||
8004d06: f7ff fd87 bl 8004818 <DESELECT>
|
||
|
||
SPI_RxByte();
|
||
8004d0a: f7ff fdab bl 8004864 <SPI_RxByte>
|
||
|
||
if (type)
|
||
8004d0e: 7bbb ldrb r3, [r7, #14]
|
||
8004d10: 2b00 cmp r3, #0
|
||
8004d12: d008 beq.n 8004d26 <SD_disk_initialize+0x1b6>
|
||
{
|
||
/* Clear STA_NOINIT */
|
||
Stat &= ~STA_NOINIT;
|
||
8004d14: 4b08 ldr r3, [pc, #32] ; (8004d38 <SD_disk_initialize+0x1c8>)
|
||
8004d16: 781b ldrb r3, [r3, #0]
|
||
8004d18: b2db uxtb r3, r3
|
||
8004d1a: f023 0301 bic.w r3, r3, #1
|
||
8004d1e: b2da uxtb r2, r3
|
||
8004d20: 4b05 ldr r3, [pc, #20] ; (8004d38 <SD_disk_initialize+0x1c8>)
|
||
8004d22: 701a strb r2, [r3, #0]
|
||
8004d24: e001 b.n 8004d2a <SD_disk_initialize+0x1ba>
|
||
}
|
||
else
|
||
{
|
||
/* Initialization failed */
|
||
SD_PowerOff();
|
||
8004d26: f7ff fe31 bl 800498c <SD_PowerOff>
|
||
}
|
||
|
||
return Stat;
|
||
8004d2a: 4b03 ldr r3, [pc, #12] ; (8004d38 <SD_disk_initialize+0x1c8>)
|
||
8004d2c: 781b ldrb r3, [r3, #0]
|
||
8004d2e: b2db uxtb r3, r3
|
||
}
|
||
8004d30: 4618 mov r0, r3
|
||
8004d32: 3714 adds r7, #20
|
||
8004d34: 46bd mov sp, r7
|
||
8004d36: bd90 pop {r4, r7, pc}
|
||
8004d38: 20000020 .word 0x20000020
|
||
8004d3c: 200007ad .word 0x200007ad
|
||
8004d40: 20000070 .word 0x20000070
|
||
|
||
08004d44 <SD_disk_status>:
|
||
|
||
|
||
DSTATUS SD_disk_status(BYTE drv)
|
||
{
|
||
8004d44: b480 push {r7}
|
||
8004d46: b083 sub sp, #12
|
||
8004d48: af00 add r7, sp, #0
|
||
8004d4a: 4603 mov r3, r0
|
||
8004d4c: 71fb strb r3, [r7, #7]
|
||
if (drv)
|
||
8004d4e: 79fb ldrb r3, [r7, #7]
|
||
8004d50: 2b00 cmp r3, #0
|
||
8004d52: d001 beq.n 8004d58 <SD_disk_status+0x14>
|
||
return STA_NOINIT;
|
||
8004d54: 2301 movs r3, #1
|
||
8004d56: e002 b.n 8004d5e <SD_disk_status+0x1a>
|
||
|
||
return Stat;
|
||
8004d58: 4b03 ldr r3, [pc, #12] ; (8004d68 <SD_disk_status+0x24>)
|
||
8004d5a: 781b ldrb r3, [r3, #0]
|
||
8004d5c: b2db uxtb r3, r3
|
||
}
|
||
8004d5e: 4618 mov r0, r3
|
||
8004d60: 370c adds r7, #12
|
||
8004d62: 46bd mov sp, r7
|
||
8004d64: bc80 pop {r7}
|
||
8004d66: 4770 bx lr
|
||
8004d68: 20000020 .word 0x20000020
|
||
|
||
08004d6c <SD_disk_read>:
|
||
|
||
|
||
DRESULT SD_disk_read(BYTE pdrv, BYTE* buff, DWORD sector, UINT count)
|
||
{
|
||
8004d6c: b580 push {r7, lr}
|
||
8004d6e: b084 sub sp, #16
|
||
8004d70: af00 add r7, sp, #0
|
||
8004d72: 60b9 str r1, [r7, #8]
|
||
8004d74: 607a str r2, [r7, #4]
|
||
8004d76: 603b str r3, [r7, #0]
|
||
8004d78: 4603 mov r3, r0
|
||
8004d7a: 73fb strb r3, [r7, #15]
|
||
if (pdrv || !count)
|
||
8004d7c: 7bfb ldrb r3, [r7, #15]
|
||
8004d7e: 2b00 cmp r3, #0
|
||
8004d80: d102 bne.n 8004d88 <SD_disk_read+0x1c>
|
||
8004d82: 683b ldr r3, [r7, #0]
|
||
8004d84: 2b00 cmp r3, #0
|
||
8004d86: d101 bne.n 8004d8c <SD_disk_read+0x20>
|
||
return RES_PARERR;
|
||
8004d88: 2304 movs r3, #4
|
||
8004d8a: e051 b.n 8004e30 <SD_disk_read+0xc4>
|
||
|
||
if (Stat & STA_NOINIT)
|
||
8004d8c: 4b2a ldr r3, [pc, #168] ; (8004e38 <SD_disk_read+0xcc>)
|
||
8004d8e: 781b ldrb r3, [r3, #0]
|
||
8004d90: b2db uxtb r3, r3
|
||
8004d92: f003 0301 and.w r3, r3, #1
|
||
8004d96: 2b00 cmp r3, #0
|
||
8004d98: d001 beq.n 8004d9e <SD_disk_read+0x32>
|
||
return RES_NOTRDY;
|
||
8004d9a: 2303 movs r3, #3
|
||
8004d9c: e048 b.n 8004e30 <SD_disk_read+0xc4>
|
||
|
||
if (!(CardType & 4))
|
||
8004d9e: 4b27 ldr r3, [pc, #156] ; (8004e3c <SD_disk_read+0xd0>)
|
||
8004da0: 781b ldrb r3, [r3, #0]
|
||
8004da2: f003 0304 and.w r3, r3, #4
|
||
8004da6: 2b00 cmp r3, #0
|
||
8004da8: d102 bne.n 8004db0 <SD_disk_read+0x44>
|
||
sector *= 512;
|
||
8004daa: 687b ldr r3, [r7, #4]
|
||
8004dac: 025b lsls r3, r3, #9
|
||
8004dae: 607b str r3, [r7, #4]
|
||
|
||
SELECT();
|
||
8004db0: f7ff fd26 bl 8004800 <SELECT>
|
||
|
||
if (count == 1)
|
||
8004db4: 683b ldr r3, [r7, #0]
|
||
8004db6: 2b01 cmp r3, #1
|
||
8004db8: d111 bne.n 8004dde <SD_disk_read+0x72>
|
||
{
|
||
|
||
if ((SD_SendCmd(CMD17, sector) == 0) && SD_RxDataBlock(buff, 512))
|
||
8004dba: 6879 ldr r1, [r7, #4]
|
||
8004dbc: 2051 movs r0, #81 ; 0x51
|
||
8004dbe: f7ff fe85 bl 8004acc <SD_SendCmd>
|
||
8004dc2: 4603 mov r3, r0
|
||
8004dc4: 2b00 cmp r3, #0
|
||
8004dc6: d129 bne.n 8004e1c <SD_disk_read+0xb0>
|
||
8004dc8: f44f 7100 mov.w r1, #512 ; 0x200
|
||
8004dcc: 68b8 ldr r0, [r7, #8]
|
||
8004dce: f7ff fdf3 bl 80049b8 <SD_RxDataBlock>
|
||
8004dd2: 4603 mov r3, r0
|
||
8004dd4: 2b00 cmp r3, #0
|
||
8004dd6: d021 beq.n 8004e1c <SD_disk_read+0xb0>
|
||
count = 0;
|
||
8004dd8: 2300 movs r3, #0
|
||
8004dda: 603b str r3, [r7, #0]
|
||
8004ddc: e01e b.n 8004e1c <SD_disk_read+0xb0>
|
||
}
|
||
else
|
||
{
|
||
|
||
if (SD_SendCmd(CMD18, sector) == 0)
|
||
8004dde: 6879 ldr r1, [r7, #4]
|
||
8004de0: 2052 movs r0, #82 ; 0x52
|
||
8004de2: f7ff fe73 bl 8004acc <SD_SendCmd>
|
||
8004de6: 4603 mov r3, r0
|
||
8004de8: 2b00 cmp r3, #0
|
||
8004dea: d117 bne.n 8004e1c <SD_disk_read+0xb0>
|
||
{
|
||
do {
|
||
if (!SD_RxDataBlock(buff, 512))
|
||
8004dec: f44f 7100 mov.w r1, #512 ; 0x200
|
||
8004df0: 68b8 ldr r0, [r7, #8]
|
||
8004df2: f7ff fde1 bl 80049b8 <SD_RxDataBlock>
|
||
8004df6: 4603 mov r3, r0
|
||
8004df8: 2b00 cmp r3, #0
|
||
8004dfa: d00a beq.n 8004e12 <SD_disk_read+0xa6>
|
||
break;
|
||
|
||
buff += 512;
|
||
8004dfc: 68bb ldr r3, [r7, #8]
|
||
8004dfe: f503 7300 add.w r3, r3, #512 ; 0x200
|
||
8004e02: 60bb str r3, [r7, #8]
|
||
} while (--count);
|
||
8004e04: 683b ldr r3, [r7, #0]
|
||
8004e06: 3b01 subs r3, #1
|
||
8004e08: 603b str r3, [r7, #0]
|
||
8004e0a: 683b ldr r3, [r7, #0]
|
||
8004e0c: 2b00 cmp r3, #0
|
||
8004e0e: d1ed bne.n 8004dec <SD_disk_read+0x80>
|
||
8004e10: e000 b.n 8004e14 <SD_disk_read+0xa8>
|
||
break;
|
||
8004e12: bf00 nop
|
||
|
||
|
||
SD_SendCmd(CMD12, 0);
|
||
8004e14: 2100 movs r1, #0
|
||
8004e16: 204c movs r0, #76 ; 0x4c
|
||
8004e18: f7ff fe58 bl 8004acc <SD_SendCmd>
|
||
}
|
||
}
|
||
|
||
DESELECT();
|
||
8004e1c: f7ff fcfc bl 8004818 <DESELECT>
|
||
SPI_RxByte();
|
||
8004e20: f7ff fd20 bl 8004864 <SPI_RxByte>
|
||
|
||
return count ? RES_ERROR : RES_OK;
|
||
8004e24: 683b ldr r3, [r7, #0]
|
||
8004e26: 2b00 cmp r3, #0
|
||
8004e28: bf14 ite ne
|
||
8004e2a: 2301 movne r3, #1
|
||
8004e2c: 2300 moveq r3, #0
|
||
8004e2e: b2db uxtb r3, r3
|
||
}
|
||
8004e30: 4618 mov r0, r3
|
||
8004e32: 3710 adds r7, #16
|
||
8004e34: 46bd mov sp, r7
|
||
8004e36: bd80 pop {r7, pc}
|
||
8004e38: 20000020 .word 0x20000020
|
||
8004e3c: 20000070 .word 0x20000070
|
||
|
||
08004e40 <SD_disk_write>:
|
||
|
||
|
||
#if _READONLY == 0
|
||
DRESULT SD_disk_write(BYTE pdrv, const BYTE* buff, DWORD sector, UINT count)
|
||
{
|
||
8004e40: b580 push {r7, lr}
|
||
8004e42: b084 sub sp, #16
|
||
8004e44: af00 add r7, sp, #0
|
||
8004e46: 60b9 str r1, [r7, #8]
|
||
8004e48: 607a str r2, [r7, #4]
|
||
8004e4a: 603b str r3, [r7, #0]
|
||
8004e4c: 4603 mov r3, r0
|
||
8004e4e: 73fb strb r3, [r7, #15]
|
||
if (pdrv || !count)
|
||
8004e50: 7bfb ldrb r3, [r7, #15]
|
||
8004e52: 2b00 cmp r3, #0
|
||
8004e54: d102 bne.n 8004e5c <SD_disk_write+0x1c>
|
||
8004e56: 683b ldr r3, [r7, #0]
|
||
8004e58: 2b00 cmp r3, #0
|
||
8004e5a: d101 bne.n 8004e60 <SD_disk_write+0x20>
|
||
return RES_PARERR;
|
||
8004e5c: 2304 movs r3, #4
|
||
8004e5e: e06b b.n 8004f38 <SD_disk_write+0xf8>
|
||
|
||
if (Stat & STA_NOINIT)
|
||
8004e60: 4b37 ldr r3, [pc, #220] ; (8004f40 <SD_disk_write+0x100>)
|
||
8004e62: 781b ldrb r3, [r3, #0]
|
||
8004e64: b2db uxtb r3, r3
|
||
8004e66: f003 0301 and.w r3, r3, #1
|
||
8004e6a: 2b00 cmp r3, #0
|
||
8004e6c: d001 beq.n 8004e72 <SD_disk_write+0x32>
|
||
return RES_NOTRDY;
|
||
8004e6e: 2303 movs r3, #3
|
||
8004e70: e062 b.n 8004f38 <SD_disk_write+0xf8>
|
||
|
||
if (Stat & STA_PROTECT)
|
||
8004e72: 4b33 ldr r3, [pc, #204] ; (8004f40 <SD_disk_write+0x100>)
|
||
8004e74: 781b ldrb r3, [r3, #0]
|
||
8004e76: b2db uxtb r3, r3
|
||
8004e78: f003 0304 and.w r3, r3, #4
|
||
8004e7c: 2b00 cmp r3, #0
|
||
8004e7e: d001 beq.n 8004e84 <SD_disk_write+0x44>
|
||
return RES_WRPRT;
|
||
8004e80: 2302 movs r3, #2
|
||
8004e82: e059 b.n 8004f38 <SD_disk_write+0xf8>
|
||
|
||
if (!(CardType & 4))
|
||
8004e84: 4b2f ldr r3, [pc, #188] ; (8004f44 <SD_disk_write+0x104>)
|
||
8004e86: 781b ldrb r3, [r3, #0]
|
||
8004e88: f003 0304 and.w r3, r3, #4
|
||
8004e8c: 2b00 cmp r3, #0
|
||
8004e8e: d102 bne.n 8004e96 <SD_disk_write+0x56>
|
||
sector *= 512;
|
||
8004e90: 687b ldr r3, [r7, #4]
|
||
8004e92: 025b lsls r3, r3, #9
|
||
8004e94: 607b str r3, [r7, #4]
|
||
|
||
SELECT();
|
||
8004e96: f7ff fcb3 bl 8004800 <SELECT>
|
||
|
||
if (count == 1)
|
||
8004e9a: 683b ldr r3, [r7, #0]
|
||
8004e9c: 2b01 cmp r3, #1
|
||
8004e9e: d110 bne.n 8004ec2 <SD_disk_write+0x82>
|
||
{
|
||
|
||
if ((SD_SendCmd(CMD24, sector) == 0) && SD_TxDataBlock(buff, 0xFE))
|
||
8004ea0: 6879 ldr r1, [r7, #4]
|
||
8004ea2: 2058 movs r0, #88 ; 0x58
|
||
8004ea4: f7ff fe12 bl 8004acc <SD_SendCmd>
|
||
8004ea8: 4603 mov r3, r0
|
||
8004eaa: 2b00 cmp r3, #0
|
||
8004eac: d13a bne.n 8004f24 <SD_disk_write+0xe4>
|
||
8004eae: 21fe movs r1, #254 ; 0xfe
|
||
8004eb0: 68b8 ldr r0, [r7, #8]
|
||
8004eb2: f7ff fdb7 bl 8004a24 <SD_TxDataBlock>
|
||
8004eb6: 4603 mov r3, r0
|
||
8004eb8: 2b00 cmp r3, #0
|
||
8004eba: d033 beq.n 8004f24 <SD_disk_write+0xe4>
|
||
count = 0;
|
||
8004ebc: 2300 movs r3, #0
|
||
8004ebe: 603b str r3, [r7, #0]
|
||
8004ec0: e030 b.n 8004f24 <SD_disk_write+0xe4>
|
||
}
|
||
else
|
||
{
|
||
|
||
if (CardType & 2)
|
||
8004ec2: 4b20 ldr r3, [pc, #128] ; (8004f44 <SD_disk_write+0x104>)
|
||
8004ec4: 781b ldrb r3, [r3, #0]
|
||
8004ec6: f003 0302 and.w r3, r3, #2
|
||
8004eca: 2b00 cmp r3, #0
|
||
8004ecc: d007 beq.n 8004ede <SD_disk_write+0x9e>
|
||
{
|
||
SD_SendCmd(CMD55, 0);
|
||
8004ece: 2100 movs r1, #0
|
||
8004ed0: 2077 movs r0, #119 ; 0x77
|
||
8004ed2: f7ff fdfb bl 8004acc <SD_SendCmd>
|
||
SD_SendCmd(CMD23, count); /* ACMD23 */
|
||
8004ed6: 6839 ldr r1, [r7, #0]
|
||
8004ed8: 2057 movs r0, #87 ; 0x57
|
||
8004eda: f7ff fdf7 bl 8004acc <SD_SendCmd>
|
||
}
|
||
|
||
if (SD_SendCmd(CMD25, sector) == 0)
|
||
8004ede: 6879 ldr r1, [r7, #4]
|
||
8004ee0: 2059 movs r0, #89 ; 0x59
|
||
8004ee2: f7ff fdf3 bl 8004acc <SD_SendCmd>
|
||
8004ee6: 4603 mov r3, r0
|
||
8004ee8: 2b00 cmp r3, #0
|
||
8004eea: d11b bne.n 8004f24 <SD_disk_write+0xe4>
|
||
{
|
||
do {
|
||
if(!SD_TxDataBlock(buff, 0xFC))
|
||
8004eec: 21fc movs r1, #252 ; 0xfc
|
||
8004eee: 68b8 ldr r0, [r7, #8]
|
||
8004ef0: f7ff fd98 bl 8004a24 <SD_TxDataBlock>
|
||
8004ef4: 4603 mov r3, r0
|
||
8004ef6: 2b00 cmp r3, #0
|
||
8004ef8: d00a beq.n 8004f10 <SD_disk_write+0xd0>
|
||
break;
|
||
|
||
buff += 512;
|
||
8004efa: 68bb ldr r3, [r7, #8]
|
||
8004efc: f503 7300 add.w r3, r3, #512 ; 0x200
|
||
8004f00: 60bb str r3, [r7, #8]
|
||
} while (--count);
|
||
8004f02: 683b ldr r3, [r7, #0]
|
||
8004f04: 3b01 subs r3, #1
|
||
8004f06: 603b str r3, [r7, #0]
|
||
8004f08: 683b ldr r3, [r7, #0]
|
||
8004f0a: 2b00 cmp r3, #0
|
||
8004f0c: d1ee bne.n 8004eec <SD_disk_write+0xac>
|
||
8004f0e: e000 b.n 8004f12 <SD_disk_write+0xd2>
|
||
break;
|
||
8004f10: bf00 nop
|
||
|
||
if(!SD_TxDataBlock(0, 0xFD))
|
||
8004f12: 21fd movs r1, #253 ; 0xfd
|
||
8004f14: 2000 movs r0, #0
|
||
8004f16: f7ff fd85 bl 8004a24 <SD_TxDataBlock>
|
||
8004f1a: 4603 mov r3, r0
|
||
8004f1c: 2b00 cmp r3, #0
|
||
8004f1e: d101 bne.n 8004f24 <SD_disk_write+0xe4>
|
||
{
|
||
count = 1;
|
||
8004f20: 2301 movs r3, #1
|
||
8004f22: 603b str r3, [r7, #0]
|
||
}
|
||
}
|
||
}
|
||
|
||
DESELECT();
|
||
8004f24: f7ff fc78 bl 8004818 <DESELECT>
|
||
SPI_RxByte();
|
||
8004f28: f7ff fc9c bl 8004864 <SPI_RxByte>
|
||
|
||
return count ? RES_ERROR : RES_OK;
|
||
8004f2c: 683b ldr r3, [r7, #0]
|
||
8004f2e: 2b00 cmp r3, #0
|
||
8004f30: bf14 ite ne
|
||
8004f32: 2301 movne r3, #1
|
||
8004f34: 2300 moveq r3, #0
|
||
8004f36: b2db uxtb r3, r3
|
||
}
|
||
8004f38: 4618 mov r0, r3
|
||
8004f3a: 3710 adds r7, #16
|
||
8004f3c: 46bd mov sp, r7
|
||
8004f3e: bd80 pop {r7, pc}
|
||
8004f40: 20000020 .word 0x20000020
|
||
8004f44: 20000070 .word 0x20000070
|
||
|
||
08004f48 <SD_disk_ioctl>:
|
||
#endif /* _READONLY */
|
||
|
||
|
||
DRESULT SD_disk_ioctl(BYTE drv, BYTE ctrl, void *buff)
|
||
{
|
||
8004f48: b590 push {r4, r7, lr}
|
||
8004f4a: b08b sub sp, #44 ; 0x2c
|
||
8004f4c: af00 add r7, sp, #0
|
||
8004f4e: 4603 mov r3, r0
|
||
8004f50: 603a str r2, [r7, #0]
|
||
8004f52: 71fb strb r3, [r7, #7]
|
||
8004f54: 460b mov r3, r1
|
||
8004f56: 71bb strb r3, [r7, #6]
|
||
DRESULT res;
|
||
BYTE n, csd[16], *ptr = buff;
|
||
8004f58: 683b ldr r3, [r7, #0]
|
||
8004f5a: 623b str r3, [r7, #32]
|
||
WORD csize;
|
||
|
||
if (drv)
|
||
8004f5c: 79fb ldrb r3, [r7, #7]
|
||
8004f5e: 2b00 cmp r3, #0
|
||
8004f60: d001 beq.n 8004f66 <SD_disk_ioctl+0x1e>
|
||
return RES_PARERR;
|
||
8004f62: 2304 movs r3, #4
|
||
8004f64: e11b b.n 800519e <SD_disk_ioctl+0x256>
|
||
|
||
res = RES_ERROR;
|
||
8004f66: 2301 movs r3, #1
|
||
8004f68: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
|
||
if (ctrl == CTRL_POWER)
|
||
8004f6c: 79bb ldrb r3, [r7, #6]
|
||
8004f6e: 2b05 cmp r3, #5
|
||
8004f70: d129 bne.n 8004fc6 <SD_disk_ioctl+0x7e>
|
||
{
|
||
switch (*ptr)
|
||
8004f72: 6a3b ldr r3, [r7, #32]
|
||
8004f74: 781b ldrb r3, [r3, #0]
|
||
8004f76: 2b02 cmp r3, #2
|
||
8004f78: d017 beq.n 8004faa <SD_disk_ioctl+0x62>
|
||
8004f7a: 2b02 cmp r3, #2
|
||
8004f7c: dc1f bgt.n 8004fbe <SD_disk_ioctl+0x76>
|
||
8004f7e: 2b00 cmp r3, #0
|
||
8004f80: d002 beq.n 8004f88 <SD_disk_ioctl+0x40>
|
||
8004f82: 2b01 cmp r3, #1
|
||
8004f84: d00b beq.n 8004f9e <SD_disk_ioctl+0x56>
|
||
8004f86: e01a b.n 8004fbe <SD_disk_ioctl+0x76>
|
||
{
|
||
case 0:
|
||
if (SD_CheckPower())
|
||
8004f88: f7ff fd0c bl 80049a4 <SD_CheckPower>
|
||
8004f8c: 4603 mov r3, r0
|
||
8004f8e: 2b00 cmp r3, #0
|
||
8004f90: d001 beq.n 8004f96 <SD_disk_ioctl+0x4e>
|
||
SD_PowerOff(); /* Power Off */
|
||
8004f92: f7ff fcfb bl 800498c <SD_PowerOff>
|
||
res = RES_OK;
|
||
8004f96: 2300 movs r3, #0
|
||
8004f98: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
8004f9c: e0fd b.n 800519a <SD_disk_ioctl+0x252>
|
||
case 1:
|
||
SD_PowerOn(); /* Power On */
|
||
8004f9e: f7ff fca9 bl 80048f4 <SD_PowerOn>
|
||
res = RES_OK;
|
||
8004fa2: 2300 movs r3, #0
|
||
8004fa4: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
8004fa8: e0f7 b.n 800519a <SD_disk_ioctl+0x252>
|
||
case 2:
|
||
*(ptr + 1) = (BYTE) SD_CheckPower();
|
||
8004faa: 6a3b ldr r3, [r7, #32]
|
||
8004fac: 1c5c adds r4, r3, #1
|
||
8004fae: f7ff fcf9 bl 80049a4 <SD_CheckPower>
|
||
8004fb2: 4603 mov r3, r0
|
||
8004fb4: 7023 strb r3, [r4, #0]
|
||
res = RES_OK; /* Power Check */
|
||
8004fb6: 2300 movs r3, #0
|
||
8004fb8: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
8004fbc: e0ed b.n 800519a <SD_disk_ioctl+0x252>
|
||
default:
|
||
res = RES_PARERR;
|
||
8004fbe: 2304 movs r3, #4
|
||
8004fc0: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
8004fc4: e0e9 b.n 800519a <SD_disk_ioctl+0x252>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
if (Stat & STA_NOINIT)
|
||
8004fc6: 4b78 ldr r3, [pc, #480] ; (80051a8 <SD_disk_ioctl+0x260>)
|
||
8004fc8: 781b ldrb r3, [r3, #0]
|
||
8004fca: b2db uxtb r3, r3
|
||
8004fcc: f003 0301 and.w r3, r3, #1
|
||
8004fd0: 2b00 cmp r3, #0
|
||
8004fd2: d001 beq.n 8004fd8 <SD_disk_ioctl+0x90>
|
||
return RES_NOTRDY;
|
||
8004fd4: 2303 movs r3, #3
|
||
8004fd6: e0e2 b.n 800519e <SD_disk_ioctl+0x256>
|
||
|
||
SELECT();
|
||
8004fd8: f7ff fc12 bl 8004800 <SELECT>
|
||
|
||
switch (ctrl)
|
||
8004fdc: 79bb ldrb r3, [r7, #6]
|
||
8004fde: 2b0d cmp r3, #13
|
||
8004fe0: f200 80cc bhi.w 800517c <SD_disk_ioctl+0x234>
|
||
8004fe4: a201 add r2, pc, #4 ; (adr r2, 8004fec <SD_disk_ioctl+0xa4>)
|
||
8004fe6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8004fea: bf00 nop
|
||
8004fec: 080050e7 .word 0x080050e7
|
||
8004ff0: 08005025 .word 0x08005025
|
||
8004ff4: 080050d7 .word 0x080050d7
|
||
8004ff8: 0800517d .word 0x0800517d
|
||
8004ffc: 0800517d .word 0x0800517d
|
||
8005000: 0800517d .word 0x0800517d
|
||
8005004: 0800517d .word 0x0800517d
|
||
8005008: 0800517d .word 0x0800517d
|
||
800500c: 0800517d .word 0x0800517d
|
||
8005010: 0800517d .word 0x0800517d
|
||
8005014: 0800517d .word 0x0800517d
|
||
8005018: 080050f9 .word 0x080050f9
|
||
800501c: 0800511d .word 0x0800511d
|
||
8005020: 08005141 .word 0x08005141
|
||
{
|
||
case GET_SECTOR_COUNT:
|
||
|
||
if ((SD_SendCmd(CMD9, 0) == 0) && SD_RxDataBlock(csd, 16))
|
||
8005024: 2100 movs r1, #0
|
||
8005026: 2049 movs r0, #73 ; 0x49
|
||
8005028: f7ff fd50 bl 8004acc <SD_SendCmd>
|
||
800502c: 4603 mov r3, r0
|
||
800502e: 2b00 cmp r3, #0
|
||
8005030: f040 80a8 bne.w 8005184 <SD_disk_ioctl+0x23c>
|
||
8005034: f107 030c add.w r3, r7, #12
|
||
8005038: 2110 movs r1, #16
|
||
800503a: 4618 mov r0, r3
|
||
800503c: f7ff fcbc bl 80049b8 <SD_RxDataBlock>
|
||
8005040: 4603 mov r3, r0
|
||
8005042: 2b00 cmp r3, #0
|
||
8005044: f000 809e beq.w 8005184 <SD_disk_ioctl+0x23c>
|
||
{
|
||
if ((csd[0] >> 6) == 1)
|
||
8005048: 7b3b ldrb r3, [r7, #12]
|
||
800504a: 099b lsrs r3, r3, #6
|
||
800504c: b2db uxtb r3, r3
|
||
800504e: 2b01 cmp r3, #1
|
||
8005050: d10e bne.n 8005070 <SD_disk_ioctl+0x128>
|
||
{
|
||
/* SDC ver 2.00 */
|
||
csize = csd[9] + ((WORD) csd[8] << 8) + 1;
|
||
8005052: 7d7b ldrb r3, [r7, #21]
|
||
8005054: b29a uxth r2, r3
|
||
8005056: 7d3b ldrb r3, [r7, #20]
|
||
8005058: b29b uxth r3, r3
|
||
800505a: 021b lsls r3, r3, #8
|
||
800505c: b29b uxth r3, r3
|
||
800505e: 4413 add r3, r2
|
||
8005060: b29b uxth r3, r3
|
||
8005062: 3301 adds r3, #1
|
||
8005064: 83fb strh r3, [r7, #30]
|
||
*(DWORD*) buff = (DWORD) csize << 10;
|
||
8005066: 8bfb ldrh r3, [r7, #30]
|
||
8005068: 029a lsls r2, r3, #10
|
||
800506a: 683b ldr r3, [r7, #0]
|
||
800506c: 601a str r2, [r3, #0]
|
||
800506e: e02e b.n 80050ce <SD_disk_ioctl+0x186>
|
||
}
|
||
else
|
||
{
|
||
/* MMC or SDC ver 1.XX */
|
||
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
||
8005070: 7c7b ldrb r3, [r7, #17]
|
||
8005072: f003 030f and.w r3, r3, #15
|
||
8005076: b2da uxtb r2, r3
|
||
8005078: 7dbb ldrb r3, [r7, #22]
|
||
800507a: 09db lsrs r3, r3, #7
|
||
800507c: b2db uxtb r3, r3
|
||
800507e: 4413 add r3, r2
|
||
8005080: b2da uxtb r2, r3
|
||
8005082: 7d7b ldrb r3, [r7, #21]
|
||
8005084: 005b lsls r3, r3, #1
|
||
8005086: b2db uxtb r3, r3
|
||
8005088: f003 0306 and.w r3, r3, #6
|
||
800508c: b2db uxtb r3, r3
|
||
800508e: 4413 add r3, r2
|
||
8005090: b2db uxtb r3, r3
|
||
8005092: 3302 adds r3, #2
|
||
8005094: f887 3026 strb.w r3, [r7, #38] ; 0x26
|
||
csize = (csd[8] >> 6) + ((WORD) csd[7] << 2) + ((WORD) (csd[6] & 3) << 10) + 1;
|
||
8005098: 7d3b ldrb r3, [r7, #20]
|
||
800509a: 099b lsrs r3, r3, #6
|
||
800509c: b2db uxtb r3, r3
|
||
800509e: b29a uxth r2, r3
|
||
80050a0: 7cfb ldrb r3, [r7, #19]
|
||
80050a2: b29b uxth r3, r3
|
||
80050a4: 009b lsls r3, r3, #2
|
||
80050a6: b29b uxth r3, r3
|
||
80050a8: 4413 add r3, r2
|
||
80050aa: b29a uxth r2, r3
|
||
80050ac: 7cbb ldrb r3, [r7, #18]
|
||
80050ae: 029b lsls r3, r3, #10
|
||
80050b0: b29b uxth r3, r3
|
||
80050b2: f403 6340 and.w r3, r3, #3072 ; 0xc00
|
||
80050b6: b29b uxth r3, r3
|
||
80050b8: 4413 add r3, r2
|
||
80050ba: b29b uxth r3, r3
|
||
80050bc: 3301 adds r3, #1
|
||
80050be: 83fb strh r3, [r7, #30]
|
||
*(DWORD*) buff = (DWORD) csize << (n - 9);
|
||
80050c0: 8bfa ldrh r2, [r7, #30]
|
||
80050c2: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
|
||
80050c6: 3b09 subs r3, #9
|
||
80050c8: 409a lsls r2, r3
|
||
80050ca: 683b ldr r3, [r7, #0]
|
||
80050cc: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
res = RES_OK;
|
||
80050ce: 2300 movs r3, #0
|
||
80050d0: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
}
|
||
break;
|
||
80050d4: e056 b.n 8005184 <SD_disk_ioctl+0x23c>
|
||
|
||
case GET_SECTOR_SIZE:
|
||
|
||
*(WORD*) buff = 512;
|
||
80050d6: 683b ldr r3, [r7, #0]
|
||
80050d8: f44f 7200 mov.w r2, #512 ; 0x200
|
||
80050dc: 801a strh r2, [r3, #0]
|
||
res = RES_OK;
|
||
80050de: 2300 movs r3, #0
|
||
80050e0: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
80050e4: e055 b.n 8005192 <SD_disk_ioctl+0x24a>
|
||
|
||
case CTRL_SYNC:
|
||
|
||
if (SD_ReadyWait() == 0xFF)
|
||
80050e6: f7ff fbe9 bl 80048bc <SD_ReadyWait>
|
||
80050ea: 4603 mov r3, r0
|
||
80050ec: 2bff cmp r3, #255 ; 0xff
|
||
80050ee: d14b bne.n 8005188 <SD_disk_ioctl+0x240>
|
||
res = RES_OK;
|
||
80050f0: 2300 movs r3, #0
|
||
80050f2: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
80050f6: e047 b.n 8005188 <SD_disk_ioctl+0x240>
|
||
|
||
case MMC_GET_CSD:
|
||
|
||
if (SD_SendCmd(CMD9, 0) == 0 && SD_RxDataBlock(ptr, 16))
|
||
80050f8: 2100 movs r1, #0
|
||
80050fa: 2049 movs r0, #73 ; 0x49
|
||
80050fc: f7ff fce6 bl 8004acc <SD_SendCmd>
|
||
8005100: 4603 mov r3, r0
|
||
8005102: 2b00 cmp r3, #0
|
||
8005104: d142 bne.n 800518c <SD_disk_ioctl+0x244>
|
||
8005106: 2110 movs r1, #16
|
||
8005108: 6a38 ldr r0, [r7, #32]
|
||
800510a: f7ff fc55 bl 80049b8 <SD_RxDataBlock>
|
||
800510e: 4603 mov r3, r0
|
||
8005110: 2b00 cmp r3, #0
|
||
8005112: d03b beq.n 800518c <SD_disk_ioctl+0x244>
|
||
res = RES_OK;
|
||
8005114: 2300 movs r3, #0
|
||
8005116: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
800511a: e037 b.n 800518c <SD_disk_ioctl+0x244>
|
||
|
||
case MMC_GET_CID:
|
||
|
||
if (SD_SendCmd(CMD10, 0) == 0 && SD_RxDataBlock(ptr, 16))
|
||
800511c: 2100 movs r1, #0
|
||
800511e: 204a movs r0, #74 ; 0x4a
|
||
8005120: f7ff fcd4 bl 8004acc <SD_SendCmd>
|
||
8005124: 4603 mov r3, r0
|
||
8005126: 2b00 cmp r3, #0
|
||
8005128: d132 bne.n 8005190 <SD_disk_ioctl+0x248>
|
||
800512a: 2110 movs r1, #16
|
||
800512c: 6a38 ldr r0, [r7, #32]
|
||
800512e: f7ff fc43 bl 80049b8 <SD_RxDataBlock>
|
||
8005132: 4603 mov r3, r0
|
||
8005134: 2b00 cmp r3, #0
|
||
8005136: d02b beq.n 8005190 <SD_disk_ioctl+0x248>
|
||
res = RES_OK;
|
||
8005138: 2300 movs r3, #0
|
||
800513a: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
800513e: e027 b.n 8005190 <SD_disk_ioctl+0x248>
|
||
|
||
case MMC_GET_OCR:
|
||
|
||
if (SD_SendCmd(CMD58, 0) == 0)
|
||
8005140: 2100 movs r1, #0
|
||
8005142: 207a movs r0, #122 ; 0x7a
|
||
8005144: f7ff fcc2 bl 8004acc <SD_SendCmd>
|
||
8005148: 4603 mov r3, r0
|
||
800514a: 2b00 cmp r3, #0
|
||
800514c: d116 bne.n 800517c <SD_disk_ioctl+0x234>
|
||
{
|
||
for (n = 0; n < 4; n++)
|
||
800514e: 2300 movs r3, #0
|
||
8005150: f887 3026 strb.w r3, [r7, #38] ; 0x26
|
||
8005154: e00b b.n 800516e <SD_disk_ioctl+0x226>
|
||
{
|
||
*ptr++ = SPI_RxByte();
|
||
8005156: 6a3c ldr r4, [r7, #32]
|
||
8005158: 1c63 adds r3, r4, #1
|
||
800515a: 623b str r3, [r7, #32]
|
||
800515c: f7ff fb82 bl 8004864 <SPI_RxByte>
|
||
8005160: 4603 mov r3, r0
|
||
8005162: 7023 strb r3, [r4, #0]
|
||
for (n = 0; n < 4; n++)
|
||
8005164: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
|
||
8005168: 3301 adds r3, #1
|
||
800516a: f887 3026 strb.w r3, [r7, #38] ; 0x26
|
||
800516e: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
|
||
8005172: 2b03 cmp r3, #3
|
||
8005174: d9ef bls.n 8005156 <SD_disk_ioctl+0x20e>
|
||
}
|
||
|
||
res = RES_OK;
|
||
8005176: 2300 movs r3, #0
|
||
8005178: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
}
|
||
|
||
default:
|
||
res = RES_PARERR;
|
||
800517c: 2304 movs r3, #4
|
||
800517e: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
8005182: e006 b.n 8005192 <SD_disk_ioctl+0x24a>
|
||
break;
|
||
8005184: bf00 nop
|
||
8005186: e004 b.n 8005192 <SD_disk_ioctl+0x24a>
|
||
break;
|
||
8005188: bf00 nop
|
||
800518a: e002 b.n 8005192 <SD_disk_ioctl+0x24a>
|
||
break;
|
||
800518c: bf00 nop
|
||
800518e: e000 b.n 8005192 <SD_disk_ioctl+0x24a>
|
||
break;
|
||
8005190: bf00 nop
|
||
}
|
||
|
||
DESELECT();
|
||
8005192: f7ff fb41 bl 8004818 <DESELECT>
|
||
SPI_RxByte();
|
||
8005196: f7ff fb65 bl 8004864 <SPI_RxByte>
|
||
}
|
||
|
||
return res;
|
||
800519a: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
|
||
}
|
||
800519e: 4618 mov r0, r3
|
||
80051a0: 372c adds r7, #44 ; 0x2c
|
||
80051a2: 46bd mov sp, r7
|
||
80051a4: bd90 pop {r4, r7, pc}
|
||
80051a6: bf00 nop
|
||
80051a8: 20000020 .word 0x20000020
|
||
|
||
080051ac <LCD_WR_REG>:
|
||
_lcd_dev lcddev; //����LCD��Ҫ����
|
||
//**************************************************���ֿ��ٽӿ�
|
||
//д�Ĵ�������
|
||
//regval:�Ĵ���ֵ
|
||
void LCD_WR_REG(uint16_t regval)
|
||
{
|
||
80051ac: b480 push {r7}
|
||
80051ae: b083 sub sp, #12
|
||
80051b0: af00 add r7, sp, #0
|
||
80051b2: 4603 mov r3, r0
|
||
80051b4: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=regval;//д��Ҫд�ļĴ�������
|
||
80051b6: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
80051ba: 88fb ldrh r3, [r7, #6]
|
||
80051bc: 8013 strh r3, [r2, #0]
|
||
}
|
||
80051be: bf00 nop
|
||
80051c0: 370c adds r7, #12
|
||
80051c2: 46bd mov sp, r7
|
||
80051c4: bc80 pop {r7}
|
||
80051c6: 4770 bx lr
|
||
|
||
080051c8 <LCD_WR_DATA>:
|
||
//дLCD����
|
||
//data:Ҫд����ֵ
|
||
void LCD_WR_DATA(uint16_t data)
|
||
{
|
||
80051c8: b480 push {r7}
|
||
80051ca: b083 sub sp, #12
|
||
80051cc: af00 add r7, sp, #0
|
||
80051ce: 4603 mov r3, r0
|
||
80051d0: 80fb strh r3, [r7, #6]
|
||
LCD_DATA_ADDRESS=data;
|
||
80051d2: 4a04 ldr r2, [pc, #16] ; (80051e4 <LCD_WR_DATA+0x1c>)
|
||
80051d4: 88fb ldrh r3, [r7, #6]
|
||
80051d6: 8013 strh r3, [r2, #0]
|
||
}
|
||
80051d8: bf00 nop
|
||
80051da: 370c adds r7, #12
|
||
80051dc: 46bd mov sp, r7
|
||
80051de: bc80 pop {r7}
|
||
80051e0: 4770 bx lr
|
||
80051e2: bf00 nop
|
||
80051e4: 6c000800 .word 0x6c000800
|
||
|
||
080051e8 <LCD_WriteReg>:
|
||
}
|
||
//д�Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//LCD_RegValue:Ҫд��������
|
||
void LCD_WriteReg(uint16_t LCD_Reg, uint16_t LCD_RegValue)
|
||
{
|
||
80051e8: b480 push {r7}
|
||
80051ea: b083 sub sp, #12
|
||
80051ec: af00 add r7, sp, #0
|
||
80051ee: 4603 mov r3, r0
|
||
80051f0: 460a mov r2, r1
|
||
80051f2: 80fb strh r3, [r7, #6]
|
||
80051f4: 4613 mov r3, r2
|
||
80051f6: 80bb strh r3, [r7, #4]
|
||
LCD_REG_ADDRESS = LCD_Reg; //д��Ҫд�ļĴ�������
|
||
80051f8: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
80051fc: 88fb ldrh r3, [r7, #6]
|
||
80051fe: 8013 strh r3, [r2, #0]
|
||
LCD_DATA_ADDRESS = LCD_RegValue;//�����
|
||
8005200: 4a03 ldr r2, [pc, #12] ; (8005210 <LCD_WriteReg+0x28>)
|
||
8005202: 88bb ldrh r3, [r7, #4]
|
||
8005204: 8013 strh r3, [r2, #0]
|
||
}
|
||
8005206: bf00 nop
|
||
8005208: 370c adds r7, #12
|
||
800520a: 46bd mov sp, r7
|
||
800520c: bc80 pop {r7}
|
||
800520e: 4770 bx lr
|
||
8005210: 6c000800 .word 0x6c000800
|
||
|
||
08005214 <LCD_ReadReg>:
|
||
//���Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//����ֵ:����������
|
||
uint16_t LCD_ReadReg(uint16_t LCD_Reg)
|
||
{
|
||
8005214: b480 push {r7}
|
||
8005216: b083 sub sp, #12
|
||
8005218: af00 add r7, sp, #0
|
||
800521a: 4603 mov r3, r0
|
||
800521c: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=LCD_Reg; //д��Ҫ���ļĴ�������
|
||
800521e: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
8005222: 88fb ldrh r3, [r7, #6]
|
||
8005224: 8013 strh r3, [r2, #0]
|
||
//delay_us(5);
|
||
return LCD_DATA_ADDRESS; //���ض�����ֵ
|
||
8005226: 4b04 ldr r3, [pc, #16] ; (8005238 <LCD_ReadReg+0x24>)
|
||
8005228: 881b ldrh r3, [r3, #0]
|
||
800522a: b29b uxth r3, r3
|
||
}
|
||
800522c: 4618 mov r0, r3
|
||
800522e: 370c adds r7, #12
|
||
8005230: 46bd mov sp, r7
|
||
8005232: bc80 pop {r7}
|
||
8005234: 4770 bx lr
|
||
8005236: bf00 nop
|
||
8005238: 6c000800 .word 0x6c000800
|
||
|
||
0800523c <LCD_Scan_Dir>:
|
||
//ע��:�����������ܻ��ܵ��˺������õ�Ӱ��(������9341/6804����������),
|
||
//����,һ������ΪL2R_U2D����,��������Ϊ����ɨ�跽ʽ,���ܵ�����ʾ������.
|
||
//dir:0~7,����8������(���嶨����lcd.h)
|
||
//9320/9325/9328/4531/4535/1505/b505/8989/5408/9341/5310��IC�Ѿ�ʵ�ʲ���
|
||
void LCD_Scan_Dir(uint8_t dir)
|
||
{
|
||
800523c: b580 push {r7, lr}
|
||
800523e: b084 sub sp, #16
|
||
8005240: af00 add r7, sp, #0
|
||
8005242: 4603 mov r3, r0
|
||
8005244: 71fb strb r3, [r7, #7]
|
||
uint16_t regval=0;
|
||
8005246: 2300 movs r3, #0
|
||
8005248: 81fb strh r3, [r7, #14]
|
||
uint8_t dirreg=0;
|
||
800524a: 2300 movs r3, #0
|
||
800524c: 737b strb r3, [r7, #13]
|
||
uint16_t temp;
|
||
if(lcddev.dir==1&&lcddev.id!=0X6804)//����ʱ����6804���ı�ɨ�跽����
|
||
800524e: 4ba8 ldr r3, [pc, #672] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
8005250: 799b ldrb r3, [r3, #6]
|
||
8005252: 2b01 cmp r3, #1
|
||
8005254: d134 bne.n 80052c0 <LCD_Scan_Dir+0x84>
|
||
8005256: 4ba6 ldr r3, [pc, #664] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
8005258: 889b ldrh r3, [r3, #4]
|
||
800525a: f646 0204 movw r2, #26628 ; 0x6804
|
||
800525e: 4293 cmp r3, r2
|
||
8005260: d02e beq.n 80052c0 <LCD_Scan_Dir+0x84>
|
||
{
|
||
switch(dir)//����ת��
|
||
8005262: 79fb ldrb r3, [r7, #7]
|
||
8005264: 2b07 cmp r3, #7
|
||
8005266: d82c bhi.n 80052c2 <LCD_Scan_Dir+0x86>
|
||
8005268: a201 add r2, pc, #4 ; (adr r2, 8005270 <LCD_Scan_Dir+0x34>)
|
||
800526a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
800526e: bf00 nop
|
||
8005270: 08005291 .word 0x08005291
|
||
8005274: 08005297 .word 0x08005297
|
||
8005278: 0800529d .word 0x0800529d
|
||
800527c: 080052a3 .word 0x080052a3
|
||
8005280: 080052a9 .word 0x080052a9
|
||
8005284: 080052af .word 0x080052af
|
||
8005288: 080052b5 .word 0x080052b5
|
||
800528c: 080052bb .word 0x080052bb
|
||
{
|
||
case 0:dir=6;break;
|
||
8005290: 2306 movs r3, #6
|
||
8005292: 71fb strb r3, [r7, #7]
|
||
8005294: e015 b.n 80052c2 <LCD_Scan_Dir+0x86>
|
||
case 1:dir=7;break;
|
||
8005296: 2307 movs r3, #7
|
||
8005298: 71fb strb r3, [r7, #7]
|
||
800529a: e012 b.n 80052c2 <LCD_Scan_Dir+0x86>
|
||
case 2:dir=4;break;
|
||
800529c: 2304 movs r3, #4
|
||
800529e: 71fb strb r3, [r7, #7]
|
||
80052a0: e00f b.n 80052c2 <LCD_Scan_Dir+0x86>
|
||
case 3:dir=5;break;
|
||
80052a2: 2305 movs r3, #5
|
||
80052a4: 71fb strb r3, [r7, #7]
|
||
80052a6: e00c b.n 80052c2 <LCD_Scan_Dir+0x86>
|
||
case 4:dir=1;break;
|
||
80052a8: 2301 movs r3, #1
|
||
80052aa: 71fb strb r3, [r7, #7]
|
||
80052ac: e009 b.n 80052c2 <LCD_Scan_Dir+0x86>
|
||
case 5:dir=0;break;
|
||
80052ae: 2300 movs r3, #0
|
||
80052b0: 71fb strb r3, [r7, #7]
|
||
80052b2: e006 b.n 80052c2 <LCD_Scan_Dir+0x86>
|
||
case 6:dir=3;break;
|
||
80052b4: 2303 movs r3, #3
|
||
80052b6: 71fb strb r3, [r7, #7]
|
||
80052b8: e003 b.n 80052c2 <LCD_Scan_Dir+0x86>
|
||
case 7:dir=2;break;
|
||
80052ba: 2302 movs r3, #2
|
||
80052bc: 71fb strb r3, [r7, #7]
|
||
80052be: e000 b.n 80052c2 <LCD_Scan_Dir+0x86>
|
||
}
|
||
}
|
||
80052c0: bf00 nop
|
||
if(lcddev.id==0x9341||lcddev.id==0X6804||lcddev.id==0X5310)//9341/6804/5310,������
|
||
80052c2: 4b8b ldr r3, [pc, #556] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80052c4: 889b ldrh r3, [r3, #4]
|
||
80052c6: f249 3241 movw r2, #37697 ; 0x9341
|
||
80052ca: 4293 cmp r3, r2
|
||
80052cc: d00c beq.n 80052e8 <LCD_Scan_Dir+0xac>
|
||
80052ce: 4b88 ldr r3, [pc, #544] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80052d0: 889b ldrh r3, [r3, #4]
|
||
80052d2: f646 0204 movw r2, #26628 ; 0x6804
|
||
80052d6: 4293 cmp r3, r2
|
||
80052d8: d006 beq.n 80052e8 <LCD_Scan_Dir+0xac>
|
||
80052da: 4b85 ldr r3, [pc, #532] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80052dc: 889b ldrh r3, [r3, #4]
|
||
80052de: f245 3210 movw r2, #21264 ; 0x5310
|
||
80052e2: 4293 cmp r3, r2
|
||
80052e4: f040 80bb bne.w 800545e <LCD_Scan_Dir+0x222>
|
||
{
|
||
switch(dir)
|
||
80052e8: 79fb ldrb r3, [r7, #7]
|
||
80052ea: 2b07 cmp r3, #7
|
||
80052ec: d835 bhi.n 800535a <LCD_Scan_Dir+0x11e>
|
||
80052ee: a201 add r2, pc, #4 ; (adr r2, 80052f4 <LCD_Scan_Dir+0xb8>)
|
||
80052f0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
80052f4: 0800535b .word 0x0800535b
|
||
80052f8: 08005315 .word 0x08005315
|
||
80052fc: 0800531f .word 0x0800531f
|
||
8005300: 08005329 .word 0x08005329
|
||
8005304: 08005333 .word 0x08005333
|
||
8005308: 0800533d .word 0x0800533d
|
||
800530c: 08005347 .word 0x08005347
|
||
8005310: 08005351 .word 0x08005351
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(0<<7)|(0<<6)|(0<<5);
|
||
break;
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(1<<7)|(0<<6)|(0<<5);
|
||
8005314: 89fb ldrh r3, [r7, #14]
|
||
8005316: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
800531a: 81fb strh r3, [r7, #14]
|
||
break;
|
||
800531c: e01d b.n 800535a <LCD_Scan_Dir+0x11e>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(0<<7)|(1<<6)|(0<<5);
|
||
800531e: 89fb ldrh r3, [r7, #14]
|
||
8005320: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8005324: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8005326: e018 b.n 800535a <LCD_Scan_Dir+0x11e>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(1<<7)|(1<<6)|(0<<5);
|
||
8005328: 89fb ldrh r3, [r7, #14]
|
||
800532a: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
||
800532e: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8005330: e013 b.n 800535a <LCD_Scan_Dir+0x11e>
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(0<<7)|(0<<6)|(1<<5);
|
||
8005332: 89fb ldrh r3, [r7, #14]
|
||
8005334: f043 0320 orr.w r3, r3, #32
|
||
8005338: 81fb strh r3, [r7, #14]
|
||
break;
|
||
800533a: e00e b.n 800535a <LCD_Scan_Dir+0x11e>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(0<<7)|(1<<6)|(1<<5);
|
||
800533c: 89fb ldrh r3, [r7, #14]
|
||
800533e: f043 0360 orr.w r3, r3, #96 ; 0x60
|
||
8005342: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8005344: e009 b.n 800535a <LCD_Scan_Dir+0x11e>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(1<<7)|(0<<6)|(1<<5);
|
||
8005346: 89fb ldrh r3, [r7, #14]
|
||
8005348: f043 03a0 orr.w r3, r3, #160 ; 0xa0
|
||
800534c: 81fb strh r3, [r7, #14]
|
||
break;
|
||
800534e: e004 b.n 800535a <LCD_Scan_Dir+0x11e>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(1<<7)|(1<<6)|(1<<5);
|
||
8005350: 89fb ldrh r3, [r7, #14]
|
||
8005352: f043 03e0 orr.w r3, r3, #224 ; 0xe0
|
||
8005356: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8005358: bf00 nop
|
||
}
|
||
dirreg=0X36;
|
||
800535a: 2336 movs r3, #54 ; 0x36
|
||
800535c: 737b strb r3, [r7, #13]
|
||
if(lcddev.id!=0X5310)regval|=0X08;//5310����ҪBGR
|
||
800535e: 4b64 ldr r3, [pc, #400] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
8005360: 889b ldrh r3, [r3, #4]
|
||
8005362: f245 3210 movw r2, #21264 ; 0x5310
|
||
8005366: 4293 cmp r3, r2
|
||
8005368: d003 beq.n 8005372 <LCD_Scan_Dir+0x136>
|
||
800536a: 89fb ldrh r3, [r7, #14]
|
||
800536c: f043 0308 orr.w r3, r3, #8
|
||
8005370: 81fb strh r3, [r7, #14]
|
||
if(lcddev.id==0X6804)regval|=0x02;//6804��BIT6��9341���
|
||
8005372: 4b5f ldr r3, [pc, #380] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
8005374: 889b ldrh r3, [r3, #4]
|
||
8005376: f646 0204 movw r2, #26628 ; 0x6804
|
||
800537a: 4293 cmp r3, r2
|
||
800537c: d103 bne.n 8005386 <LCD_Scan_Dir+0x14a>
|
||
800537e: 89fb ldrh r3, [r7, #14]
|
||
8005380: f043 0302 orr.w r3, r3, #2
|
||
8005384: 81fb strh r3, [r7, #14]
|
||
LCD_WriteReg(dirreg,regval);
|
||
8005386: 7b7b ldrb r3, [r7, #13]
|
||
8005388: b29b uxth r3, r3
|
||
800538a: 89fa ldrh r2, [r7, #14]
|
||
800538c: 4611 mov r1, r2
|
||
800538e: 4618 mov r0, r3
|
||
8005390: f7ff ff2a bl 80051e8 <LCD_WriteReg>
|
||
if((regval&0X20)||lcddev.dir==1)
|
||
8005394: 89fb ldrh r3, [r7, #14]
|
||
8005396: f003 0320 and.w r3, r3, #32
|
||
800539a: 2b00 cmp r3, #0
|
||
800539c: d103 bne.n 80053a6 <LCD_Scan_Dir+0x16a>
|
||
800539e: 4b54 ldr r3, [pc, #336] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053a0: 799b ldrb r3, [r3, #6]
|
||
80053a2: 2b01 cmp r3, #1
|
||
80053a4: d110 bne.n 80053c8 <LCD_Scan_Dir+0x18c>
|
||
{
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
80053a6: 4b52 ldr r3, [pc, #328] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053a8: 881a ldrh r2, [r3, #0]
|
||
80053aa: 4b51 ldr r3, [pc, #324] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053ac: 885b ldrh r3, [r3, #2]
|
||
80053ae: 429a cmp r2, r3
|
||
80053b0: d21a bcs.n 80053e8 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
80053b2: 4b4f ldr r3, [pc, #316] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053b4: 881b ldrh r3, [r3, #0]
|
||
80053b6: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
80053b8: 4b4d ldr r3, [pc, #308] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053ba: 885a ldrh r2, [r3, #2]
|
||
80053bc: 4b4c ldr r3, [pc, #304] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053be: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
80053c0: 4a4b ldr r2, [pc, #300] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053c2: 897b ldrh r3, [r7, #10]
|
||
80053c4: 8053 strh r3, [r2, #2]
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
80053c6: e00f b.n 80053e8 <LCD_Scan_Dir+0x1ac>
|
||
}
|
||
}else
|
||
{
|
||
if(lcddev.width>lcddev.height)//����X,Y
|
||
80053c8: 4b49 ldr r3, [pc, #292] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053ca: 881a ldrh r2, [r3, #0]
|
||
80053cc: 4b48 ldr r3, [pc, #288] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053ce: 885b ldrh r3, [r3, #2]
|
||
80053d0: 429a cmp r2, r3
|
||
80053d2: d909 bls.n 80053e8 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
80053d4: 4b46 ldr r3, [pc, #280] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053d6: 881b ldrh r3, [r3, #0]
|
||
80053d8: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
80053da: 4b45 ldr r3, [pc, #276] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053dc: 885a ldrh r2, [r3, #2]
|
||
80053de: 4b44 ldr r3, [pc, #272] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053e0: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
80053e2: 4a43 ldr r2, [pc, #268] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053e4: 897b ldrh r3, [r7, #10]
|
||
80053e6: 8053 strh r3, [r2, #2]
|
||
}
|
||
}
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
80053e8: 4b41 ldr r3, [pc, #260] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80053ea: 7a1b ldrb r3, [r3, #8]
|
||
80053ec: b29b uxth r3, r3
|
||
80053ee: 4618 mov r0, r3
|
||
80053f0: f7ff fedc bl 80051ac <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
80053f4: 2000 movs r0, #0
|
||
80053f6: f7ff fee7 bl 80051c8 <LCD_WR_DATA>
|
||
80053fa: 2000 movs r0, #0
|
||
80053fc: f7ff fee4 bl 80051c8 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.width-1)>>8);LCD_WR_DATA((lcddev.width-1)&0XFF);
|
||
8005400: 4b3b ldr r3, [pc, #236] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
8005402: 881b ldrh r3, [r3, #0]
|
||
8005404: 3b01 subs r3, #1
|
||
8005406: 121b asrs r3, r3, #8
|
||
8005408: b29b uxth r3, r3
|
||
800540a: 4618 mov r0, r3
|
||
800540c: f7ff fedc bl 80051c8 <LCD_WR_DATA>
|
||
8005410: 4b37 ldr r3, [pc, #220] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
8005412: 881b ldrh r3, [r3, #0]
|
||
8005414: 3b01 subs r3, #1
|
||
8005416: b29b uxth r3, r3
|
||
8005418: b2db uxtb r3, r3
|
||
800541a: b29b uxth r3, r3
|
||
800541c: 4618 mov r0, r3
|
||
800541e: f7ff fed3 bl 80051c8 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8005422: 4b33 ldr r3, [pc, #204] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
8005424: 7a5b ldrb r3, [r3, #9]
|
||
8005426: b29b uxth r3, r3
|
||
8005428: 4618 mov r0, r3
|
||
800542a: f7ff febf bl 80051ac <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
800542e: 2000 movs r0, #0
|
||
8005430: f7ff feca bl 80051c8 <LCD_WR_DATA>
|
||
8005434: 2000 movs r0, #0
|
||
8005436: f7ff fec7 bl 80051c8 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.height-1)>>8);LCD_WR_DATA((lcddev.height-1)&0XFF);
|
||
800543a: 4b2d ldr r3, [pc, #180] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
800543c: 885b ldrh r3, [r3, #2]
|
||
800543e: 3b01 subs r3, #1
|
||
8005440: 121b asrs r3, r3, #8
|
||
8005442: b29b uxth r3, r3
|
||
8005444: 4618 mov r0, r3
|
||
8005446: f7ff febf bl 80051c8 <LCD_WR_DATA>
|
||
800544a: 4b29 ldr r3, [pc, #164] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
800544c: 885b ldrh r3, [r3, #2]
|
||
800544e: 3b01 subs r3, #1
|
||
8005450: b29b uxth r3, r3
|
||
8005452: b2db uxtb r3, r3
|
||
8005454: b29b uxth r3, r3
|
||
8005456: 4618 mov r0, r3
|
||
8005458: f7ff feb6 bl 80051c8 <LCD_WR_DATA>
|
||
800545c: e058 b.n 8005510 <LCD_Scan_Dir+0x2d4>
|
||
}else
|
||
{
|
||
switch(dir)
|
||
800545e: 79fb ldrb r3, [r7, #7]
|
||
8005460: 2b07 cmp r3, #7
|
||
8005462: d836 bhi.n 80054d2 <LCD_Scan_Dir+0x296>
|
||
8005464: a201 add r2, pc, #4 ; (adr r2, 800546c <LCD_Scan_Dir+0x230>)
|
||
8005466: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
800546a: bf00 nop
|
||
800546c: 0800548d .word 0x0800548d
|
||
8005470: 08005497 .word 0x08005497
|
||
8005474: 080054a1 .word 0x080054a1
|
||
8005478: 080054d3 .word 0x080054d3
|
||
800547c: 080054ab .word 0x080054ab
|
||
8005480: 080054b5 .word 0x080054b5
|
||
8005484: 080054bf .word 0x080054bf
|
||
8005488: 080054c9 .word 0x080054c9
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(1<<5)|(1<<4)|(0<<3);
|
||
800548c: 89fb ldrh r3, [r7, #14]
|
||
800548e: f043 0330 orr.w r3, r3, #48 ; 0x30
|
||
8005492: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8005494: e01d b.n 80054d2 <LCD_Scan_Dir+0x296>
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(0<<5)|(1<<4)|(0<<3);
|
||
8005496: 89fb ldrh r3, [r7, #14]
|
||
8005498: f043 0310 orr.w r3, r3, #16
|
||
800549c: 81fb strh r3, [r7, #14]
|
||
break;
|
||
800549e: e018 b.n 80054d2 <LCD_Scan_Dir+0x296>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(1<<5)|(0<<4)|(0<<3);
|
||
80054a0: 89fb ldrh r3, [r7, #14]
|
||
80054a2: f043 0320 orr.w r3, r3, #32
|
||
80054a6: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80054a8: e013 b.n 80054d2 <LCD_Scan_Dir+0x296>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(0<<5)|(0<<4)|(0<<3);
|
||
break;
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(1<<5)|(1<<4)|(1<<3);
|
||
80054aa: 89fb ldrh r3, [r7, #14]
|
||
80054ac: f043 0338 orr.w r3, r3, #56 ; 0x38
|
||
80054b0: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80054b2: e00e b.n 80054d2 <LCD_Scan_Dir+0x296>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(1<<5)|(0<<4)|(1<<3);
|
||
80054b4: 89fb ldrh r3, [r7, #14]
|
||
80054b6: f043 0328 orr.w r3, r3, #40 ; 0x28
|
||
80054ba: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80054bc: e009 b.n 80054d2 <LCD_Scan_Dir+0x296>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(0<<5)|(1<<4)|(1<<3);
|
||
80054be: 89fb ldrh r3, [r7, #14]
|
||
80054c0: f043 0318 orr.w r3, r3, #24
|
||
80054c4: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80054c6: e004 b.n 80054d2 <LCD_Scan_Dir+0x296>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(0<<5)|(0<<4)|(1<<3);
|
||
80054c8: 89fb ldrh r3, [r7, #14]
|
||
80054ca: f043 0308 orr.w r3, r3, #8
|
||
80054ce: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80054d0: bf00 nop
|
||
}
|
||
if(lcddev.id==0x8989)//8989 IC
|
||
80054d2: 4b07 ldr r3, [pc, #28] ; (80054f0 <LCD_Scan_Dir+0x2b4>)
|
||
80054d4: 889b ldrh r3, [r3, #4]
|
||
80054d6: f648 1289 movw r2, #35209 ; 0x8989
|
||
80054da: 4293 cmp r3, r2
|
||
80054dc: d10a bne.n 80054f4 <LCD_Scan_Dir+0x2b8>
|
||
{
|
||
dirreg=0X11;
|
||
80054de: 2311 movs r3, #17
|
||
80054e0: 737b strb r3, [r7, #13]
|
||
regval|=0X6040; //65K
|
||
80054e2: 89fb ldrh r3, [r7, #14]
|
||
80054e4: f443 43c0 orr.w r3, r3, #24576 ; 0x6000
|
||
80054e8: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
80054ec: 81fb strh r3, [r7, #14]
|
||
80054ee: e007 b.n 8005500 <LCD_Scan_Dir+0x2c4>
|
||
80054f0: 200007b0 .word 0x200007b0
|
||
}else//��������IC
|
||
{
|
||
dirreg=0X03;
|
||
80054f4: 2303 movs r3, #3
|
||
80054f6: 737b strb r3, [r7, #13]
|
||
regval|=1<<12;
|
||
80054f8: 89fb ldrh r3, [r7, #14]
|
||
80054fa: f443 5380 orr.w r3, r3, #4096 ; 0x1000
|
||
80054fe: 81fb strh r3, [r7, #14]
|
||
}
|
||
LCD_WriteReg(dirreg,regval);
|
||
8005500: 7b7b ldrb r3, [r7, #13]
|
||
8005502: b29b uxth r3, r3
|
||
8005504: 89fa ldrh r2, [r7, #14]
|
||
8005506: 4611 mov r1, r2
|
||
8005508: 4618 mov r0, r3
|
||
800550a: f7ff fe6d bl 80051e8 <LCD_WriteReg>
|
||
}
|
||
}
|
||
800550e: bf00 nop
|
||
8005510: bf00 nop
|
||
8005512: 3710 adds r7, #16
|
||
8005514: 46bd mov sp, r7
|
||
8005516: bd80 pop {r7, pc}
|
||
|
||
08005518 <LCD_Display_Dir>:
|
||
//����LCD��ʾ����
|
||
//dir:0,������1,����
|
||
void LCD_Display_Dir(uint8_t dir)
|
||
{
|
||
8005518: b580 push {r7, lr}
|
||
800551a: b082 sub sp, #8
|
||
800551c: af00 add r7, sp, #0
|
||
800551e: 4603 mov r3, r0
|
||
8005520: 71fb strb r3, [r7, #7]
|
||
if(dir==0) //����
|
||
8005522: 79fb ldrb r3, [r7, #7]
|
||
8005524: 2b00 cmp r3, #0
|
||
8005526: d154 bne.n 80055d2 <LCD_Display_Dir+0xba>
|
||
{
|
||
lcddev.dir=0; //����
|
||
8005528: 4b5d ldr r3, [pc, #372] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
800552a: 2200 movs r2, #0
|
||
800552c: 719a strb r2, [r3, #6]
|
||
lcddev.width=240;
|
||
800552e: 4b5c ldr r3, [pc, #368] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005530: 22f0 movs r2, #240 ; 0xf0
|
||
8005532: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
8005534: 4b5a ldr r3, [pc, #360] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005536: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
800553a: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X6804||lcddev.id==0X5310)
|
||
800553c: 4b58 ldr r3, [pc, #352] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
800553e: 889b ldrh r3, [r3, #4]
|
||
8005540: f249 3241 movw r2, #37697 ; 0x9341
|
||
8005544: 4293 cmp r3, r2
|
||
8005546: d00b beq.n 8005560 <LCD_Display_Dir+0x48>
|
||
8005548: 4b55 ldr r3, [pc, #340] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
800554a: 889b ldrh r3, [r3, #4]
|
||
800554c: f646 0204 movw r2, #26628 ; 0x6804
|
||
8005550: 4293 cmp r3, r2
|
||
8005552: d005 beq.n 8005560 <LCD_Display_Dir+0x48>
|
||
8005554: 4b52 ldr r3, [pc, #328] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005556: 889b ldrh r3, [r3, #4]
|
||
8005558: f245 3210 movw r2, #21264 ; 0x5310
|
||
800555c: 4293 cmp r3, r2
|
||
800555e: d11e bne.n 800559e <LCD_Display_Dir+0x86>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8005560: 4b4f ldr r3, [pc, #316] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005562: 222c movs r2, #44 ; 0x2c
|
||
8005564: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8005566: 4b4e ldr r3, [pc, #312] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005568: 222a movs r2, #42 ; 0x2a
|
||
800556a: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
800556c: 4b4c ldr r3, [pc, #304] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
800556e: 222b movs r2, #43 ; 0x2b
|
||
8005570: 725a strb r2, [r3, #9]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8005572: 4b4b ldr r3, [pc, #300] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005574: 889b ldrh r3, [r3, #4]
|
||
8005576: f646 0204 movw r2, #26628 ; 0x6804
|
||
800557a: 4293 cmp r3, r2
|
||
800557c: d006 beq.n 800558c <LCD_Display_Dir+0x74>
|
||
800557e: 4b48 ldr r3, [pc, #288] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005580: 889b ldrh r3, [r3, #4]
|
||
8005582: f245 3210 movw r2, #21264 ; 0x5310
|
||
8005586: 4293 cmp r3, r2
|
||
8005588: f040 8081 bne.w 800568e <LCD_Display_Dir+0x176>
|
||
{
|
||
lcddev.width=320;
|
||
800558c: 4b44 ldr r3, [pc, #272] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
800558e: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8005592: 801a strh r2, [r3, #0]
|
||
lcddev.height=480;
|
||
8005594: 4b42 ldr r3, [pc, #264] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005596: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
800559a: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
800559c: e077 b.n 800568e <LCD_Display_Dir+0x176>
|
||
}
|
||
}else if(lcddev.id==0X8989)
|
||
800559e: 4b40 ldr r3, [pc, #256] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055a0: 889b ldrh r3, [r3, #4]
|
||
80055a2: f648 1289 movw r2, #35209 ; 0x8989
|
||
80055a6: 4293 cmp r3, r2
|
||
80055a8: d109 bne.n 80055be <LCD_Display_Dir+0xa6>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
80055aa: 4b3d ldr r3, [pc, #244] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055ac: 2222 movs r2, #34 ; 0x22
|
||
80055ae: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4E;
|
||
80055b0: 4b3b ldr r3, [pc, #236] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055b2: 224e movs r2, #78 ; 0x4e
|
||
80055b4: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4F;
|
||
80055b6: 4b3a ldr r3, [pc, #232] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055b8: 224f movs r2, #79 ; 0x4f
|
||
80055ba: 725a strb r2, [r3, #9]
|
||
80055bc: e068 b.n 8005690 <LCD_Display_Dir+0x178>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
80055be: 4b38 ldr r3, [pc, #224] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055c0: 2222 movs r2, #34 ; 0x22
|
||
80055c2: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R32;
|
||
80055c4: 4b36 ldr r3, [pc, #216] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055c6: 2220 movs r2, #32
|
||
80055c8: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R33;
|
||
80055ca: 4b35 ldr r3, [pc, #212] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055cc: 2221 movs r2, #33 ; 0x21
|
||
80055ce: 725a strb r2, [r3, #9]
|
||
80055d0: e05e b.n 8005690 <LCD_Display_Dir+0x178>
|
||
}
|
||
}else //����
|
||
{
|
||
lcddev.dir=1; //����
|
||
80055d2: 4b33 ldr r3, [pc, #204] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055d4: 2201 movs r2, #1
|
||
80055d6: 719a strb r2, [r3, #6]
|
||
lcddev.width=320;
|
||
80055d8: 4b31 ldr r3, [pc, #196] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055da: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
80055de: 801a strh r2, [r3, #0]
|
||
lcddev.height=240;
|
||
80055e0: 4b2f ldr r3, [pc, #188] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055e2: 22f0 movs r2, #240 ; 0xf0
|
||
80055e4: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
80055e6: 4b2e ldr r3, [pc, #184] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055e8: 889b ldrh r3, [r3, #4]
|
||
80055ea: f249 3241 movw r2, #37697 ; 0x9341
|
||
80055ee: 4293 cmp r3, r2
|
||
80055f0: d005 beq.n 80055fe <LCD_Display_Dir+0xe6>
|
||
80055f2: 4b2b ldr r3, [pc, #172] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
80055f4: 889b ldrh r3, [r3, #4]
|
||
80055f6: f245 3210 movw r2, #21264 ; 0x5310
|
||
80055fa: 4293 cmp r3, r2
|
||
80055fc: d109 bne.n 8005612 <LCD_Display_Dir+0xfa>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
80055fe: 4b28 ldr r3, [pc, #160] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005600: 222c movs r2, #44 ; 0x2c
|
||
8005602: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8005604: 4b26 ldr r3, [pc, #152] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005606: 222a movs r2, #42 ; 0x2a
|
||
8005608: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
800560a: 4b25 ldr r3, [pc, #148] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
800560c: 222b movs r2, #43 ; 0x2b
|
||
800560e: 725a strb r2, [r3, #9]
|
||
8005610: e028 b.n 8005664 <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X6804)
|
||
8005612: 4b23 ldr r3, [pc, #140] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005614: 889b ldrh r3, [r3, #4]
|
||
8005616: f646 0204 movw r2, #26628 ; 0x6804
|
||
800561a: 4293 cmp r3, r2
|
||
800561c: d109 bne.n 8005632 <LCD_Display_Dir+0x11a>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
800561e: 4b20 ldr r3, [pc, #128] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005620: 222c movs r2, #44 ; 0x2c
|
||
8005622: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2B;
|
||
8005624: 4b1e ldr r3, [pc, #120] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005626: 222b movs r2, #43 ; 0x2b
|
||
8005628: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
800562a: 4b1d ldr r3, [pc, #116] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
800562c: 222a movs r2, #42 ; 0x2a
|
||
800562e: 725a strb r2, [r3, #9]
|
||
8005630: e018 b.n 8005664 <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X8989)
|
||
8005632: 4b1b ldr r3, [pc, #108] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005634: 889b ldrh r3, [r3, #4]
|
||
8005636: f648 1289 movw r2, #35209 ; 0x8989
|
||
800563a: 4293 cmp r3, r2
|
||
800563c: d109 bne.n 8005652 <LCD_Display_Dir+0x13a>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
800563e: 4b18 ldr r3, [pc, #96] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005640: 2222 movs r2, #34 ; 0x22
|
||
8005642: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4F;
|
||
8005644: 4b16 ldr r3, [pc, #88] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005646: 224f movs r2, #79 ; 0x4f
|
||
8005648: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4E;
|
||
800564a: 4b15 ldr r3, [pc, #84] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
800564c: 224e movs r2, #78 ; 0x4e
|
||
800564e: 725a strb r2, [r3, #9]
|
||
8005650: e008 b.n 8005664 <LCD_Display_Dir+0x14c>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8005652: 4b13 ldr r3, [pc, #76] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005654: 2222 movs r2, #34 ; 0x22
|
||
8005656: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R33;
|
||
8005658: 4b11 ldr r3, [pc, #68] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
800565a: 2221 movs r2, #33 ; 0x21
|
||
800565c: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R32;
|
||
800565e: 4b10 ldr r3, [pc, #64] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005660: 2220 movs r2, #32
|
||
8005662: 725a strb r2, [r3, #9]
|
||
}
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8005664: 4b0e ldr r3, [pc, #56] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005666: 889b ldrh r3, [r3, #4]
|
||
8005668: f646 0204 movw r2, #26628 ; 0x6804
|
||
800566c: 4293 cmp r3, r2
|
||
800566e: d005 beq.n 800567c <LCD_Display_Dir+0x164>
|
||
8005670: 4b0b ldr r3, [pc, #44] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005672: 889b ldrh r3, [r3, #4]
|
||
8005674: f245 3210 movw r2, #21264 ; 0x5310
|
||
8005678: 4293 cmp r3, r2
|
||
800567a: d109 bne.n 8005690 <LCD_Display_Dir+0x178>
|
||
{
|
||
lcddev.width=480;
|
||
800567c: 4b08 ldr r3, [pc, #32] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
800567e: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
8005682: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
8005684: 4b06 ldr r3, [pc, #24] ; (80056a0 <LCD_Display_Dir+0x188>)
|
||
8005686: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
800568a: 805a strh r2, [r3, #2]
|
||
800568c: e000 b.n 8005690 <LCD_Display_Dir+0x178>
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
800568e: bf00 nop
|
||
}
|
||
}
|
||
LCD_Scan_Dir(DFT_SCAN_DIR); //Ĭ��ɨ�跽��
|
||
8005690: 2000 movs r0, #0
|
||
8005692: f7ff fdd3 bl 800523c <LCD_Scan_Dir>
|
||
}
|
||
8005696: bf00 nop
|
||
8005698: 3708 adds r7, #8
|
||
800569a: 46bd mov sp, r7
|
||
800569c: bd80 pop {r7, pc}
|
||
800569e: bf00 nop
|
||
80056a0: 200007b0 .word 0x200007b0
|
||
|
||
080056a4 <LCDx_Init>:
|
||
|
||
//��ʼ��lcd
|
||
//�ó�ʼ���������Գ�ʼ������Һ��!
|
||
void LCDx_Init(void)
|
||
{
|
||
80056a4: b580 push {r7, lr}
|
||
80056a6: af00 add r7, sp, #0
|
||
|
||
LCD_BL(0);
|
||
80056a8: 2200 movs r2, #0
|
||
80056aa: 2101 movs r1, #1
|
||
80056ac: 4876 ldr r0, [pc, #472] ; (8005888 <LCDx_Init+0x1e4>)
|
||
80056ae: f7fb fb63 bl 8000d78 <HAL_GPIO_WritePin>
|
||
HAL_Delay(50); // delay 50 ms
|
||
80056b2: 2032 movs r0, #50 ; 0x32
|
||
80056b4: f7fb f8c4 bl 8000840 <HAL_Delay>
|
||
LCD_WriteReg(0x0000,0x0001);
|
||
80056b8: 2101 movs r1, #1
|
||
80056ba: 2000 movs r0, #0
|
||
80056bc: f7ff fd94 bl 80051e8 <LCD_WriteReg>
|
||
HAL_Delay(50); // delay 50 ms
|
||
80056c0: 2032 movs r0, #50 ; 0x32
|
||
80056c2: f7fb f8bd bl 8000840 <HAL_Delay>
|
||
lcddev.id = LCD_ReadReg(0x0000);
|
||
80056c6: 2000 movs r0, #0
|
||
80056c8: f7ff fda4 bl 8005214 <LCD_ReadReg>
|
||
80056cc: 4603 mov r3, r0
|
||
80056ce: 461a mov r2, r3
|
||
80056d0: 4b6e ldr r3, [pc, #440] ; (800588c <LCDx_Init+0x1e8>)
|
||
80056d2: 809a strh r2, [r3, #4]
|
||
|
||
|
||
LCD_WriteReg(0x00E5,0x78F0);
|
||
80056d4: f647 01f0 movw r1, #30960 ; 0x78f0
|
||
80056d8: 20e5 movs r0, #229 ; 0xe5
|
||
80056da: f7ff fd85 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0001,0x0100);
|
||
80056de: f44f 7180 mov.w r1, #256 ; 0x100
|
||
80056e2: 2001 movs r0, #1
|
||
80056e4: f7ff fd80 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0002,0x0700);
|
||
80056e8: f44f 61e0 mov.w r1, #1792 ; 0x700
|
||
80056ec: 2002 movs r0, #2
|
||
80056ee: f7ff fd7b bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0003,0x1030);
|
||
80056f2: f241 0130 movw r1, #4144 ; 0x1030
|
||
80056f6: 2003 movs r0, #3
|
||
80056f8: f7ff fd76 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0004,0x0000);
|
||
80056fc: 2100 movs r1, #0
|
||
80056fe: 2004 movs r0, #4
|
||
8005700: f7ff fd72 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0008,0x0202);
|
||
8005704: f240 2102 movw r1, #514 ; 0x202
|
||
8005708: 2008 movs r0, #8
|
||
800570a: f7ff fd6d bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0009,0x0000);
|
||
800570e: 2100 movs r1, #0
|
||
8005710: 2009 movs r0, #9
|
||
8005712: f7ff fd69 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000A,0x0000);
|
||
8005716: 2100 movs r1, #0
|
||
8005718: 200a movs r0, #10
|
||
800571a: f7ff fd65 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000C,0x0000);
|
||
800571e: 2100 movs r1, #0
|
||
8005720: 200c movs r0, #12
|
||
8005722: f7ff fd61 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000D,0x0000);
|
||
8005726: 2100 movs r1, #0
|
||
8005728: 200d movs r0, #13
|
||
800572a: f7ff fd5d bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000F,0x0000);
|
||
800572e: 2100 movs r1, #0
|
||
8005730: 200f movs r0, #15
|
||
8005732: f7ff fd59 bl 80051e8 <LCD_WriteReg>
|
||
//power on sequence VGHVGL
|
||
LCD_WriteReg(0x0010,0x0000);
|
||
8005736: 2100 movs r1, #0
|
||
8005738: 2010 movs r0, #16
|
||
800573a: f7ff fd55 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0007);
|
||
800573e: 2107 movs r1, #7
|
||
8005740: 2011 movs r0, #17
|
||
8005742: f7ff fd51 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0012,0x0000);
|
||
8005746: 2100 movs r1, #0
|
||
8005748: 2012 movs r0, #18
|
||
800574a: f7ff fd4d bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0013,0x0000);
|
||
800574e: 2100 movs r1, #0
|
||
8005750: 2013 movs r0, #19
|
||
8005752: f7ff fd49 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0007,0x0000);
|
||
8005756: 2100 movs r1, #0
|
||
8005758: 2007 movs r0, #7
|
||
800575a: f7ff fd45 bl 80051e8 <LCD_WriteReg>
|
||
//vgh
|
||
LCD_WriteReg(0x0010,0x1690);
|
||
800575e: f241 6190 movw r1, #5776 ; 0x1690
|
||
8005762: 2010 movs r0, #16
|
||
8005764: f7ff fd40 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0227);
|
||
8005768: f240 2127 movw r1, #551 ; 0x227
|
||
800576c: 2011 movs r0, #17
|
||
800576e: f7ff fd3b bl 80051e8 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vregiout
|
||
LCD_WriteReg(0x0012,0x009D); //0x001b
|
||
8005772: 219d movs r1, #157 ; 0x9d
|
||
8005774: 2012 movs r0, #18
|
||
8005776: f7ff fd37 bl 80051e8 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom amplitude
|
||
LCD_WriteReg(0x0013,0x1900);
|
||
800577a: f44f 51c8 mov.w r1, #6400 ; 0x1900
|
||
800577e: 2013 movs r0, #19
|
||
8005780: f7ff fd32 bl 80051e8 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom H
|
||
LCD_WriteReg(0x0029,0x0025);
|
||
8005784: 2125 movs r1, #37 ; 0x25
|
||
8005786: 2029 movs r0, #41 ; 0x29
|
||
8005788: f7ff fd2e bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x002B,0x000D);
|
||
800578c: 210d movs r1, #13
|
||
800578e: 202b movs r0, #43 ; 0x2b
|
||
8005790: f7ff fd2a bl 80051e8 <LCD_WriteReg>
|
||
//gamma
|
||
LCD_WriteReg(0x0030,0x0007);
|
||
8005794: 2107 movs r1, #7
|
||
8005796: 2030 movs r0, #48 ; 0x30
|
||
8005798: f7ff fd26 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0031,0x0303);
|
||
800579c: f240 3103 movw r1, #771 ; 0x303
|
||
80057a0: 2031 movs r0, #49 ; 0x31
|
||
80057a2: f7ff fd21 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0032,0x0003);// 0006
|
||
80057a6: 2103 movs r1, #3
|
||
80057a8: 2032 movs r0, #50 ; 0x32
|
||
80057aa: f7ff fd1d bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0035,0x0206);
|
||
80057ae: f240 2106 movw r1, #518 ; 0x206
|
||
80057b2: 2035 movs r0, #53 ; 0x35
|
||
80057b4: f7ff fd18 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0036,0x0008);
|
||
80057b8: 2108 movs r1, #8
|
||
80057ba: 2036 movs r0, #54 ; 0x36
|
||
80057bc: f7ff fd14 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0037,0x0406);
|
||
80057c0: f240 4106 movw r1, #1030 ; 0x406
|
||
80057c4: 2037 movs r0, #55 ; 0x37
|
||
80057c6: f7ff fd0f bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0038,0x0304);//0200
|
||
80057ca: f44f 7141 mov.w r1, #772 ; 0x304
|
||
80057ce: 2038 movs r0, #56 ; 0x38
|
||
80057d0: f7ff fd0a bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0039,0x0007);
|
||
80057d4: 2107 movs r1, #7
|
||
80057d6: 2039 movs r0, #57 ; 0x39
|
||
80057d8: f7ff fd06 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003C,0x0602);// 0504
|
||
80057dc: f240 6102 movw r1, #1538 ; 0x602
|
||
80057e0: 203c movs r0, #60 ; 0x3c
|
||
80057e2: f7ff fd01 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003D,0x0008);
|
||
80057e6: 2108 movs r1, #8
|
||
80057e8: 203d movs r0, #61 ; 0x3d
|
||
80057ea: f7ff fcfd bl 80051e8 <LCD_WriteReg>
|
||
//ram
|
||
LCD_WriteReg(0x0050,0x0000);
|
||
80057ee: 2100 movs r1, #0
|
||
80057f0: 2050 movs r0, #80 ; 0x50
|
||
80057f2: f7ff fcf9 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0051,0x00EF);
|
||
80057f6: 21ef movs r1, #239 ; 0xef
|
||
80057f8: 2051 movs r0, #81 ; 0x51
|
||
80057fa: f7ff fcf5 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0052,0x0000);
|
||
80057fe: 2100 movs r1, #0
|
||
8005800: 2052 movs r0, #82 ; 0x52
|
||
8005802: f7ff fcf1 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0053,0x013F);
|
||
8005806: f240 113f movw r1, #319 ; 0x13f
|
||
800580a: 2053 movs r0, #83 ; 0x53
|
||
800580c: f7ff fcec bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0060,0xA700);
|
||
8005810: f44f 4127 mov.w r1, #42752 ; 0xa700
|
||
8005814: 2060 movs r0, #96 ; 0x60
|
||
8005816: f7ff fce7 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0061,0x0001);
|
||
800581a: 2101 movs r1, #1
|
||
800581c: 2061 movs r0, #97 ; 0x61
|
||
800581e: f7ff fce3 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x006A,0x0000);
|
||
8005822: 2100 movs r1, #0
|
||
8005824: 206a movs r0, #106 ; 0x6a
|
||
8005826: f7ff fcdf bl 80051e8 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0080,0x0000);
|
||
800582a: 2100 movs r1, #0
|
||
800582c: 2080 movs r0, #128 ; 0x80
|
||
800582e: f7ff fcdb bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0081,0x0000);
|
||
8005832: 2100 movs r1, #0
|
||
8005834: 2081 movs r0, #129 ; 0x81
|
||
8005836: f7ff fcd7 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0082,0x0000);
|
||
800583a: 2100 movs r1, #0
|
||
800583c: 2082 movs r0, #130 ; 0x82
|
||
800583e: f7ff fcd3 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0083,0x0000);
|
||
8005842: 2100 movs r1, #0
|
||
8005844: 2083 movs r0, #131 ; 0x83
|
||
8005846: f7ff fccf bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0084,0x0000);
|
||
800584a: 2100 movs r1, #0
|
||
800584c: 2084 movs r0, #132 ; 0x84
|
||
800584e: f7ff fccb bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0085,0x0000);
|
||
8005852: 2100 movs r1, #0
|
||
8005854: 2085 movs r0, #133 ; 0x85
|
||
8005856: f7ff fcc7 bl 80051e8 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0090,0x0010);
|
||
800585a: 2110 movs r1, #16
|
||
800585c: 2090 movs r0, #144 ; 0x90
|
||
800585e: f7ff fcc3 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0092,0x0600);
|
||
8005862: f44f 61c0 mov.w r1, #1536 ; 0x600
|
||
8005866: 2092 movs r0, #146 ; 0x92
|
||
8005868: f7ff fcbe bl 80051e8 <LCD_WriteReg>
|
||
|
||
LCD_WriteReg(0x0007,0x0133);
|
||
800586c: f240 1133 movw r1, #307 ; 0x133
|
||
8005870: 2007 movs r0, #7
|
||
8005872: f7ff fcb9 bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x00,0x0022);//
|
||
8005876: 2122 movs r1, #34 ; 0x22
|
||
8005878: 2000 movs r0, #0
|
||
800587a: f7ff fcb5 bl 80051e8 <LCD_WriteReg>
|
||
|
||
|
||
LCD_Display_Dir(1); //Ĭ��Ϊh��
|
||
800587e: 2001 movs r0, #1
|
||
8005880: f7ff fe4a bl 8005518 <LCD_Display_Dir>
|
||
|
||
|
||
}
|
||
8005884: bf00 nop
|
||
8005886: bd80 pop {r7, pc}
|
||
8005888: 40010c00 .word 0x40010c00
|
||
800588c: 200007b0 .word 0x200007b0
|
||
|
||
08005890 <LCD_SetCursor>:
|
||
//***********************************************************���� ���� ʲô��
|
||
//���ù���λ��
|
||
//Xpos:������
|
||
//Ypos:������
|
||
void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos)
|
||
{
|
||
8005890: b580 push {r7, lr}
|
||
8005892: b082 sub sp, #8
|
||
8005894: af00 add r7, sp, #0
|
||
8005896: 4603 mov r3, r0
|
||
8005898: 460a mov r2, r1
|
||
800589a: 80fb strh r3, [r7, #6]
|
||
800589c: 4613 mov r3, r2
|
||
800589e: 80bb strh r3, [r7, #4]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
80058a0: 4b42 ldr r3, [pc, #264] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
80058a2: 889b ldrh r3, [r3, #4]
|
||
80058a4: f249 3241 movw r2, #37697 ; 0x9341
|
||
80058a8: 4293 cmp r3, r2
|
||
80058aa: d005 beq.n 80058b8 <LCD_SetCursor+0x28>
|
||
80058ac: 4b3f ldr r3, [pc, #252] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
80058ae: 889b ldrh r3, [r3, #4]
|
||
80058b0: f245 3210 movw r2, #21264 ; 0x5310
|
||
80058b4: 4293 cmp r3, r2
|
||
80058b6: d124 bne.n 8005902 <LCD_SetCursor+0x72>
|
||
{
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
80058b8: 4b3c ldr r3, [pc, #240] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
80058ba: 7a1b ldrb r3, [r3, #8]
|
||
80058bc: b29b uxth r3, r3
|
||
80058be: 4618 mov r0, r3
|
||
80058c0: f7ff fc74 bl 80051ac <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
80058c4: 88fb ldrh r3, [r7, #6]
|
||
80058c6: 0a1b lsrs r3, r3, #8
|
||
80058c8: b29b uxth r3, r3
|
||
80058ca: 4618 mov r0, r3
|
||
80058cc: f7ff fc7c bl 80051c8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
80058d0: 88fb ldrh r3, [r7, #6]
|
||
80058d2: b2db uxtb r3, r3
|
||
80058d4: b29b uxth r3, r3
|
||
80058d6: 4618 mov r0, r3
|
||
80058d8: f7ff fc76 bl 80051c8 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
80058dc: 4b33 ldr r3, [pc, #204] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
80058de: 7a5b ldrb r3, [r3, #9]
|
||
80058e0: b29b uxth r3, r3
|
||
80058e2: 4618 mov r0, r3
|
||
80058e4: f7ff fc62 bl 80051ac <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
80058e8: 88bb ldrh r3, [r7, #4]
|
||
80058ea: 0a1b lsrs r3, r3, #8
|
||
80058ec: b29b uxth r3, r3
|
||
80058ee: 4618 mov r0, r3
|
||
80058f0: f7ff fc6a bl 80051c8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
80058f4: 88bb ldrh r3, [r7, #4]
|
||
80058f6: b2db uxtb r3, r3
|
||
80058f8: b29b uxth r3, r3
|
||
80058fa: 4618 mov r0, r3
|
||
80058fc: f7ff fc64 bl 80051c8 <LCD_WR_DATA>
|
||
{
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
}
|
||
}
|
||
8005900: e050 b.n 80059a4 <LCD_SetCursor+0x114>
|
||
}else if(lcddev.id==0X6804)
|
||
8005902: 4b2a ldr r3, [pc, #168] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
8005904: 889b ldrh r3, [r3, #4]
|
||
8005906: f646 0204 movw r2, #26628 ; 0x6804
|
||
800590a: 4293 cmp r3, r2
|
||
800590c: d12f bne.n 800596e <LCD_SetCursor+0xde>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//����ʱ����
|
||
800590e: 4b27 ldr r3, [pc, #156] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
8005910: 799b ldrb r3, [r3, #6]
|
||
8005912: 2b01 cmp r3, #1
|
||
8005914: d106 bne.n 8005924 <LCD_SetCursor+0x94>
|
||
8005916: 4b25 ldr r3, [pc, #148] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
8005918: 881a ldrh r2, [r3, #0]
|
||
800591a: 88fb ldrh r3, [r7, #6]
|
||
800591c: 1ad3 subs r3, r2, r3
|
||
800591e: b29b uxth r3, r3
|
||
8005920: 3b01 subs r3, #1
|
||
8005922: 80fb strh r3, [r7, #6]
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8005924: 4b21 ldr r3, [pc, #132] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
8005926: 7a1b ldrb r3, [r3, #8]
|
||
8005928: b29b uxth r3, r3
|
||
800592a: 4618 mov r0, r3
|
||
800592c: f7ff fc3e bl 80051ac <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
8005930: 88fb ldrh r3, [r7, #6]
|
||
8005932: 0a1b lsrs r3, r3, #8
|
||
8005934: b29b uxth r3, r3
|
||
8005936: 4618 mov r0, r3
|
||
8005938: f7ff fc46 bl 80051c8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
800593c: 88fb ldrh r3, [r7, #6]
|
||
800593e: b2db uxtb r3, r3
|
||
8005940: b29b uxth r3, r3
|
||
8005942: 4618 mov r0, r3
|
||
8005944: f7ff fc40 bl 80051c8 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8005948: 4b18 ldr r3, [pc, #96] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
800594a: 7a5b ldrb r3, [r3, #9]
|
||
800594c: b29b uxth r3, r3
|
||
800594e: 4618 mov r0, r3
|
||
8005950: f7ff fc2c bl 80051ac <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
8005954: 88bb ldrh r3, [r7, #4]
|
||
8005956: 0a1b lsrs r3, r3, #8
|
||
8005958: b29b uxth r3, r3
|
||
800595a: 4618 mov r0, r3
|
||
800595c: f7ff fc34 bl 80051c8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
8005960: 88bb ldrh r3, [r7, #4]
|
||
8005962: b2db uxtb r3, r3
|
||
8005964: b29b uxth r3, r3
|
||
8005966: 4618 mov r0, r3
|
||
8005968: f7ff fc2e bl 80051c8 <LCD_WR_DATA>
|
||
}
|
||
800596c: e01a b.n 80059a4 <LCD_SetCursor+0x114>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
800596e: 4b0f ldr r3, [pc, #60] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
8005970: 799b ldrb r3, [r3, #6]
|
||
8005972: 2b01 cmp r3, #1
|
||
8005974: d106 bne.n 8005984 <LCD_SetCursor+0xf4>
|
||
8005976: 4b0d ldr r3, [pc, #52] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
8005978: 881a ldrh r2, [r3, #0]
|
||
800597a: 88fb ldrh r3, [r7, #6]
|
||
800597c: 1ad3 subs r3, r2, r3
|
||
800597e: b29b uxth r3, r3
|
||
8005980: 3b01 subs r3, #1
|
||
8005982: 80fb strh r3, [r7, #6]
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
8005984: 4b09 ldr r3, [pc, #36] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
8005986: 7a1b ldrb r3, [r3, #8]
|
||
8005988: b29b uxth r3, r3
|
||
800598a: 88fa ldrh r2, [r7, #6]
|
||
800598c: 4611 mov r1, r2
|
||
800598e: 4618 mov r0, r3
|
||
8005990: f7ff fc2a bl 80051e8 <LCD_WriteReg>
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
8005994: 4b05 ldr r3, [pc, #20] ; (80059ac <LCD_SetCursor+0x11c>)
|
||
8005996: 7a5b ldrb r3, [r3, #9]
|
||
8005998: b29b uxth r3, r3
|
||
800599a: 88ba ldrh r2, [r7, #4]
|
||
800599c: 4611 mov r1, r2
|
||
800599e: 4618 mov r0, r3
|
||
80059a0: f7ff fc22 bl 80051e8 <LCD_WriteReg>
|
||
}
|
||
80059a4: bf00 nop
|
||
80059a6: 3708 adds r7, #8
|
||
80059a8: 46bd mov sp, r7
|
||
80059aa: bd80 pop {r7, pc}
|
||
80059ac: 200007b0 .word 0x200007b0
|
||
|
||
080059b0 <LCD_set_dot>:
|
||
}
|
||
//����
|
||
//x,y:����
|
||
//POINT_COLOR:�˵�����ɫ
|
||
void LCD_set_dot(uint16_t x,uint16_t y,uint16_t color)
|
||
{
|
||
80059b0: b580 push {r7, lr}
|
||
80059b2: b082 sub sp, #8
|
||
80059b4: af00 add r7, sp, #0
|
||
80059b6: 4603 mov r3, r0
|
||
80059b8: 80fb strh r3, [r7, #6]
|
||
80059ba: 460b mov r3, r1
|
||
80059bc: 80bb strh r3, [r7, #4]
|
||
80059be: 4613 mov r3, r2
|
||
80059c0: 807b strh r3, [r7, #2]
|
||
LCD_SetCursor(x,y); //���ù���λ��
|
||
80059c2: 88ba ldrh r2, [r7, #4]
|
||
80059c4: 88fb ldrh r3, [r7, #6]
|
||
80059c6: 4611 mov r1, r2
|
||
80059c8: 4618 mov r0, r3
|
||
80059ca: f7ff ff61 bl 8005890 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
80059ce: 4b06 ldr r3, [pc, #24] ; (80059e8 <LCD_set_dot+0x38>)
|
||
80059d0: 79da ldrb r2, [r3, #7]
|
||
80059d2: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
80059d6: b292 uxth r2, r2
|
||
80059d8: 801a strh r2, [r3, #0]
|
||
LCD_DATA_ADDRESS=color;
|
||
80059da: 4a04 ldr r2, [pc, #16] ; (80059ec <LCD_set_dot+0x3c>)
|
||
80059dc: 887b ldrh r3, [r7, #2]
|
||
80059de: 8013 strh r3, [r2, #0]
|
||
}
|
||
80059e0: bf00 nop
|
||
80059e2: 3708 adds r7, #8
|
||
80059e4: 46bd mov sp, r7
|
||
80059e6: bd80 pop {r7, pc}
|
||
80059e8: 200007b0 .word 0x200007b0
|
||
80059ec: 6c000800 .word 0x6c000800
|
||
|
||
080059f0 <LCD_Clear>:
|
||
|
||
//��������
|
||
//color:Ҫ����������ɫ
|
||
void LCD_Clear(uint16_t color)
|
||
{
|
||
80059f0: b580 push {r7, lr}
|
||
80059f2: b084 sub sp, #16
|
||
80059f4: af00 add r7, sp, #0
|
||
80059f6: 4603 mov r3, r0
|
||
80059f8: 80fb strh r3, [r7, #6]
|
||
uint32_t index=0;
|
||
80059fa: 2300 movs r3, #0
|
||
80059fc: 60fb str r3, [r7, #12]
|
||
uint32_t totalpoint=lcddev.width;
|
||
80059fe: 4b23 ldr r3, [pc, #140] ; (8005a8c <LCD_Clear+0x9c>)
|
||
8005a00: 881b ldrh r3, [r3, #0]
|
||
8005a02: 60bb str r3, [r7, #8]
|
||
totalpoint*=lcddev.height; //�õ��ܵ���
|
||
8005a04: 4b21 ldr r3, [pc, #132] ; (8005a8c <LCD_Clear+0x9c>)
|
||
8005a06: 885b ldrh r3, [r3, #2]
|
||
8005a08: 461a mov r2, r3
|
||
8005a0a: 68bb ldr r3, [r7, #8]
|
||
8005a0c: fb02 f303 mul.w r3, r2, r3
|
||
8005a10: 60bb str r3, [r7, #8]
|
||
if((lcddev.id==0X6804)&&(lcddev.dir==1))//6804������ʱ�������
|
||
8005a12: 4b1e ldr r3, [pc, #120] ; (8005a8c <LCD_Clear+0x9c>)
|
||
8005a14: 889b ldrh r3, [r3, #4]
|
||
8005a16: f646 0204 movw r2, #26628 ; 0x6804
|
||
8005a1a: 4293 cmp r3, r2
|
||
8005a1c: d11a bne.n 8005a54 <LCD_Clear+0x64>
|
||
8005a1e: 4b1b ldr r3, [pc, #108] ; (8005a8c <LCD_Clear+0x9c>)
|
||
8005a20: 799b ldrb r3, [r3, #6]
|
||
8005a22: 2b01 cmp r3, #1
|
||
8005a24: d116 bne.n 8005a54 <LCD_Clear+0x64>
|
||
{
|
||
lcddev.dir=0;
|
||
8005a26: 4b19 ldr r3, [pc, #100] ; (8005a8c <LCD_Clear+0x9c>)
|
||
8005a28: 2200 movs r2, #0
|
||
8005a2a: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2A;
|
||
8005a2c: 4b17 ldr r3, [pc, #92] ; (8005a8c <LCD_Clear+0x9c>)
|
||
8005a2e: 222a movs r2, #42 ; 0x2a
|
||
8005a30: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8005a32: 4b16 ldr r3, [pc, #88] ; (8005a8c <LCD_Clear+0x9c>)
|
||
8005a34: 222b movs r2, #43 ; 0x2b
|
||
8005a36: 725a strb r2, [r3, #9]
|
||
LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
8005a38: 2100 movs r1, #0
|
||
8005a3a: 2000 movs r0, #0
|
||
8005a3c: f7ff ff28 bl 8005890 <LCD_SetCursor>
|
||
lcddev.dir=1;
|
||
8005a40: 4b12 ldr r3, [pc, #72] ; (8005a8c <LCD_Clear+0x9c>)
|
||
8005a42: 2201 movs r2, #1
|
||
8005a44: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2B;
|
||
8005a46: 4b11 ldr r3, [pc, #68] ; (8005a8c <LCD_Clear+0x9c>)
|
||
8005a48: 222b movs r2, #43 ; 0x2b
|
||
8005a4a: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
8005a4c: 4b0f ldr r3, [pc, #60] ; (8005a8c <LCD_Clear+0x9c>)
|
||
8005a4e: 222a movs r2, #42 ; 0x2a
|
||
8005a50: 725a strb r2, [r3, #9]
|
||
8005a52: e003 b.n 8005a5c <LCD_Clear+0x6c>
|
||
}else LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
8005a54: 2100 movs r1, #0
|
||
8005a56: 2000 movs r0, #0
|
||
8005a58: f7ff ff1a bl 8005890 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
8005a5c: 4b0b ldr r3, [pc, #44] ; (8005a8c <LCD_Clear+0x9c>)
|
||
8005a5e: 79da ldrb r2, [r3, #7]
|
||
8005a60: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
8005a64: b292 uxth r2, r2
|
||
8005a66: 801a strh r2, [r3, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
8005a68: 2300 movs r3, #0
|
||
8005a6a: 60fb str r3, [r7, #12]
|
||
8005a6c: e005 b.n 8005a7a <LCD_Clear+0x8a>
|
||
{
|
||
LCD_DATA_ADDRESS=color;
|
||
8005a6e: 4a08 ldr r2, [pc, #32] ; (8005a90 <LCD_Clear+0xa0>)
|
||
8005a70: 88fb ldrh r3, [r7, #6]
|
||
8005a72: 8013 strh r3, [r2, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
8005a74: 68fb ldr r3, [r7, #12]
|
||
8005a76: 3301 adds r3, #1
|
||
8005a78: 60fb str r3, [r7, #12]
|
||
8005a7a: 68fa ldr r2, [r7, #12]
|
||
8005a7c: 68bb ldr r3, [r7, #8]
|
||
8005a7e: 429a cmp r2, r3
|
||
8005a80: d3f5 bcc.n 8005a6e <LCD_Clear+0x7e>
|
||
}
|
||
}
|
||
8005a82: bf00 nop
|
||
8005a84: bf00 nop
|
||
8005a86: 3710 adds r7, #16
|
||
8005a88: 46bd mov sp, r7
|
||
8005a8a: bd80 pop {r7, pc}
|
||
8005a8c: 200007b0 .word 0x200007b0
|
||
8005a90: 6c000800 .word 0x6c000800
|
||
|
||
08005a94 <font_init>:
|
||
|
||
//��ʼ������
|
||
//����ֵ:0,�ֿ�����.
|
||
// ����,�ֿⶪʧ
|
||
uint8_t font_init(void)
|
||
{
|
||
8005a94: b580 push {r7, lr}
|
||
8005a96: b082 sub sp, #8
|
||
8005a98: af00 add r7, sp, #0
|
||
uint8_t t=0;
|
||
8005a9a: 2300 movs r3, #0
|
||
8005a9c: 71fb strb r3, [r7, #7]
|
||
while(t<10)//������ȡ10��,���Ǵ���,˵��ȷʵ��������,�ø����ֿ���
|
||
8005a9e: e014 b.n 8005aca <font_init+0x36>
|
||
{
|
||
t++;
|
||
8005aa0: 79fb ldrb r3, [r7, #7]
|
||
8005aa2: 3301 adds r3, #1
|
||
8005aa4: 71fb strb r3, [r7, #7]
|
||
W25QXX_Read((uint8_t*)&ftinfo,FONTINFOADDR,sizeof(ftinfo));//����ftinfo�ṹ������
|
||
8005aa6: 2224 movs r2, #36 ; 0x24
|
||
8005aa8: f44f 0180 mov.w r1, #4194304 ; 0x400000
|
||
8005aac: 480d ldr r0, [pc, #52] ; (8005ae4 <font_init+0x50>)
|
||
8005aae: f7fe fe71 bl 8004794 <W25QXX_Read>
|
||
if(ftinfo.fontok==0XAA)
|
||
8005ab2: 4b0c ldr r3, [pc, #48] ; (8005ae4 <font_init+0x50>)
|
||
8005ab4: 781b ldrb r3, [r3, #0]
|
||
8005ab6: 2baa cmp r3, #170 ; 0xaa
|
||
8005ab8: d107 bne.n 8005aca <font_init+0x36>
|
||
{
|
||
ftinfo.f12addr=0x0042a929;
|
||
8005aba: 4b0a ldr r3, [pc, #40] ; (8005ae4 <font_init+0x50>)
|
||
8005abc: 4a0a ldr r2, [pc, #40] ; (8005ae8 <font_init+0x54>)
|
||
8005abe: 60da str r2, [r3, #12]
|
||
ftinfo.f16addr=0x004b6d89;
|
||
8005ac0: 4b08 ldr r3, [pc, #32] ; (8005ae4 <font_init+0x50>)
|
||
8005ac2: 4a0a ldr r2, [pc, #40] ; (8005aec <font_init+0x58>)
|
||
8005ac4: 615a str r2, [r3, #20]
|
||
return 0;
|
||
8005ac6: 2300 movs r3, #0
|
||
8005ac8: e008 b.n 8005adc <font_init+0x48>
|
||
while(t<10)//������ȡ10��,���Ǵ���,˵��ȷʵ��������,�ø����ֿ���
|
||
8005aca: 79fb ldrb r3, [r7, #7]
|
||
8005acc: 2b09 cmp r3, #9
|
||
8005ace: d9e7 bls.n 8005aa0 <font_init+0xc>
|
||
}
|
||
|
||
}
|
||
if(ftinfo.fontok!=0XAA)return 1;
|
||
8005ad0: 4b04 ldr r3, [pc, #16] ; (8005ae4 <font_init+0x50>)
|
||
8005ad2: 781b ldrb r3, [r3, #0]
|
||
8005ad4: 2baa cmp r3, #170 ; 0xaa
|
||
8005ad6: d001 beq.n 8005adc <font_init+0x48>
|
||
8005ad8: 2301 movs r3, #1
|
||
8005ada: e7ff b.n 8005adc <font_init+0x48>
|
||
|
||
}
|
||
8005adc: 4618 mov r0, r3
|
||
8005ade: 3708 adds r7, #8
|
||
8005ae0: 46bd mov sp, r7
|
||
8005ae2: bd80 pop {r7, pc}
|
||
8005ae4: 200007bc .word 0x200007bc
|
||
8005ae8: 0042a929 .word 0x0042a929
|
||
8005aec: 004b6d89 .word 0x004b6d89
|
||
|
||
08005af0 <Get_HzMat>:
|
||
//���ֿ��в��ҳ���ģ
|
||
//code �ַ����Ŀ�ʼ��ַ,GBK��
|
||
//mat ���ݴ��ŵ�ַ (size/8+((size%8)?1:0))*(size) bytes��С
|
||
//size:������С
|
||
void Get_HzMat(unsigned char *code,unsigned char *mat,uint8_t size)
|
||
{
|
||
8005af0: b580 push {r7, lr}
|
||
8005af2: b086 sub sp, #24
|
||
8005af4: af00 add r7, sp, #0
|
||
8005af6: 60f8 str r0, [r7, #12]
|
||
8005af8: 60b9 str r1, [r7, #8]
|
||
8005afa: 4613 mov r3, r2
|
||
8005afc: 71fb strb r3, [r7, #7]
|
||
unsigned char qh,ql;
|
||
unsigned char i;
|
||
unsigned long foffset;
|
||
uint8_t csize=(size/8+((size%8)?1:0))*(size);//�õ�����һ���ַ���Ӧ��������ռ���ֽ���
|
||
8005afe: 79fb ldrb r3, [r7, #7]
|
||
8005b00: 08db lsrs r3, r3, #3
|
||
8005b02: b2db uxtb r3, r3
|
||
8005b04: 461a mov r2, r3
|
||
8005b06: 79fb ldrb r3, [r7, #7]
|
||
8005b08: f003 0307 and.w r3, r3, #7
|
||
8005b0c: b2db uxtb r3, r3
|
||
8005b0e: 2b00 cmp r3, #0
|
||
8005b10: bf14 ite ne
|
||
8005b12: 2301 movne r3, #1
|
||
8005b14: 2300 moveq r3, #0
|
||
8005b16: b2db uxtb r3, r3
|
||
8005b18: 4413 add r3, r2
|
||
8005b1a: b2db uxtb r3, r3
|
||
8005b1c: 79fa ldrb r2, [r7, #7]
|
||
8005b1e: fb02 f303 mul.w r3, r2, r3
|
||
8005b22: 757b strb r3, [r7, #21]
|
||
qh=*code;
|
||
8005b24: 68fb ldr r3, [r7, #12]
|
||
8005b26: 781b ldrb r3, [r3, #0]
|
||
8005b28: 753b strb r3, [r7, #20]
|
||
ql=*(++code);
|
||
8005b2a: 68fb ldr r3, [r7, #12]
|
||
8005b2c: 3301 adds r3, #1
|
||
8005b2e: 60fb str r3, [r7, #12]
|
||
8005b30: 68fb ldr r3, [r7, #12]
|
||
8005b32: 781b ldrb r3, [r3, #0]
|
||
8005b34: 75fb strb r3, [r7, #23]
|
||
if(qh<0x81||ql<0x40||ql==0xff||qh==0xff)//�� ���ú���
|
||
8005b36: 7d3b ldrb r3, [r7, #20]
|
||
8005b38: 2b80 cmp r3, #128 ; 0x80
|
||
8005b3a: d908 bls.n 8005b4e <Get_HzMat+0x5e>
|
||
8005b3c: 7dfb ldrb r3, [r7, #23]
|
||
8005b3e: 2b3f cmp r3, #63 ; 0x3f
|
||
8005b40: d905 bls.n 8005b4e <Get_HzMat+0x5e>
|
||
8005b42: 7dfb ldrb r3, [r7, #23]
|
||
8005b44: 2bff cmp r3, #255 ; 0xff
|
||
8005b46: d002 beq.n 8005b4e <Get_HzMat+0x5e>
|
||
8005b48: 7d3b ldrb r3, [r7, #20]
|
||
8005b4a: 2bff cmp r3, #255 ; 0xff
|
||
8005b4c: d10f bne.n 8005b6e <Get_HzMat+0x7e>
|
||
{
|
||
for(i=0;i<csize;i++)*mat++=0x00;//��������
|
||
8005b4e: 2300 movs r3, #0
|
||
8005b50: 75bb strb r3, [r7, #22]
|
||
8005b52: e007 b.n 8005b64 <Get_HzMat+0x74>
|
||
8005b54: 68bb ldr r3, [r7, #8]
|
||
8005b56: 1c5a adds r2, r3, #1
|
||
8005b58: 60ba str r2, [r7, #8]
|
||
8005b5a: 2200 movs r2, #0
|
||
8005b5c: 701a strb r2, [r3, #0]
|
||
8005b5e: 7dbb ldrb r3, [r7, #22]
|
||
8005b60: 3301 adds r3, #1
|
||
8005b62: 75bb strb r3, [r7, #22]
|
||
8005b64: 7dba ldrb r2, [r7, #22]
|
||
8005b66: 7d7b ldrb r3, [r7, #21]
|
||
8005b68: 429a cmp r2, r3
|
||
8005b6a: d3f3 bcc.n 8005b54 <Get_HzMat+0x64>
|
||
return; //��������
|
||
8005b6c: e041 b.n 8005bf2 <Get_HzMat+0x102>
|
||
}
|
||
if(ql<0x7f)ql-=0x40;//ע��!
|
||
8005b6e: 7dfb ldrb r3, [r7, #23]
|
||
8005b70: 2b7e cmp r3, #126 ; 0x7e
|
||
8005b72: d803 bhi.n 8005b7c <Get_HzMat+0x8c>
|
||
8005b74: 7dfb ldrb r3, [r7, #23]
|
||
8005b76: 3b40 subs r3, #64 ; 0x40
|
||
8005b78: 75fb strb r3, [r7, #23]
|
||
8005b7a: e002 b.n 8005b82 <Get_HzMat+0x92>
|
||
else ql-=0x41;
|
||
8005b7c: 7dfb ldrb r3, [r7, #23]
|
||
8005b7e: 3b41 subs r3, #65 ; 0x41
|
||
8005b80: 75fb strb r3, [r7, #23]
|
||
qh-=0x81;
|
||
8005b82: 7d3b ldrb r3, [r7, #20]
|
||
8005b84: 337f adds r3, #127 ; 0x7f
|
||
8005b86: 753b strb r3, [r7, #20]
|
||
foffset=((unsigned long)190*qh+ql)*csize; //�õ��ֿ��е��ֽ�ƫ����
|
||
8005b88: 7d3b ldrb r3, [r7, #20]
|
||
8005b8a: 22be movs r2, #190 ; 0xbe
|
||
8005b8c: fb02 f203 mul.w r2, r2, r3
|
||
8005b90: 7dfb ldrb r3, [r7, #23]
|
||
8005b92: 4413 add r3, r2
|
||
8005b94: 7d7a ldrb r2, [r7, #21]
|
||
8005b96: fb02 f303 mul.w r3, r2, r3
|
||
8005b9a: 613b str r3, [r7, #16]
|
||
switch(size)
|
||
8005b9c: 79fb ldrb r3, [r7, #7]
|
||
8005b9e: 2b18 cmp r3, #24
|
||
8005ba0: d01c beq.n 8005bdc <Get_HzMat+0xec>
|
||
8005ba2: 2b18 cmp r3, #24
|
||
8005ba4: dc25 bgt.n 8005bf2 <Get_HzMat+0x102>
|
||
8005ba6: 2b0c cmp r3, #12
|
||
8005ba8: d002 beq.n 8005bb0 <Get_HzMat+0xc0>
|
||
8005baa: 2b10 cmp r3, #16
|
||
8005bac: d00b beq.n 8005bc6 <Get_HzMat+0xd6>
|
||
8005bae: e020 b.n 8005bf2 <Get_HzMat+0x102>
|
||
{
|
||
case 12:
|
||
W25QXX_Read(mat,foffset+ftinfo.f12addr,csize);
|
||
8005bb0: 4b11 ldr r3, [pc, #68] ; (8005bf8 <Get_HzMat+0x108>)
|
||
8005bb2: 68da ldr r2, [r3, #12]
|
||
8005bb4: 693b ldr r3, [r7, #16]
|
||
8005bb6: 4413 add r3, r2
|
||
8005bb8: 7d7a ldrb r2, [r7, #21]
|
||
8005bba: b292 uxth r2, r2
|
||
8005bbc: 4619 mov r1, r3
|
||
8005bbe: 68b8 ldr r0, [r7, #8]
|
||
8005bc0: f7fe fde8 bl 8004794 <W25QXX_Read>
|
||
break;
|
||
8005bc4: e015 b.n 8005bf2 <Get_HzMat+0x102>
|
||
case 16:
|
||
W25QXX_Read(mat,foffset+ftinfo.f16addr,csize);
|
||
8005bc6: 4b0c ldr r3, [pc, #48] ; (8005bf8 <Get_HzMat+0x108>)
|
||
8005bc8: 695a ldr r2, [r3, #20]
|
||
8005bca: 693b ldr r3, [r7, #16]
|
||
8005bcc: 4413 add r3, r2
|
||
8005bce: 7d7a ldrb r2, [r7, #21]
|
||
8005bd0: b292 uxth r2, r2
|
||
8005bd2: 4619 mov r1, r3
|
||
8005bd4: 68b8 ldr r0, [r7, #8]
|
||
8005bd6: f7fe fddd bl 8004794 <W25QXX_Read>
|
||
break;
|
||
8005bda: e00a b.n 8005bf2 <Get_HzMat+0x102>
|
||
case 24:
|
||
W25QXX_Read(mat,foffset+ftinfo.f24addr,csize);
|
||
8005bdc: 4b06 ldr r3, [pc, #24] ; (8005bf8 <Get_HzMat+0x108>)
|
||
8005bde: 69da ldr r2, [r3, #28]
|
||
8005be0: 693b ldr r3, [r7, #16]
|
||
8005be2: 4413 add r3, r2
|
||
8005be4: 7d7a ldrb r2, [r7, #21]
|
||
8005be6: b292 uxth r2, r2
|
||
8005be8: 4619 mov r1, r3
|
||
8005bea: 68b8 ldr r0, [r7, #8]
|
||
8005bec: f7fe fdd2 bl 8004794 <W25QXX_Read>
|
||
break;
|
||
8005bf0: bf00 nop
|
||
|
||
}
|
||
}
|
||
8005bf2: 3718 adds r7, #24
|
||
8005bf4: 46bd mov sp, r7
|
||
8005bf6: bd80 pop {r7, pc}
|
||
8005bf8: 200007bc .word 0x200007bc
|
||
|
||
08005bfc <Show_Font>:
|
||
//x,y :���ֵ�����
|
||
//font:����GBK��
|
||
//size:������С
|
||
//mode:0,������ʾ,1,������ʾ
|
||
void Show_Font(uint16_t x,uint16_t y,uint8_t *font,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
8005bfc: b580 push {r7, lr}
|
||
8005bfe: b098 sub sp, #96 ; 0x60
|
||
8005c00: af00 add r7, sp, #0
|
||
8005c02: 60ba str r2, [r7, #8]
|
||
8005c04: 461a mov r2, r3
|
||
8005c06: 4603 mov r3, r0
|
||
8005c08: 81fb strh r3, [r7, #14]
|
||
8005c0a: 460b mov r3, r1
|
||
8005c0c: 81bb strh r3, [r7, #12]
|
||
8005c0e: 4613 mov r3, r2
|
||
8005c10: 71fb strb r3, [r7, #7]
|
||
uint8_t temp,t,t1;
|
||
uint16_t y0=y;
|
||
8005c12: 89bb ldrh r3, [r7, #12]
|
||
8005c14: f8a7 305a strh.w r3, [r7, #90] ; 0x5a
|
||
uint8_t dzk[72];
|
||
uint8_t csize=(size/8+((size%8)?1:0))*(size);//�õ�����һ���ַ���Ӧ��������ռ���ֽ���
|
||
8005c18: 79fb ldrb r3, [r7, #7]
|
||
8005c1a: 08db lsrs r3, r3, #3
|
||
8005c1c: b2db uxtb r3, r3
|
||
8005c1e: 461a mov r2, r3
|
||
8005c20: 79fb ldrb r3, [r7, #7]
|
||
8005c22: f003 0307 and.w r3, r3, #7
|
||
8005c26: b2db uxtb r3, r3
|
||
8005c28: 2b00 cmp r3, #0
|
||
8005c2a: bf14 ite ne
|
||
8005c2c: 2301 movne r3, #1
|
||
8005c2e: 2300 moveq r3, #0
|
||
8005c30: b2db uxtb r3, r3
|
||
8005c32: 4413 add r3, r2
|
||
8005c34: b2db uxtb r3, r3
|
||
8005c36: 79fa ldrb r2, [r7, #7]
|
||
8005c38: fb02 f303 mul.w r3, r2, r3
|
||
8005c3c: f887 3059 strb.w r3, [r7, #89] ; 0x59
|
||
if(size!=12&&size!=16)return; //��֧�ֵ�size
|
||
8005c40: 79fb ldrb r3, [r7, #7]
|
||
8005c42: 2b0c cmp r3, #12
|
||
8005c44: d002 beq.n 8005c4c <Show_Font+0x50>
|
||
8005c46: 79fb ldrb r3, [r7, #7]
|
||
8005c48: 2b10 cmp r3, #16
|
||
8005c4a: d15b bne.n 8005d04 <Show_Font+0x108>
|
||
Get_HzMat(font,dzk,size); //�õ���Ӧ��С�ĵ�������
|
||
8005c4c: 79fa ldrb r2, [r7, #7]
|
||
8005c4e: f107 0310 add.w r3, r7, #16
|
||
8005c52: 4619 mov r1, r3
|
||
8005c54: 68b8 ldr r0, [r7, #8]
|
||
8005c56: f7ff ff4b bl 8005af0 <Get_HzMat>
|
||
for(t=0;t<csize;t++)
|
||
8005c5a: 2300 movs r3, #0
|
||
8005c5c: f887 305e strb.w r3, [r7, #94] ; 0x5e
|
||
8005c60: e049 b.n 8005cf6 <Show_Font+0xfa>
|
||
{
|
||
temp=dzk[t]; //�õ���������
|
||
8005c62: f897 305e ldrb.w r3, [r7, #94] ; 0x5e
|
||
8005c66: f107 0260 add.w r2, r7, #96 ; 0x60
|
||
8005c6a: 4413 add r3, r2
|
||
8005c6c: f813 3c50 ldrb.w r3, [r3, #-80]
|
||
8005c70: f887 305f strb.w r3, [r7, #95] ; 0x5f
|
||
for(t1=0;t1<8;t1++)
|
||
8005c74: 2300 movs r3, #0
|
||
8005c76: f887 305d strb.w r3, [r7, #93] ; 0x5d
|
||
8005c7a: e033 b.n 8005ce4 <Show_Font+0xe8>
|
||
{
|
||
if(temp&0x80){LCD_set_dot(x,y,color);}else{if(bg!=color){LCD_set_dot(x,y,bg);}}
|
||
8005c7c: f997 305f ldrsb.w r3, [r7, #95] ; 0x5f
|
||
8005c80: 2b00 cmp r3, #0
|
||
8005c82: da07 bge.n 8005c94 <Show_Font+0x98>
|
||
8005c84: f8b7 206c ldrh.w r2, [r7, #108] ; 0x6c
|
||
8005c88: 89b9 ldrh r1, [r7, #12]
|
||
8005c8a: 89fb ldrh r3, [r7, #14]
|
||
8005c8c: 4618 mov r0, r3
|
||
8005c8e: f7ff fe8f bl 80059b0 <LCD_set_dot>
|
||
8005c92: e00c b.n 8005cae <Show_Font+0xb2>
|
||
8005c94: f8b7 2068 ldrh.w r2, [r7, #104] ; 0x68
|
||
8005c98: f8b7 306c ldrh.w r3, [r7, #108] ; 0x6c
|
||
8005c9c: 429a cmp r2, r3
|
||
8005c9e: d006 beq.n 8005cae <Show_Font+0xb2>
|
||
8005ca0: f8b7 2068 ldrh.w r2, [r7, #104] ; 0x68
|
||
8005ca4: 89b9 ldrh r1, [r7, #12]
|
||
8005ca6: 89fb ldrh r3, [r7, #14]
|
||
8005ca8: 4618 mov r0, r3
|
||
8005caa: f7ff fe81 bl 80059b0 <LCD_set_dot>
|
||
temp<<=1;
|
||
8005cae: f897 305f ldrb.w r3, [r7, #95] ; 0x5f
|
||
8005cb2: 005b lsls r3, r3, #1
|
||
8005cb4: f887 305f strb.w r3, [r7, #95] ; 0x5f
|
||
y++;
|
||
8005cb8: 89bb ldrh r3, [r7, #12]
|
||
8005cba: 3301 adds r3, #1
|
||
8005cbc: 81bb strh r3, [r7, #12]
|
||
if((y-y0)==size)
|
||
8005cbe: 89ba ldrh r2, [r7, #12]
|
||
8005cc0: f8b7 305a ldrh.w r3, [r7, #90] ; 0x5a
|
||
8005cc4: 1ad2 subs r2, r2, r3
|
||
8005cc6: 79fb ldrb r3, [r7, #7]
|
||
8005cc8: 429a cmp r2, r3
|
||
8005cca: d106 bne.n 8005cda <Show_Font+0xde>
|
||
{
|
||
y=y0;
|
||
8005ccc: f8b7 305a ldrh.w r3, [r7, #90] ; 0x5a
|
||
8005cd0: 81bb strh r3, [r7, #12]
|
||
x++;
|
||
8005cd2: 89fb ldrh r3, [r7, #14]
|
||
8005cd4: 3301 adds r3, #1
|
||
8005cd6: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8005cd8: e008 b.n 8005cec <Show_Font+0xf0>
|
||
for(t1=0;t1<8;t1++)
|
||
8005cda: f897 305d ldrb.w r3, [r7, #93] ; 0x5d
|
||
8005cde: 3301 adds r3, #1
|
||
8005ce0: f887 305d strb.w r3, [r7, #93] ; 0x5d
|
||
8005ce4: f897 305d ldrb.w r3, [r7, #93] ; 0x5d
|
||
8005ce8: 2b07 cmp r3, #7
|
||
8005cea: d9c7 bls.n 8005c7c <Show_Font+0x80>
|
||
for(t=0;t<csize;t++)
|
||
8005cec: f897 305e ldrb.w r3, [r7, #94] ; 0x5e
|
||
8005cf0: 3301 adds r3, #1
|
||
8005cf2: f887 305e strb.w r3, [r7, #94] ; 0x5e
|
||
8005cf6: f897 205e ldrb.w r2, [r7, #94] ; 0x5e
|
||
8005cfa: f897 3059 ldrb.w r3, [r7, #89] ; 0x59
|
||
8005cfe: 429a cmp r2, r3
|
||
8005d00: d3af bcc.n 8005c62 <Show_Font+0x66>
|
||
8005d02: e000 b.n 8005d06 <Show_Font+0x10a>
|
||
if(size!=12&&size!=16)return; //��֧�ֵ�size
|
||
8005d04: bf00 nop
|
||
}
|
||
}
|
||
}
|
||
}
|
||
8005d06: 3760 adds r7, #96 ; 0x60
|
||
8005d08: 46bd mov sp, r7
|
||
8005d0a: bd80 pop {r7, pc}
|
||
|
||
08005d0c <LCD_ShowChar>:
|
||
//num:Ҫ��ʾ���ַ�:" "--->"~"
|
||
//size:������С 12/16
|
||
//mode:���ӷ�ʽ(1)���Ƿǵ��ӷ�ʽ(0)
|
||
|
||
void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
8005d0c: b590 push {r4, r7, lr}
|
||
8005d0e: b085 sub sp, #20
|
||
8005d10: af00 add r7, sp, #0
|
||
8005d12: 4604 mov r4, r0
|
||
8005d14: 4608 mov r0, r1
|
||
8005d16: 4611 mov r1, r2
|
||
8005d18: 461a mov r2, r3
|
||
8005d1a: 4623 mov r3, r4
|
||
8005d1c: 80fb strh r3, [r7, #6]
|
||
8005d1e: 4603 mov r3, r0
|
||
8005d20: 80bb strh r3, [r7, #4]
|
||
8005d22: 460b mov r3, r1
|
||
8005d24: 70fb strb r3, [r7, #3]
|
||
8005d26: 4613 mov r3, r2
|
||
8005d28: 70bb strb r3, [r7, #2]
|
||
uint8_t temp,t1,t;
|
||
uint16_t y0=y;
|
||
8005d2a: 88bb ldrh r3, [r7, #4]
|
||
8005d2c: 817b strh r3, [r7, #10]
|
||
|
||
//����
|
||
num=num-' ';//�õ�ƫ�ƺ���ֵ
|
||
8005d2e: 78fb ldrb r3, [r7, #3]
|
||
8005d30: 3b20 subs r3, #32
|
||
8005d32: 70fb strb r3, [r7, #3]
|
||
|
||
for(t=0;t<size;t++)
|
||
8005d34: 2300 movs r3, #0
|
||
8005d36: 737b strb r3, [r7, #13]
|
||
8005d38: e055 b.n 8005de6 <LCD_ShowChar+0xda>
|
||
{
|
||
if(size==12){temp=asc2_1206[num][t];} //����1206����
|
||
8005d3a: 78bb ldrb r3, [r7, #2]
|
||
8005d3c: 2b0c cmp r3, #12
|
||
8005d3e: d10b bne.n 8005d58 <LCD_ShowChar+0x4c>
|
||
8005d40: 78fa ldrb r2, [r7, #3]
|
||
8005d42: 7b79 ldrb r1, [r7, #13]
|
||
8005d44: 482c ldr r0, [pc, #176] ; (8005df8 <LCD_ShowChar+0xec>)
|
||
8005d46: 4613 mov r3, r2
|
||
8005d48: 005b lsls r3, r3, #1
|
||
8005d4a: 4413 add r3, r2
|
||
8005d4c: 009b lsls r3, r3, #2
|
||
8005d4e: 4403 add r3, r0
|
||
8005d50: 440b add r3, r1
|
||
8005d52: 781b ldrb r3, [r3, #0]
|
||
8005d54: 73fb strb r3, [r7, #15]
|
||
8005d56: e007 b.n 8005d68 <LCD_ShowChar+0x5c>
|
||
else{ temp=asc2_1608[num][t]; } //����1608����
|
||
8005d58: 78fa ldrb r2, [r7, #3]
|
||
8005d5a: 7b7b ldrb r3, [r7, #13]
|
||
8005d5c: 4927 ldr r1, [pc, #156] ; (8005dfc <LCD_ShowChar+0xf0>)
|
||
8005d5e: 0112 lsls r2, r2, #4
|
||
8005d60: 440a add r2, r1
|
||
8005d62: 4413 add r3, r2
|
||
8005d64: 781b ldrb r3, [r3, #0]
|
||
8005d66: 73fb strb r3, [r7, #15]
|
||
for(t1=0;t1<8;t1++)
|
||
8005d68: 2300 movs r3, #0
|
||
8005d6a: 73bb strb r3, [r7, #14]
|
||
8005d6c: e033 b.n 8005dd6 <LCD_ShowChar+0xca>
|
||
{
|
||
if(temp&0x80){LCD_set_dot(x,y,color);}else{if(bg!=color){LCD_set_dot(x,y,bg);}}
|
||
8005d6e: f997 300f ldrsb.w r3, [r7, #15]
|
||
8005d72: 2b00 cmp r3, #0
|
||
8005d74: da06 bge.n 8005d84 <LCD_ShowChar+0x78>
|
||
8005d76: 8cba ldrh r2, [r7, #36] ; 0x24
|
||
8005d78: 88b9 ldrh r1, [r7, #4]
|
||
8005d7a: 88fb ldrh r3, [r7, #6]
|
||
8005d7c: 4618 mov r0, r3
|
||
8005d7e: f7ff fe17 bl 80059b0 <LCD_set_dot>
|
||
8005d82: e009 b.n 8005d98 <LCD_ShowChar+0x8c>
|
||
8005d84: 8c3a ldrh r2, [r7, #32]
|
||
8005d86: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
8005d88: 429a cmp r2, r3
|
||
8005d8a: d005 beq.n 8005d98 <LCD_ShowChar+0x8c>
|
||
8005d8c: 8c3a ldrh r2, [r7, #32]
|
||
8005d8e: 88b9 ldrh r1, [r7, #4]
|
||
8005d90: 88fb ldrh r3, [r7, #6]
|
||
8005d92: 4618 mov r0, r3
|
||
8005d94: f7ff fe0c bl 80059b0 <LCD_set_dot>
|
||
temp<<=1;
|
||
8005d98: 7bfb ldrb r3, [r7, #15]
|
||
8005d9a: 005b lsls r3, r3, #1
|
||
8005d9c: 73fb strb r3, [r7, #15]
|
||
y++;
|
||
8005d9e: 88bb ldrh r3, [r7, #4]
|
||
8005da0: 3301 adds r3, #1
|
||
8005da2: 80bb strh r3, [r7, #4]
|
||
if(x>=lcddev.width){return;}//��������
|
||
8005da4: 4b16 ldr r3, [pc, #88] ; (8005e00 <LCD_ShowChar+0xf4>)
|
||
8005da6: 881b ldrh r3, [r3, #0]
|
||
8005da8: 88fa ldrh r2, [r7, #6]
|
||
8005daa: 429a cmp r2, r3
|
||
8005dac: d220 bcs.n 8005df0 <LCD_ShowChar+0xe4>
|
||
if((y-y0)==size)
|
||
8005dae: 88ba ldrh r2, [r7, #4]
|
||
8005db0: 897b ldrh r3, [r7, #10]
|
||
8005db2: 1ad2 subs r2, r2, r3
|
||
8005db4: 78bb ldrb r3, [r7, #2]
|
||
8005db6: 429a cmp r2, r3
|
||
8005db8: d10a bne.n 8005dd0 <LCD_ShowChar+0xc4>
|
||
{
|
||
y=y0;
|
||
8005dba: 897b ldrh r3, [r7, #10]
|
||
8005dbc: 80bb strh r3, [r7, #4]
|
||
x++;
|
||
8005dbe: 88fb ldrh r3, [r7, #6]
|
||
8005dc0: 3301 adds r3, #1
|
||
8005dc2: 80fb strh r3, [r7, #6]
|
||
if(x>=lcddev.width){return;}//��������
|
||
8005dc4: 4b0e ldr r3, [pc, #56] ; (8005e00 <LCD_ShowChar+0xf4>)
|
||
8005dc6: 881b ldrh r3, [r3, #0]
|
||
8005dc8: 88fa ldrh r2, [r7, #6]
|
||
8005dca: 429a cmp r2, r3
|
||
8005dcc: d307 bcc.n 8005dde <LCD_ShowChar+0xd2>
|
||
8005dce: e010 b.n 8005df2 <LCD_ShowChar+0xe6>
|
||
for(t1=0;t1<8;t1++)
|
||
8005dd0: 7bbb ldrb r3, [r7, #14]
|
||
8005dd2: 3301 adds r3, #1
|
||
8005dd4: 73bb strb r3, [r7, #14]
|
||
8005dd6: 7bbb ldrb r3, [r7, #14]
|
||
8005dd8: 2b07 cmp r3, #7
|
||
8005dda: d9c8 bls.n 8005d6e <LCD_ShowChar+0x62>
|
||
8005ddc: e000 b.n 8005de0 <LCD_ShowChar+0xd4>
|
||
break;
|
||
8005dde: bf00 nop
|
||
for(t=0;t<size;t++)
|
||
8005de0: 7b7b ldrb r3, [r7, #13]
|
||
8005de2: 3301 adds r3, #1
|
||
8005de4: 737b strb r3, [r7, #13]
|
||
8005de6: 7b7a ldrb r2, [r7, #13]
|
||
8005de8: 78bb ldrb r3, [r7, #2]
|
||
8005dea: 429a cmp r2, r3
|
||
8005dec: d3a5 bcc.n 8005d3a <LCD_ShowChar+0x2e>
|
||
8005dee: e000 b.n 8005df2 <LCD_ShowChar+0xe6>
|
||
if(x>=lcddev.width){return;}//��������
|
||
8005df0: bf00 nop
|
||
}
|
||
}
|
||
|
||
|
||
|
||
}
|
||
8005df2: 3714 adds r7, #20
|
||
8005df4: 46bd mov sp, r7
|
||
8005df6: bd90 pop {r4, r7, pc}
|
||
8005df8: 08006048 .word 0x08006048
|
||
8005dfc: 080064bc .word 0x080064bc
|
||
8005e00: 200007b0 .word 0x200007b0
|
||
|
||
08005e04 <LCD_ShowString>:
|
||
//width,height:������С
|
||
//size:������С
|
||
//*p:�ַ�����ʼ��ַ
|
||
|
||
void LCD_ShowString(uint16_t x,uint16_t y,uint8_t *p,uint8_t size,uint16_t bg,uint16_t color,uint16_t len)
|
||
{
|
||
8005e04: b590 push {r4, r7, lr}
|
||
8005e06: b087 sub sp, #28
|
||
8005e08: af02 add r7, sp, #8
|
||
8005e0a: 60ba str r2, [r7, #8]
|
||
8005e0c: 461a mov r2, r3
|
||
8005e0e: 4603 mov r3, r0
|
||
8005e10: 81fb strh r3, [r7, #14]
|
||
8005e12: 460b mov r3, r1
|
||
8005e14: 81bb strh r3, [r7, #12]
|
||
8005e16: 4613 mov r3, r2
|
||
8005e18: 71fb strb r3, [r7, #7]
|
||
while(len--)
|
||
8005e1a: e052 b.n 8005ec2 <LCD_ShowString+0xbe>
|
||
{
|
||
|
||
if(x>=lcddev.width)
|
||
8005e1c: 4b2e ldr r3, [pc, #184] ; (8005ed8 <LCD_ShowString+0xd4>)
|
||
8005e1e: 881b ldrh r3, [r3, #0]
|
||
8005e20: 89fa ldrh r2, [r7, #14]
|
||
8005e22: 429a cmp r2, r3
|
||
8005e24: d306 bcc.n 8005e34 <LCD_ShowString+0x30>
|
||
{
|
||
x=0;
|
||
8005e26: 2300 movs r3, #0
|
||
8005e28: 81fb strh r3, [r7, #14]
|
||
y+=size;
|
||
8005e2a: 79fb ldrb r3, [r7, #7]
|
||
8005e2c: b29a uxth r2, r3
|
||
8005e2e: 89bb ldrh r3, [r7, #12]
|
||
8005e30: 4413 add r3, r2
|
||
8005e32: 81bb strh r3, [r7, #12]
|
||
}
|
||
if(*p=='\0')
|
||
8005e34: 68bb ldr r3, [r7, #8]
|
||
8005e36: 781b ldrb r3, [r3, #0]
|
||
8005e38: 2b00 cmp r3, #0
|
||
8005e3a: d048 beq.n 8005ece <LCD_ShowString+0xca>
|
||
{
|
||
return;
|
||
}
|
||
if(*p=='\r')
|
||
8005e3c: 68bb ldr r3, [r7, #8]
|
||
8005e3e: 781b ldrb r3, [r3, #0]
|
||
8005e40: 2b0d cmp r3, #13
|
||
8005e42: d102 bne.n 8005e4a <LCD_ShowString+0x46>
|
||
{
|
||
p++;
|
||
8005e44: 68bb ldr r3, [r7, #8]
|
||
8005e46: 3301 adds r3, #1
|
||
8005e48: 60bb str r3, [r7, #8]
|
||
}
|
||
if(*p=='\n')
|
||
8005e4a: 68bb ldr r3, [r7, #8]
|
||
8005e4c: 781b ldrb r3, [r3, #0]
|
||
8005e4e: 2b0a cmp r3, #10
|
||
8005e50: d109 bne.n 8005e66 <LCD_ShowString+0x62>
|
||
{
|
||
x=0;
|
||
8005e52: 2300 movs r3, #0
|
||
8005e54: 81fb strh r3, [r7, #14]
|
||
y+=size;
|
||
8005e56: 79fb ldrb r3, [r7, #7]
|
||
8005e58: b29a uxth r2, r3
|
||
8005e5a: 89bb ldrh r3, [r7, #12]
|
||
8005e5c: 4413 add r3, r2
|
||
8005e5e: 81bb strh r3, [r7, #12]
|
||
p++;
|
||
8005e60: 68bb ldr r3, [r7, #8]
|
||
8005e62: 3301 adds r3, #1
|
||
8005e64: 60bb str r3, [r7, #8]
|
||
}
|
||
if(*p<127)
|
||
8005e66: 68bb ldr r3, [r7, #8]
|
||
8005e68: 781b ldrb r3, [r3, #0]
|
||
8005e6a: 2b7e cmp r3, #126 ; 0x7e
|
||
8005e6c: d813 bhi.n 8005e96 <LCD_ShowString+0x92>
|
||
{
|
||
LCD_ShowChar(x,y,*p,size,bg,color);
|
||
8005e6e: 68bb ldr r3, [r7, #8]
|
||
8005e70: 781a ldrb r2, [r3, #0]
|
||
8005e72: 79fc ldrb r4, [r7, #7]
|
||
8005e74: 89b9 ldrh r1, [r7, #12]
|
||
8005e76: 89f8 ldrh r0, [r7, #14]
|
||
8005e78: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
8005e7a: 9301 str r3, [sp, #4]
|
||
8005e7c: 8c3b ldrh r3, [r7, #32]
|
||
8005e7e: 9300 str r3, [sp, #0]
|
||
8005e80: 4623 mov r3, r4
|
||
8005e82: f7ff ff43 bl 8005d0c <LCD_ShowChar>
|
||
x+=(size/2);
|
||
8005e86: 79fb ldrb r3, [r7, #7]
|
||
8005e88: 085b lsrs r3, r3, #1
|
||
8005e8a: b2db uxtb r3, r3
|
||
8005e8c: b29a uxth r2, r3
|
||
8005e8e: 89fb ldrh r3, [r7, #14]
|
||
8005e90: 4413 add r3, r2
|
||
8005e92: 81fb strh r3, [r7, #14]
|
||
8005e94: e012 b.n 8005ebc <LCD_ShowString+0xb8>
|
||
}else
|
||
{
|
||
Show_Font(x,y,p,size,bg,color);
|
||
8005e96: 79fa ldrb r2, [r7, #7]
|
||
8005e98: 89b9 ldrh r1, [r7, #12]
|
||
8005e9a: 89f8 ldrh r0, [r7, #14]
|
||
8005e9c: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
8005e9e: 9301 str r3, [sp, #4]
|
||
8005ea0: 8c3b ldrh r3, [r7, #32]
|
||
8005ea2: 9300 str r3, [sp, #0]
|
||
8005ea4: 4613 mov r3, r2
|
||
8005ea6: 68ba ldr r2, [r7, #8]
|
||
8005ea8: f7ff fea8 bl 8005bfc <Show_Font>
|
||
p++;
|
||
8005eac: 68bb ldr r3, [r7, #8]
|
||
8005eae: 3301 adds r3, #1
|
||
8005eb0: 60bb str r3, [r7, #8]
|
||
x+=size;
|
||
8005eb2: 79fb ldrb r3, [r7, #7]
|
||
8005eb4: b29a uxth r2, r3
|
||
8005eb6: 89fb ldrh r3, [r7, #14]
|
||
8005eb8: 4413 add r3, r2
|
||
8005eba: 81fb strh r3, [r7, #14]
|
||
}
|
||
p++;
|
||
8005ebc: 68bb ldr r3, [r7, #8]
|
||
8005ebe: 3301 adds r3, #1
|
||
8005ec0: 60bb str r3, [r7, #8]
|
||
while(len--)
|
||
8005ec2: 8d3b ldrh r3, [r7, #40] ; 0x28
|
||
8005ec4: 1e5a subs r2, r3, #1
|
||
8005ec6: 853a strh r2, [r7, #40] ; 0x28
|
||
8005ec8: 2b00 cmp r3, #0
|
||
8005eca: d1a7 bne.n 8005e1c <LCD_ShowString+0x18>
|
||
8005ecc: e000 b.n 8005ed0 <LCD_ShowString+0xcc>
|
||
return;
|
||
8005ece: bf00 nop
|
||
|
||
}
|
||
}
|
||
8005ed0: 3714 adds r7, #20
|
||
8005ed2: 46bd mov sp, r7
|
||
8005ed4: bd90 pop {r4, r7, pc}
|
||
8005ed6: bf00 nop
|
||
8005ed8: 200007b0 .word 0x200007b0
|
||
|
||
08005edc <__libc_init_array>:
|
||
8005edc: b570 push {r4, r5, r6, lr}
|
||
8005ede: 2600 movs r6, #0
|
||
8005ee0: 4d0c ldr r5, [pc, #48] ; (8005f14 <__libc_init_array+0x38>)
|
||
8005ee2: 4c0d ldr r4, [pc, #52] ; (8005f18 <__libc_init_array+0x3c>)
|
||
8005ee4: 1b64 subs r4, r4, r5
|
||
8005ee6: 10a4 asrs r4, r4, #2
|
||
8005ee8: 42a6 cmp r6, r4
|
||
8005eea: d109 bne.n 8005f00 <__libc_init_array+0x24>
|
||
8005eec: f000 f822 bl 8005f34 <_init>
|
||
8005ef0: 2600 movs r6, #0
|
||
8005ef2: 4d0a ldr r5, [pc, #40] ; (8005f1c <__libc_init_array+0x40>)
|
||
8005ef4: 4c0a ldr r4, [pc, #40] ; (8005f20 <__libc_init_array+0x44>)
|
||
8005ef6: 1b64 subs r4, r4, r5
|
||
8005ef8: 10a4 asrs r4, r4, #2
|
||
8005efa: 42a6 cmp r6, r4
|
||
8005efc: d105 bne.n 8005f0a <__libc_init_array+0x2e>
|
||
8005efe: bd70 pop {r4, r5, r6, pc}
|
||
8005f00: f855 3b04 ldr.w r3, [r5], #4
|
||
8005f04: 4798 blx r3
|
||
8005f06: 3601 adds r6, #1
|
||
8005f08: e7ee b.n 8005ee8 <__libc_init_array+0xc>
|
||
8005f0a: f855 3b04 ldr.w r3, [r5], #4
|
||
8005f0e: 4798 blx r3
|
||
8005f10: 3601 adds r6, #1
|
||
8005f12: e7f2 b.n 8005efa <__libc_init_array+0x1e>
|
||
8005f14: 08006aac .word 0x08006aac
|
||
8005f18: 08006aac .word 0x08006aac
|
||
8005f1c: 08006aac .word 0x08006aac
|
||
8005f20: 08006ab0 .word 0x08006ab0
|
||
|
||
08005f24 <memset>:
|
||
8005f24: 4603 mov r3, r0
|
||
8005f26: 4402 add r2, r0
|
||
8005f28: 4293 cmp r3, r2
|
||
8005f2a: d100 bne.n 8005f2e <memset+0xa>
|
||
8005f2c: 4770 bx lr
|
||
8005f2e: f803 1b01 strb.w r1, [r3], #1
|
||
8005f32: e7f9 b.n 8005f28 <memset+0x4>
|
||
|
||
08005f34 <_init>:
|
||
8005f34: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8005f36: bf00 nop
|
||
8005f38: bcf8 pop {r3, r4, r5, r6, r7}
|
||
8005f3a: bc08 pop {r3}
|
||
8005f3c: 469e mov lr, r3
|
||
8005f3e: 4770 bx lr
|
||
|
||
08005f40 <_fini>:
|
||
8005f40: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8005f42: bf00 nop
|
||
8005f44: bcf8 pop {r3, r4, r5, r6, r7}
|
||
8005f46: bc08 pop {r3}
|
||
8005f48: 469e mov lr, r3
|
||
8005f4a: 4770 bx lr
|